SystemVerilog for verification: a guide to learning the testbench language features
Saved in:
| Main Author: | |
|---|---|
| Format: | Book |
| Language: | English |
| Published: |
New York, NY
Springer
2010
|
| Edition: | 2. ed. |
| Subjects: | |
| Physical Description: | XXXVI, 429 S. Ill., graph. Darst. 235 mm x 155 mm |
| ISBN: | 9781441945617 |
Staff View
MARC
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| 245 | 1 | 0 | |a SystemVerilog for verification |b a guide to learning the testbench language features |c Chris Spear |
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| discipline | Informatik Elektrotechnik / Elektronik / Nachrichtentechnik |
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| id | DE-604.BV037473776 |
| illustrated | Illustrated |
| indexdate | 2024-07-09T23:24:56Z |
| institution | BVB |
| isbn | 9781441945617 |
| language | English |
| oai_aleph_id | oai:aleph.bib-bvb.de:BVB01-022625465 |
| oclc_num | 734078825 |
| open_access_boolean | |
| owner | DE-91 DE-BY-TUM |
| owner_facet | DE-91 DE-BY-TUM |
| physical | XXXVI, 429 S. Ill., graph. Darst. 235 mm x 155 mm |
| publishDate | 2010 |
| publishDateSearch | 2010 |
| publishDateSort | 2010 |
| publisher | Springer |
| record_format | marc |
| spelling | Spear, Chris Verfasser aut SystemVerilog for verification a guide to learning the testbench language features Chris Spear 2. ed. New York, NY Springer 2010 XXXVI, 429 S. Ill., graph. Darst. 235 mm x 155 mm txt rdacontent n rdamedia nc rdacarrier Integrated circuits Verification Verilog (Computer hardware description language) VERILOG (DE-588)4268385-3 gnd rswk-swf VERILOG (DE-588)4268385-3 s DE-604 |
| spellingShingle | Spear, Chris SystemVerilog for verification a guide to learning the testbench language features Integrated circuits Verification Verilog (Computer hardware description language) VERILOG (DE-588)4268385-3 gnd |
| subject_GND | (DE-588)4268385-3 |
| title | SystemVerilog for verification a guide to learning the testbench language features |
| title_auth | SystemVerilog for verification a guide to learning the testbench language features |
| title_exact_search | SystemVerilog for verification a guide to learning the testbench language features |
| title_full | SystemVerilog for verification a guide to learning the testbench language features Chris Spear |
| title_fullStr | SystemVerilog for verification a guide to learning the testbench language features Chris Spear |
| title_full_unstemmed | SystemVerilog for verification a guide to learning the testbench language features Chris Spear |
| title_short | SystemVerilog for verification |
| title_sort | systemverilog for verification a guide to learning the testbench language features |
| title_sub | a guide to learning the testbench language features |
| topic | Integrated circuits Verification Verilog (Computer hardware description language) VERILOG (DE-588)4268385-3 gnd |
| topic_facet | Integrated circuits Verification Verilog (Computer hardware description language) VERILOG |
| work_keys_str_mv | AT spearchris systemverilogforverificationaguidetolearningthetestbenchlanguagefeatures |