Embedded system design: embedded systems foundations of cyber-physical systems
Gespeichert in:
| 1. Verfasser: | |
|---|---|
| Format: | Buch |
| Sprache: | English |
| Veröffentlicht: |
Berlin
Springer
2011
|
| Ausgabe: | 2. ed. |
| Schriftenreihe: | Embedded Systems
|
| Schlagworte: | |
| Online-Zugang: | Inhaltstext Inhaltsverzeichnis |
| Beschreibung: | Literaturverz. S. 343 - 371 |
| Beschreibung: | XXI, 389 S. Ill., graph. Darst. |
| ISBN: | 9789400702561 9789400702578 |
Internformat
MARC
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| 100 | 1 | |a Marwedel, Peter |d 1949- |e Verfasser |0 (DE-588)132720736 |4 aut | |
| 245 | 1 | 0 | |a Embedded system design |b embedded systems foundations of cyber-physical systems |c Peter Marwedel |
| 250 | |a 2. ed. | ||
| 264 | 1 | |a Berlin |b Springer |c 2011 | |
| 300 | |a XXI, 389 S. |c Ill., graph. Darst. | ||
| 336 | |b txt |2 rdacontent | ||
| 337 | |b n |2 rdamedia | ||
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| 490 | 0 | |a Embedded Systems | |
| 500 | |a Literaturverz. S. 343 - 371 | ||
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Datensatz im Suchindex
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|---|---|
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| adam_text |
Contents
Preface
xi
Acknowledgments
xxi
1.
INTRODUCTION
1
1.1
Application areas and examples
. 1
1.2
Common characteristics
. 4
1.3
Challenges in Embedded System Design
. 10
1.4
Design Flows
. 12
1.5
Structure of this book
. 17
1.6
Assignments
. 18
2.
SPECIFICATIONS AND MODELING
21
2.1
Requirements
. 21
2.2
Models of computation
. 28
2.3
Early design phases
. 35
2.3.1
Use cases
. 35
2.3.2
(Message) Sequence Charts
. 36
2.4
Communicating finite state machines (CFSMs)
. 39
2.4.1
Timed automata
. 40
2.4.2
StateCharts
. 42
2.4.3
Synchronous languages
. 52
2.4.4
SDL: A case of message passing
. 54
2.5
Dataflow
. 61
2.5.1
Scope
. 61
2.5.2 Kahn
process networks
. 62
2.5.3
Synchronous data flow
. 64
2.5.4
Simulink
. 66
2.6
Petri
nets
. 67
2.6.1
Introduction
. 67
2.6.2
Condition/event nets
. 70
2.6.3
Place/transition nets
. 71
2.6.4
Predicate/transition nets
. 76
2.6.5
Evaluation
. 78
2.7
Discrete event based languages
. 78
2.7.1
VHDL
. 80
2.7.2
SystemC
. 96
2.7.3 Verflog
and SystemVerilog
. 98
2.7.4
SpecC
. 100
2.8
Von-Neumann languages
. 101
2.8.1
CSP
. 102
2.8.2
ADA
. 102
2.8.3
Java
. 105
2.8.4
Pearl and Chill
. 106
2.8.5
Communication libraries
. 106
2.9
Levels of hardware modeling
. 107
2.10
Comparison of models of computation
. 109
2.10.1
Criteria
. 109
2.10.2
UML
.
ИЗ
2.10.3
Ptolemy II
. 115
2.11
Assignments
. 116
3.
EMBEDDED SYSTEM HARDWARE
119
3.1
Introduction
. 119
3.2
Input
. 120
3.2.1
Sensors
. 120
3.2.2
Discretization of time: Sample-and-hold circuits
. . . 123
3.2.3
Discretization of values: A/D-converters
. 127
3.3
Processing Units
. 132
3.3.1
Overview
. 132
3.3.2
Application-Specific Circuits (ASICs)
. 135
3.3.3
Processors
. 135
3.3.4
Reconfigurable
Logic
. 152
3.4
Memories
. 155
3.5
Communication
. 157
3.5.1
Requirements
. 158
3.5.2
Electrical robustness
. 159
3.5.3
Guaranteeing real-time behavior
. 160
3.5.4
Examples
. 162
3.6
Output
. 164
3.6.1
D/A-converters
. 164
3.6.2
Sampling theorem
. 167
3.6.3
Actuators
. 172
3.7
Secure hardware
. 173
3.8
Assignments
. 173
SYSTEM SOFTWARE
177
4.1
Embedded Operating Systems
. 178
4.1.1
General requirements
. 178
4.1.2
Real-time operating systems
. 182
4.1.3
Virtual machines
. 186
4.1.4
Resource access protocols
. 186
4.2
ERIKA
. 191
4.3
Hardware abstraction layers
. 195
4.4
Middleware
. 195
4.4.1
OSEK/VDXCOM
. 195
4.4.2
CORBA
. 196
4.4.3
MPI .
197
4.4.4
POSIX Threads (Pthreads)
. 198
4.4.5
OpenMP
. 198
4.4.6
UPnP, DPWS and JXTA
. 199
4.5
Real-time databases
. 200
4.6
Assignments
. 201
EVALUATION AND VALIDATION
203
5.1
Introduction
. 203
5.1.1
Scope
. 203
5.1.2
Multi-objective optimization
. 204
5.1.3
Relevant objectives
. 206
5.2
Performance evaluation
. 207
5.2.1
Early phases
. 207
5.2.2
WCET estimation
. 208
5.2.3
Real-time calculus
. 213
5.3
Energy and power models
. 217
5.4
Thermal models
. 218
5.5
Risk-and dependability analysis
. 219
5.6
Simulation
. 228
5.7
Rapid prototyping and emulation
. 229
5.8
Formal Verification
. 231
5.9
Assignments
. 233
APPLICATION MAPPING
235
6.1
Problem definition
. 235
6.2
Scheduling in real-time systems
. 238
6.2.1
Classification
of scheduling algorithms
. 238
6.2.2
Aperiodic scheduling without precedence constraints
. 242
6.2.3
Aperiodic scheduling with precedence constraints
. . 248
6.2.4
Periodic scheduling without precedence constraints
. 257
6.2.5
Periodic scheduling with precedence constraints
. . . 262
6.2.6
Sporadic events
. 263
6.3
Hardware/software partitioning
. 263
6.3.1
Introduction
. 263
6.3.2
COOL
. 264
6.4
Mapping to heterogeneous multi-processors
. 272
6.5
Assignments
. 277
7.
OPTIMIZATION
281
7.1
Task level concurrency management
. 281
7.2
High-level optimizations
. 285
7.2.1
Floating-point to fixed-point conversion
. 285
7.2.2
Simple loop transformations
. 287
7.2.3
Loop tiling/blocking
. 289
7.2.4
Loop splitting
. 291
7.2.5
Array folding
. 293
7.3
Compilers for embedded systems
. 295
7.3.1
Introduction
. 295
7.3.2
Energy-aware compilation
. 296
7.3.3
Memory-architecture aware compilation
. 297
7.3.4
Reconciling compilers and timing analysis
. 306
7.3.5
Compilation for digital signal processors
. 308
7.3.6
Compilation for multimedia processors
. 310
7.3.7
Compilation for VLIW processors
. 311
7.3.8
Compilation for network processors
. 312
7.3.9
Compiler generation, retargetable compilers and de¬
sign space exploration
. 313
7.4
Power Management and Thermal Management
. 313
7.4.1
Dynamic voltage scaling
(DVS)
. 313
7.4.2
Dynamic power management (DPM)
. 317
7.5
Assignments
. 318
8.
TEST
321
8.1
Scope
. 321
8.2
Test procedures
. 322
8.2.1
Test pattern generation for gate level models
. 322
8.2.2
Self-test programs
. 324
8.3
Evaluation of test pattern sets and system robustness
. 324
8.3.1
Fault coverage
. 324
8.3.2 Fault Simulation . 325
8.3.3 Fault
injection
. 326
8.4 Design
for testability.
327
8.4.1 Motivation. 327
8.4.2 Scan
design
. 327
8.4.3
Signature analysis
. 329
8.4.4
Pseudo-random test pattern generation
. 330
8.4.5
The built-in logic block observer (BILBO)
. 331
8.5
Assignments
. 332
Appendix A Integer linear programming
335
Appendix
В
Kirchhoff's
laws and operational amplifiers
337
References
343
About the Author
373
List of Figures
375
Index
383 |
| any_adam_object | 1 |
| author | Marwedel, Peter 1949- |
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| bvnumber | BV036947589 |
| classification_rvk | ST 153 |
| classification_tum | DAT 260f |
| ctrlnum | (OCoLC)706877861 (DE-599)DNB1006409378 |
| discipline | Maschinenbau / Maschinenwesen Informatik |
| edition | 2. ed. |
| format | Book |
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| id | DE-604.BV036947589 |
| illustrated | Not Illustrated |
| indexdate | 2024-08-05T08:40:01Z |
| institution | BVB |
| isbn | 9789400702561 9789400702578 |
| language | English |
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| publisher | Springer |
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| series2 | Embedded Systems |
| spellingShingle | Marwedel, Peter 1949- Embedded system design embedded systems foundations of cyber-physical systems Eingebettetes System (DE-588)4396978-1 gnd Systementwurf (DE-588)4261480-6 gnd |
| subject_GND | (DE-588)4396978-1 (DE-588)4261480-6 |
| title | Embedded system design embedded systems foundations of cyber-physical systems |
| title_auth | Embedded system design embedded systems foundations of cyber-physical systems |
| title_exact_search | Embedded system design embedded systems foundations of cyber-physical systems |
| title_full | Embedded system design embedded systems foundations of cyber-physical systems Peter Marwedel |
| title_fullStr | Embedded system design embedded systems foundations of cyber-physical systems Peter Marwedel |
| title_full_unstemmed | Embedded system design embedded systems foundations of cyber-physical systems Peter Marwedel |
| title_short | Embedded system design |
| title_sort | embedded system design embedded systems foundations of cyber physical systems |
| title_sub | embedded systems foundations of cyber-physical systems |
| topic | Eingebettetes System (DE-588)4396978-1 gnd Systementwurf (DE-588)4261480-6 gnd |
| topic_facet | Eingebettetes System Systementwurf |
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Beschreibung
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