Techniques for increasing security and reliability of IP cores embedded in FPGA and ASIC designs:
Gespeichert in:
| 1. Verfasser: | |
|---|---|
| Format: | Abschlussarbeit Buch |
| Sprache: | English |
| Veröffentlicht: |
München
Hut
2010
|
| Schlagworte: | |
| Online-Zugang: | Volltext Volltext Volltext |
| Beschreibung: | VIII, 317 S. 240 mm x 170 mm |
| ISBN: | 9783868536577 |
Internformat
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Datensatz im Suchindex
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| indexdate | 2024-07-09T22:49:21Z |
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| isbn | 9783868536577 |
| language | English |
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| physical | VIII, 317 S. 240 mm x 170 mm |
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| spelling | Ziener, Daniel Verfasser (DE-588)142977179 aut Techniques for increasing security and reliability of IP cores embedded in FPGA and ASIC designs Daniel Ziener München Hut 2010 VIII, 317 S. 240 mm x 170 mm txt rdacontent n rdamedia nc rdacarrier Dissertation Erlangen, Friedrich-Alexander-Universität Erlangen-Nürnberg (FAU) 2010 (DE-588)4113937-9 Hochschulschrift gnd-content Erscheint auch als Online-Ausgabe urn:nbn:de:bvb:29-opus4-92738 https://open.fau.de/handle/openfau/9273 Verlag kostenfrei Volltext https://nbn-resolving.org/urn:nbn:de:bvb:29-opus4-92738 Resolving-System kostenfrei Volltext http://d-nb.info/1150968001/34 Langzeitarchivierung Nationalbibliothek kostenfrei Volltext |
| spellingShingle | Ziener, Daniel Techniques for increasing security and reliability of IP cores embedded in FPGA and ASIC designs |
| subject_GND | (DE-588)4113937-9 |
| title | Techniques for increasing security and reliability of IP cores embedded in FPGA and ASIC designs |
| title_auth | Techniques for increasing security and reliability of IP cores embedded in FPGA and ASIC designs |
| title_exact_search | Techniques for increasing security and reliability of IP cores embedded in FPGA and ASIC designs |
| title_full | Techniques for increasing security and reliability of IP cores embedded in FPGA and ASIC designs Daniel Ziener |
| title_fullStr | Techniques for increasing security and reliability of IP cores embedded in FPGA and ASIC designs Daniel Ziener |
| title_full_unstemmed | Techniques for increasing security and reliability of IP cores embedded in FPGA and ASIC designs Daniel Ziener |
| title_short | Techniques for increasing security and reliability of IP cores embedded in FPGA and ASIC designs |
| title_sort | techniques for increasing security and reliability of ip cores embedded in fpga and asic designs |
| topic_facet | Hochschulschrift |
| url | https://open.fau.de/handle/openfau/9273 https://nbn-resolving.org/urn:nbn:de:bvb:29-opus4-92738 http://d-nb.info/1150968001/34 |
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