Advanced digital design with the Verilog HDL:
Gespeichert in:
| 1. Verfasser: | |
|---|---|
| Format: | Buch |
| Sprache: | English |
| Veröffentlicht: |
Boston [u.a.]
Prentice Hall, Pearson Education
2011
|
| Ausgabe: | 2. ed. |
| Schlagworte: | |
| Beschreibung: | Includes bibliographical references and index |
| Beschreibung: | XVIII, 965 S. graph. Darst. |
| ISBN: | 9780136019282 0136019285 |
Internformat
MARC
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| 008 | 101028s2011 xxud||| |||| 00||| eng d | ||
| 010 | |a 2009044515 | ||
| 020 | |a 9780136019282 |c alk. paper |9 978-0-13-601928-2 | ||
| 020 | |a 0136019285 |9 0-13-601928-5 | ||
| 035 | |a (OCoLC)729969355 | ||
| 035 | |a (DE-599)BVBBV036746562 | ||
| 040 | |a DE-604 |b ger |e aacr | ||
| 041 | 0 | |a eng | |
| 044 | |a xxu |c US | ||
| 049 | |a DE-83 | ||
| 050 | 0 | |a TK7885.7 | |
| 082 | 0 | |a 621.39/5 | |
| 084 | |a ZN 4904 |0 (DE-625)157419: |2 rvk | ||
| 100 | 1 | |a Ciletti, Michael D. |e Verfasser |4 aut | |
| 245 | 1 | 0 | |a Advanced digital design with the Verilog HDL |c Michael D. Ciletti |
| 250 | |a 2. ed. | ||
| 264 | 1 | |a Boston [u.a.] |b Prentice Hall, Pearson Education |c 2011 | |
| 300 | |a XVIII, 965 S. |b graph. Darst. | ||
| 336 | |b txt |2 rdacontent | ||
| 337 | |b n |2 rdamedia | ||
| 338 | |b nc |2 rdacarrier | ||
| 500 | |a Includes bibliographical references and index | ||
| 650 | 4 | |a Datenverarbeitung | |
| 650 | 4 | |a Logic design |x Data processing | |
| 650 | 4 | |a Verilog (Computer hardware description language) | |
| 650 | 0 | 7 | |a VERILOG |0 (DE-588)4268385-3 |2 gnd |9 rswk-swf |
| 689 | 0 | 0 | |a VERILOG |0 (DE-588)4268385-3 |D s |
| 689 | 0 | |5 DE-604 | |
| 999 | |a oai:aleph.bib-bvb.de:BVB01-020663913 | ||
Datensatz im Suchindex
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|---|---|
| any_adam_object | |
| author | Ciletti, Michael D. |
| author_facet | Ciletti, Michael D. |
| author_role | aut |
| author_sort | Ciletti, Michael D. |
| author_variant | m d c md mdc |
| building | Verbundindex |
| bvnumber | BV036746562 |
| callnumber-first | T - Technology |
| callnumber-label | TK7885 |
| callnumber-raw | TK7885.7 |
| callnumber-search | TK7885.7 |
| callnumber-sort | TK 47885.7 |
| callnumber-subject | TK - Electrical and Nuclear Engineering |
| classification_rvk | ZN 4904 |
| ctrlnum | (OCoLC)729969355 (DE-599)BVBBV036746562 |
| dewey-full | 621.39/5 |
| dewey-hundreds | 600 - Technology (Applied sciences) |
| dewey-ones | 621 - Applied physics |
| dewey-raw | 621.39/5 |
| dewey-search | 621.39/5 |
| dewey-sort | 3621.39 15 |
| dewey-tens | 620 - Engineering and allied operations |
| discipline | Elektrotechnik / Elektronik / Nachrichtentechnik |
| edition | 2. ed. |
| format | Book |
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| id | DE-604.BV036746562 |
| illustrated | Illustrated |
| indexdate | 2024-07-09T22:47:10Z |
| institution | BVB |
| isbn | 9780136019282 0136019285 |
| language | English |
| lccn | 2009044515 |
| oai_aleph_id | oai:aleph.bib-bvb.de:BVB01-020663913 |
| oclc_num | 729969355 |
| open_access_boolean | |
| owner | DE-83 |
| owner_facet | DE-83 |
| physical | XVIII, 965 S. graph. Darst. |
| publishDate | 2011 |
| publishDateSearch | 2011 |
| publishDateSort | 2011 |
| publisher | Prentice Hall, Pearson Education |
| record_format | marc |
| spelling | Ciletti, Michael D. Verfasser aut Advanced digital design with the Verilog HDL Michael D. Ciletti 2. ed. Boston [u.a.] Prentice Hall, Pearson Education 2011 XVIII, 965 S. graph. Darst. txt rdacontent n rdamedia nc rdacarrier Includes bibliographical references and index Datenverarbeitung Logic design Data processing Verilog (Computer hardware description language) VERILOG (DE-588)4268385-3 gnd rswk-swf VERILOG (DE-588)4268385-3 s DE-604 |
| spellingShingle | Ciletti, Michael D. Advanced digital design with the Verilog HDL Datenverarbeitung Logic design Data processing Verilog (Computer hardware description language) VERILOG (DE-588)4268385-3 gnd |
| subject_GND | (DE-588)4268385-3 |
| title | Advanced digital design with the Verilog HDL |
| title_auth | Advanced digital design with the Verilog HDL |
| title_exact_search | Advanced digital design with the Verilog HDL |
| title_full | Advanced digital design with the Verilog HDL Michael D. Ciletti |
| title_fullStr | Advanced digital design with the Verilog HDL Michael D. Ciletti |
| title_full_unstemmed | Advanced digital design with the Verilog HDL Michael D. Ciletti |
| title_short | Advanced digital design with the Verilog HDL |
| title_sort | advanced digital design with the verilog hdl |
| topic | Datenverarbeitung Logic design Data processing Verilog (Computer hardware description language) VERILOG (DE-588)4268385-3 gnd |
| topic_facet | Datenverarbeitung Logic design Data processing Verilog (Computer hardware description language) VERILOG |
| work_keys_str_mv | AT cilettimichaeld advanceddigitaldesignwiththeveriloghdl |