SystemVerilog assertions handbook: for dynamic and formal verification
Gespeichert in:
| Format: | Buch |
|---|---|
| Sprache: | English |
| Veröffentlicht: |
Palos Verdes Peninsula, CA
VhdlCohen Publ.
2013
|
| Ausgabe: | 3. ed. |
| Schlagworte: | |
| Beschreibung: | XXVI, 336 S. Ill. 28 cm |
Internformat
MARC
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Datensatz im Suchindex
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| format | Book |
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| id | DE-604.BV036616985 |
| illustrated | Illustrated |
| indexdate | 2024-07-09T22:44:16Z |
| institution | BVB |
| language | English |
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| physical | XXVI, 336 S. Ill. 28 cm |
| publishDate | 2013 |
| publishDateSearch | 2013 |
| publishDateSort | 2013 |
| publisher | VhdlCohen Publ. |
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| spelling | SystemVerilog assertions handbook for dynamic and formal verification Ben Cohen ... 3. ed. Palos Verdes Peninsula, CA VhdlCohen Publ. 2013 XXVI, 336 S. Ill. 28 cm txt rdacontent n rdamedia nc rdacarrier Verilog (Computer hardware description language) Electronic digital computers / Design and construction Integrated circuits / Verification VERILOG (DE-588)4268385-3 gnd rswk-swf VERILOG (DE-588)4268385-3 s DE-604 Cohen, Ben Sonstige oth |
| spellingShingle | SystemVerilog assertions handbook for dynamic and formal verification Verilog (Computer hardware description language) Electronic digital computers / Design and construction Integrated circuits / Verification VERILOG (DE-588)4268385-3 gnd |
| subject_GND | (DE-588)4268385-3 |
| title | SystemVerilog assertions handbook for dynamic and formal verification |
| title_auth | SystemVerilog assertions handbook for dynamic and formal verification |
| title_exact_search | SystemVerilog assertions handbook for dynamic and formal verification |
| title_full | SystemVerilog assertions handbook for dynamic and formal verification Ben Cohen ... |
| title_fullStr | SystemVerilog assertions handbook for dynamic and formal verification Ben Cohen ... |
| title_full_unstemmed | SystemVerilog assertions handbook for dynamic and formal verification Ben Cohen ... |
| title_short | SystemVerilog assertions handbook |
| title_sort | systemverilog assertions handbook for dynamic and formal verification |
| title_sub | for dynamic and formal verification |
| topic | Verilog (Computer hardware description language) Electronic digital computers / Design and construction Integrated circuits / Verification VERILOG (DE-588)4268385-3 gnd |
| topic_facet | Verilog (Computer hardware description language) Electronic digital computers / Design and construction Integrated circuits / Verification VERILOG |
| work_keys_str_mv | AT cohenben systemverilogassertionshandbookfordynamicandformalverification |