Embedded systems and software validation:
Gespeichert in:
| 1. Verfasser: | |
|---|---|
| Format: | Buch |
| Sprache: | English |
| Veröffentlicht: |
Amsterdam [u.a.]
Morgan Kaufmann/Elsevier
2009
|
| Schriftenreihe: | The Morgan Kaufmann series in systems on silicon
|
| Schlagworte: | |
| Online-Zugang: | Inhaltsverzeichnis |
| Beschreibung: | Includes bibliographical references and index |
| Beschreibung: | XII, 254 S. Ill., graph. Darst. |
| ISBN: | 9780123742308 |
Internformat
MARC
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| 035 | |a (OCoLC)299711039 | ||
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| 100 | 1 | |a Roychoudhury, Abhik |e Verfasser |4 aut | |
| 245 | 1 | 0 | |a Embedded systems and software validation |c Abhik Roychoudhury |
| 264 | 1 | |a Amsterdam [u.a.] |b Morgan Kaufmann/Elsevier |c 2009 | |
| 300 | |a XII, 254 S. |b Ill., graph. Darst. | ||
| 336 | |b txt |2 rdacontent | ||
| 337 | |b n |2 rdamedia | ||
| 338 | |b nc |2 rdacarrier | ||
| 490 | 0 | |a The Morgan Kaufmann series in systems on silicon | |
| 500 | |a Includes bibliographical references and index | ||
| 650 | 0 | |a Embedded computer systems / Design and construction | |
| 650 | 0 | |a Embedded computer systems / Testing | |
| 650 | 0 | |a Computer software / Testing | |
| 650 | 4 | |a Computer software |x Testing | |
| 650 | 4 | |a Embedded computer systems |x Design and construction | |
| 650 | 4 | |a Embedded computer systems |x Testing | |
| 650 | 0 | 7 | |a Eingebettetes System |0 (DE-588)4396978-1 |2 gnd |9 rswk-swf |
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| 650 | 0 | 7 | |a Validierung |0 (DE-588)4187357-9 |2 gnd |9 rswk-swf |
| 689 | 0 | 0 | |a Eingebettetes System |0 (DE-588)4396978-1 |D s |
| 689 | 0 | |5 DE-604 | |
| 689 | 1 | 0 | |a Software |0 (DE-588)4055382-6 |D s |
| 689 | 1 | 1 | |a Validierung |0 (DE-588)4187357-9 |D s |
| 689 | 1 | |5 DE-604 | |
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| 999 | |a oai:aleph.bib-bvb.de:BVB01-018665715 | ||
Datensatz im Suchindex
| _version_ | 1804140755353075712 |
|---|---|
| adam_text | Contents
Acknowledgments
................................................. ix
Preface
............................................................. xi
CHAPTER
1
Introduction
CHAPTER
2
2.1
2.2
2.3
2.4
2.5
2.6
2.7
2.8
2.9
2.10
2.11
2.12
2.13
CHAPTER
3
3.1
3.2
Model Validation
7
Platform versus System Behavior
................................ 8
Criteria for Design Model
......................................... 10
Informal Requirements: A Case Study
........................... 12
2.3.1
The Requirements Document
............................. 13
2.3.2
Simplification of the Informal Requirements
............ 14
Common Modeling Notations
.................................... 16
2.4.1
Finite-State Machines
..................................... 16
2.4.2
Communicating FSMs
.................................... 20
2.4.3
Message Sequence Chart-Based Models
................ 27
Remarks about Modeling Notations
.............................. 37
Model Simulations
................................................ 39
2.6.1
FSM Simulations
.......................................... 41
2.6.2
Simulating MSC-Based System Models
................. 46
Model-Based Testing
.............................................. 50
Model Checking
................................................... 58
2.8.1
Property Specification
..................................... 58
2.8.2
Checking Procedure
....................................... 73
The SPIN Validation Tool
......................................... 82
The SMV Validation Tool
......................................... 86
Case Study: Air-Traffic Controller
................................ 89
References
......................................................... 91
Exercises
........................................................... 93
Communication Validation
95
Common Incompatibilities
........................................ 98
3.1.1
Sending/Receiving Signals in Different Order
........... 99
3.1.2
Handling a Different Signal Alphabet
.................... 100
3.1.3
Mismatch in Data Format
................................. 102
3.1.4
Mismatch in Data Rates
................................... 105
Converter Synthesis
............................................... 106
3.2.1
Representing Native Protocols and Converters
.......... 106
3.2.2
Basic Ideas for Converter Synthesis
...................... 108
3.2.3
Various Strategies for Protocol Conversion
.............. 115
v¡¡
viii Contents
3.2.4
Avoiding No-Progress Cycles
............................. 116
3.2.5
Speculative Transmission to Avoid Deadlocks
........... 118
3.3
Changing a Working Design
...................................... 121
3.4
References
......................................................... 122
3.5
Exercises
........................................................... 123
CHAPTER
4
Performance Validation
125
4.1
The Conventional Abstraction of Time
........................... 126
4.2
Predicting Execution Time of a Program
......................... 131
4.2.1
WCET Calculation
........................................ 133
4.2.2
Modeling of Microarchitecture
........................... 145
4.3
Interference within a Processing Element
........................ 154
4.3.1
Interrupts from Environment
............................. 155
4.3.2
Contention and Preemption
............................... 157
4.3.3
Sharing a Processor Cache
................................ 161
4.4
System-Level Communication Analysis
......................... 165
4.5
Designing Systems with Predictable Timing
..................... 169
4.5.1
Scratchpad Memories
..................................... 169
4.5.2
Time-Triggered Communication
......................... 174
4.6
Emerging Applications
............................................ 176
4.7
References
......................................................... 177
4.8
Exercises
........................................................... 177
CHAPTER
5
Functionality Validation
ш
5.1
Dynamic or Trace-Based Checking
.............................. 184
5.1.1
Dynamic Slicing
........................................... 187
5.1.2
Fault Localization
......................................... 196
5.1.3
Directed Testing Methods
................................. 203
5.2
Formal Verification
................................................ 207
5.2.1
Predicate Abstraction
...................................... 211
5.2.2
Software Checking via Predicate Abstraction
............ 218
5.2.3
Combining Formal Verification with Testing
............ 225
5.3
References
......................................................... 229
5.4
Exercises
........................................................... 230
Bibliography
Index
233
241
|
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| dewey-sort | 14.1 |
| dewey-tens | 000 - Computer science, information, general works 620 - Engineering and allied operations |
| discipline | Informatik Elektrotechnik / Elektronik / Nachrichtentechnik |
| format | Book |
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| illustrated | Illustrated |
| indexdate | 2024-07-09T22:05:01Z |
| institution | BVB |
| isbn | 9780123742308 |
| language | English |
| lccn | 2009011196 |
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| physical | XII, 254 S. Ill., graph. Darst. |
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| series2 | The Morgan Kaufmann series in systems on silicon |
| spelling | Roychoudhury, Abhik Verfasser aut Embedded systems and software validation Abhik Roychoudhury Amsterdam [u.a.] Morgan Kaufmann/Elsevier 2009 XII, 254 S. Ill., graph. Darst. txt rdacontent n rdamedia nc rdacarrier The Morgan Kaufmann series in systems on silicon Includes bibliographical references and index Embedded computer systems / Design and construction Embedded computer systems / Testing Computer software / Testing Computer software Testing Embedded computer systems Design and construction Embedded computer systems Testing Eingebettetes System (DE-588)4396978-1 gnd rswk-swf Software (DE-588)4055382-6 gnd rswk-swf Validierung (DE-588)4187357-9 gnd rswk-swf Eingebettetes System (DE-588)4396978-1 s DE-604 Software (DE-588)4055382-6 s Validierung (DE-588)4187357-9 s Digitalisierung UB Bamberg application/pdf http://bvbr.bib-bvb.de:8991/F?func=service&doc_library=BVB01&local_base=BVB01&doc_number=018665715&sequence=000002&line_number=0001&func_code=DB_RECORDS&service_type=MEDIA Inhaltsverzeichnis |
| spellingShingle | Roychoudhury, Abhik Embedded systems and software validation Embedded computer systems / Design and construction Embedded computer systems / Testing Computer software / Testing Computer software Testing Embedded computer systems Design and construction Embedded computer systems Testing Eingebettetes System (DE-588)4396978-1 gnd Software (DE-588)4055382-6 gnd Validierung (DE-588)4187357-9 gnd |
| subject_GND | (DE-588)4396978-1 (DE-588)4055382-6 (DE-588)4187357-9 |
| title | Embedded systems and software validation |
| title_auth | Embedded systems and software validation |
| title_exact_search | Embedded systems and software validation |
| title_full | Embedded systems and software validation Abhik Roychoudhury |
| title_fullStr | Embedded systems and software validation Abhik Roychoudhury |
| title_full_unstemmed | Embedded systems and software validation Abhik Roychoudhury |
| title_short | Embedded systems and software validation |
| title_sort | embedded systems and software validation |
| topic | Embedded computer systems / Design and construction Embedded computer systems / Testing Computer software / Testing Computer software Testing Embedded computer systems Design and construction Embedded computer systems Testing Eingebettetes System (DE-588)4396978-1 gnd Software (DE-588)4055382-6 gnd Validierung (DE-588)4187357-9 gnd |
| topic_facet | Embedded computer systems / Design and construction Embedded computer systems / Testing Computer software / Testing Computer software Testing Embedded computer systems Design and construction Embedded computer systems Testing Eingebettetes System Software Validierung |
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