Digital VLSI chip design with cadence and synopsys CAD tools:
Gespeichert in:
| 1. Verfasser: | |
|---|---|
| Format: | Buch |
| Sprache: | English |
| Veröffentlicht: |
Boston [u.a.]
Pearson, Addison-Wesley
2010
|
| Schlagworte: | |
| Beschreibung: | XVI, 571 S. Ill., graph. Darst. |
| ISBN: | 9780321547996 0321547993 |
Internformat
MARC
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|---|---|---|---|
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| 003 | DE-604 | ||
| 005 | 20120418 | ||
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| 008 | 090615s2010 ad|| |||| 00||| eng d | ||
| 020 | |a 9780321547996 |9 978-0-321-54799-6 | ||
| 020 | |a 0321547993 |9 0-321-54799-3 | ||
| 035 | |a (OCoLC)308171006 | ||
| 035 | |a (DE-599)HBZHT015927378 | ||
| 040 | |a DE-604 |b ger |e rakwb | ||
| 041 | 0 | |a eng | |
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| 100 | 1 | |a Brunvand, Erik |e Verfasser |4 aut | |
| 245 | 1 | 0 | |a Digital VLSI chip design with cadence and synopsys CAD tools |c Erik Brunvand |
| 264 | 1 | |a Boston [u.a.] |b Pearson, Addison-Wesley |c 2010 | |
| 300 | |a XVI, 571 S. |b Ill., graph. Darst. | ||
| 336 | |b txt |2 rdacontent | ||
| 337 | |b n |2 rdamedia | ||
| 338 | |b nc |2 rdacarrier | ||
| 650 | 4 | |a Integrated circuits |x Very large scale integration |x Computer-aided design | |
| 650 | 0 | 7 | |a VLSI |0 (DE-588)4117388-0 |2 gnd |9 rswk-swf |
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| 689 | 0 | |5 DE-604 | |
| 999 | |a oai:aleph.bib-bvb.de:BVB01-017618035 | ||
Datensatz im Suchindex
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|---|---|
| any_adam_object | |
| author | Brunvand, Erik |
| author_facet | Brunvand, Erik |
| author_role | aut |
| author_sort | Brunvand, Erik |
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| building | Verbundindex |
| bvnumber | BV035562313 |
| callnumber-first | T - Technology |
| callnumber-label | TK7874 |
| callnumber-raw | TK7874.75 |
| callnumber-search | TK7874.75 |
| callnumber-sort | TK 47874.75 |
| callnumber-subject | TK - Electrical and Nuclear Engineering |
| classification_rvk | ST 190 ZN 4904 ZN 4952 |
| ctrlnum | (OCoLC)308171006 (DE-599)HBZHT015927378 |
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| dewey-ones | 621 - Applied physics |
| dewey-raw | 621.381 |
| dewey-search | 621.381 |
| dewey-sort | 3621.381 |
| dewey-tens | 620 - Engineering and allied operations |
| discipline | Informatik Elektrotechnik / Elektronik / Nachrichtentechnik |
| format | Book |
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| id | DE-604.BV035562313 |
| illustrated | Illustrated |
| indexdate | 2024-07-09T21:40:29Z |
| institution | BVB |
| isbn | 9780321547996 0321547993 |
| language | English |
| oai_aleph_id | oai:aleph.bib-bvb.de:BVB01-017618035 |
| oclc_num | 308171006 |
| open_access_boolean | |
| owner | DE-29T DE-83 |
| owner_facet | DE-29T DE-83 |
| physical | XVI, 571 S. Ill., graph. Darst. |
| publishDate | 2010 |
| publishDateSearch | 2010 |
| publishDateSort | 2010 |
| publisher | Pearson, Addison-Wesley |
| record_format | marc |
| spelling | Brunvand, Erik Verfasser aut Digital VLSI chip design with cadence and synopsys CAD tools Erik Brunvand Boston [u.a.] Pearson, Addison-Wesley 2010 XVI, 571 S. Ill., graph. Darst. txt rdacontent n rdamedia nc rdacarrier Integrated circuits Very large scale integration Computer-aided design VLSI (DE-588)4117388-0 gnd rswk-swf Entwurfsautomation (DE-588)4312536-0 gnd rswk-swf VLSI (DE-588)4117388-0 s Entwurfsautomation (DE-588)4312536-0 s DE-604 |
| spellingShingle | Brunvand, Erik Digital VLSI chip design with cadence and synopsys CAD tools Integrated circuits Very large scale integration Computer-aided design VLSI (DE-588)4117388-0 gnd Entwurfsautomation (DE-588)4312536-0 gnd |
| subject_GND | (DE-588)4117388-0 (DE-588)4312536-0 |
| title | Digital VLSI chip design with cadence and synopsys CAD tools |
| title_auth | Digital VLSI chip design with cadence and synopsys CAD tools |
| title_exact_search | Digital VLSI chip design with cadence and synopsys CAD tools |
| title_full | Digital VLSI chip design with cadence and synopsys CAD tools Erik Brunvand |
| title_fullStr | Digital VLSI chip design with cadence and synopsys CAD tools Erik Brunvand |
| title_full_unstemmed | Digital VLSI chip design with cadence and synopsys CAD tools Erik Brunvand |
| title_short | Digital VLSI chip design with cadence and synopsys CAD tools |
| title_sort | digital vlsi chip design with cadence and synopsys cad tools |
| topic | Integrated circuits Very large scale integration Computer-aided design VLSI (DE-588)4117388-0 gnd Entwurfsautomation (DE-588)4312536-0 gnd |
| topic_facet | Integrated circuits Very large scale integration Computer-aided design VLSI Entwurfsautomation |
| work_keys_str_mv | AT brunvanderik digitalvlsichipdesignwithcadenceandsynopsyscadtools |