Digital design: basic concepts and principles
Gespeichert in:
1. Verfasser: | |
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Format: | Buch |
Sprache: | English |
Veröffentlicht: |
Boca Raton, FL
CRC Press
2008
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Schlagworte: | |
Online-Zugang: | Inhaltsverzeichnis Beschreibung für Leser Inhaltsverzeichnis |
Beschreibung: | Includes bibliographical references and index |
Beschreibung: | XIII, 490 S. graph. Darst. |
ISBN: | 9781420061314 1420061313 |
Internformat
MARC
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Datensatz im Suchindex
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adam_text | TABLE OF CONTENTS FOR DIGITAL DESIGN : BASIC CONCEPTS AND PRINCIPLES / BY MOHAMMAD A. KARIM AND XINGHAO CHEN.
=============================================================================================================
BIBLIOGRAPHIC RECORD AND LINKS TO RELATED INFORMATION AVAILABLE FROM THE
LIBRARY OF CONGRESS CATALOG.
NOTE: CONTENTS DATA ARE MACHINE GENERATED BASED ON PRE-PUBLICATION
PROVIDED BY THE PUBLISHER. CONTENTS MAY HAVE VARIATIONS FROM THE PRINTED
BOOK OR BE INCOMPLETE OR CONTAIN OTHER CODING. CONTENTS PREFACE 1. DATA
TYPE AND REPRESENTATIONS 1.1. INTRODUCTION 1.2. POSITIONAL NUMBER
SYSTEMS 1.3. NUMBER SYSTEM CONVERSION 1.4. NEGATIVE NUMBERS 1.5. BINARY
ARITHMETIC 1.6. UNCONVENTIONAL NUMBER SYSTEM 1.7. BINARY CODES 1.8.
ERROR DETECTING AND CORRECTING CODES 1.9. CAD SYSTEM 1.10. SUMMARY
PROBLEMS 2. BOOLEAN ALGEBRA 2.1. INTRODUCTION 2.2. LOGIC OPERATIONS 2.3.
LOGIC FUNCTIONS FROM TRUTH TABLES 2.4. BOOLEAN ALGEBRA 2.5. SUMMARY
PROBLEMS 3. MINIMIZATION OF LOGIC FUNCTIONS 3.1. INTRODUCTION 3.2.
KARNAUGH MAP 3.3. INCOMPLETELY SPECIFIED FUNCTIONS IN K-MAP 3.4. K-MAPS
FOR PRODUCT-OF-SUM FORM OF FUNCTIONS 3.5. MAP-ENTERED VARIABLES 3.6.
HAZARDS 3.7. SINGLE-OUTPUT Q-M TABULAR REDUCTION 3.8. MULTIPLE-OUTPUT
Q-M TABULAR REDUCTION 3.9. SUMMARY PROBLEMS 4. LOGIC FUNCTION
IMPLEMENTATION 4.1. INTRODUCTION 4.2. FUNCTIONALLY COMPLETE OPERATION
SETS 4.3. NAND-ONLY AND NOR-ONLY IMPLEMENTATIONS 4.4. FUNCTION
IMPLEMENTATION USING XOR AND XNOR LOGIC 4.5. CIRCUIT IMPLEMENTATION
USING GATE ARRAYS 4.6. LOGIC FUNCTION IMPLEMENTATION USING MULTIPLEXERS
4.7. LOGIC FUNCTION IMPLEMENTATION USING DEMULTIPLEXERS AND DECODERS
4.8. LOGIC FUNCTION IMPLEMENTATION USING ROM 4.9. LOGIC FUNCTION
IMPLEMENTATION USING PLD 4.10. LOGIC FUNCTION IMPLEMENTATION USING
THRESHOLD LOGIC 4.11. LOGIC FUNCTION IMPLEMENTATION USING TRANSMISSION
GATES 4.12. SUMMARY PROBLEMS 5. INTRODUCTION TO VHDL 5.1. VHDL
PROGRAMMING ENVIRONMENT 5.2. STRUCTURAL VHDL 5.3. FUNCTIONAL VHDL 5.4.
BEHAVIORAL VHDL 5.5. HIERARCHICAL VHDL 5.6. LOGIC CIRCUIT SYNTHESIS WITH
XILINX WEBPACK ISE PROJECT NAVIGATOR 5.7. SIMULATION OF TIMING
CHARACTERISTICS 5.8. LOGIC CIRCUIT IMPLEMENTATION WITH FPGA DEVICE 5.9.
SUMMARY PROBLEMS 6. DESIGN OF MODULAR COMBINATORIAL COMPONENTS 6.1.
INTRODUCTION 6.2. SPECIAL-PURPOSE DECODERS AND ENCODERS 6.3. CODE
CONVERTERS 6.4. ERROR-DETECTING AND ERROR-CORRECTING CIRCUITS 6.5.
BINARY ARITHMETIC 6.6. BINARY SUBTRACTION 6.7. HIGH-SPEED ADDITION 6.8.
BCD ARITHMETIC 6.9. COMPARATORS 6.10. COMBINATORIAL CIRCUIT DESIGN USING
VHDL 6.11. ARITHMETIC LOGIC UNIT 6.12. ALU DESIGN USING VHDL 6.13.
SUMMARY PROBLEMS 7. SEQUENTIAL LOGIC ELEMENTS 7.1. INTRODUCTION 7.2.
LATCHES 7.3. SET-RESET FLIP-FLOP 7.4. JK FLIP-FLOP 7.5. MASTER-SLAVE
FLIP-FLOP 7.6. EDGE-TRIGGERED FLIP-FLOP 7.7. DELAY AND TRIGGER FLIP-FLOP
7.8. MONOSTABLE FLIP-FLOP 7.9. DESIGN OF SEQUENTIAL ELEMENTS USING VHDL
7.10. SEQUENTIAL CIRCUITS 7.11. SUMMARY PROBLEMS 8. SYNCHRONOUS
SEQUENTIAL CIRCUITS 8.1. INTRODUCTION 8.2. FORMALISM 8.3. MEALY AND
MOORE MODELS 8.4. ANALYSIS OF SEQUENTIAL CIRCUITS 8.5. EQUIVALENT STATES
8.6. INCOMPLETELY SPECIFIED SEQUENTIAL CIRCUITS 8.7. STATE ASSIGNMENTS
8.8. DESIGN ALGORITHM 8.9. SYNCHRONOUS SEQUENTIAL CIRCUIT IMPLEMENTATION
USING VHDL 8.10. SUMMARY PROBLEMS 9. MODULAR SEQUENTIAL COMPONENTS 9.1.
INTRODUCTION 9.2. SYNCHRONOUS COUNTERS 9.3. REGISTERS 9.4. SHIFT
REGISTERS AS COUNTERS 9.5. COUNTER AND REGISTER APPLICATIONS 9.6. RTL
9.7. REGISTERS AND COUNTERS USING VHDL 9.8. SUMMARY PROBLEMS 10.
SEQUENTIAL ARITHMETIC 10.1. INTRODUCTION 10.2. SERIAL ADDER/SUBTRACTER
10.3. SERIAL-PARALLEL MULTIPLICATION 10.4. FAST MULTIPLICATION 10.5.
IMPLEMENTATION OF SEQUENTIAL ARITHMETIC IN VHDL 10.6. SUMMARY PROBLEMS
11. ASYNCHRONOUS SEQUENTIAL CIRCUITS. 11.1. INTRODUCTION 11.2. PULSE
MODE CIRCUITS 11.3. FUNDAMENTAL MODE CIRCUITS 11.4. CYCLES, RACES, AND
HAZARDS 11.5. FUNDAMENTAL MODE OUTPUTS 11.6. SUMMARY PROBLEMS 12.
INTRODUCTION TO TESTABILITY 12.1. INTRODUCTION 12.2. CONTROLLABILITY AND
OBSERVABILITY 12.3. DETERMINISTIC TESTABILITY VERSUS RANSOM TESTABILITY
12.4. TEST OF INTEGRATED CIRCUITS 12.5. FAULT MODELS 12.6. TEST SETS AND
TEST GENERATION 12.7. TOPOLOGY-BASED TESTABILITY ANALYSIS 12.8.
SIMULATION-BASED TESTABILITY ANALYSIS 12.9. FAULT ANALYSIS AND
FAULT-BASED TESTABILITY ANALYSIS 12.10. TESTABILITY MATRICES 12.11.
DESIGN-FOR-TESTABILITY 12.12. SUMMARY PROBLEMS
LIBRARY OF CONGRESS SUBJECT HEADINGS FOR THIS PUBLICATION:
DIGITAL ELECTRONICS. LOGIC DESIGN.
|
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author | Karim, Mohammad A. |
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id | DE-604.BV035548260 |
illustrated | Illustrated |
indexdate | 2024-07-09T21:40:10Z |
institution | BVB |
isbn | 9781420061314 1420061313 |
language | English |
lccn | 2007020768 |
oai_aleph_id | oai:aleph.bib-bvb.de:BVB01-017604206 |
oclc_num | 636912316 |
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owner | DE-634 |
owner_facet | DE-634 |
physical | XIII, 490 S. graph. Darst. |
publishDate | 2008 |
publishDateSearch | 2008 |
publishDateSort | 2008 |
publisher | CRC Press |
record_format | marc |
spelling | Karim, Mohammad A. Verfasser aut Digital design basic concepts and principles Mohammad A. Karim ; Xinghao Chen Boca Raton, FL CRC Press 2008 XIII, 490 S. graph. Darst. txt rdacontent n rdamedia nc rdacarrier Includes bibliographical references and index Entwurf (DE-588)4121208-3 gnd rswk-swf Digitale integrierte Schaltung (DE-588)4113313-4 gnd rswk-swf Digitale integrierte Schaltung (DE-588)4113313-4 s Entwurf (DE-588)4121208-3 s DE-604 Chen, Xinghao Sonstige oth http://www.loc.gov/catdir/toc/ecip0718/2007020768.html Inhaltsverzeichnis http://www.loc.gov/catdir/enhancements/fy0727/2007020768-d.html Beschreibung für Leser DNB Datenaustausch application/pdf http://bvbr.bib-bvb.de:8991/F?func=service&doc_library=BVB01&local_base=BVB01&doc_number=017604206&sequence=000001&line_number=0001&func_code=DB_RECORDS&service_type=MEDIA Inhaltsverzeichnis |
spellingShingle | Karim, Mohammad A. Digital design basic concepts and principles Entwurf (DE-588)4121208-3 gnd Digitale integrierte Schaltung (DE-588)4113313-4 gnd |
subject_GND | (DE-588)4121208-3 (DE-588)4113313-4 |
title | Digital design basic concepts and principles |
title_auth | Digital design basic concepts and principles |
title_exact_search | Digital design basic concepts and principles |
title_full | Digital design basic concepts and principles Mohammad A. Karim ; Xinghao Chen |
title_fullStr | Digital design basic concepts and principles Mohammad A. Karim ; Xinghao Chen |
title_full_unstemmed | Digital design basic concepts and principles Mohammad A. Karim ; Xinghao Chen |
title_short | Digital design |
title_sort | digital design basic concepts and principles |
title_sub | basic concepts and principles |
topic | Entwurf (DE-588)4121208-3 gnd Digitale integrierte Schaltung (DE-588)4113313-4 gnd |
topic_facet | Entwurf Digitale integrierte Schaltung |
url | http://www.loc.gov/catdir/toc/ecip0718/2007020768.html http://www.loc.gov/catdir/enhancements/fy0727/2007020768-d.html http://bvbr.bib-bvb.de:8991/F?func=service&doc_library=BVB01&local_base=BVB01&doc_number=017604206&sequence=000001&line_number=0001&func_code=DB_RECORDS&service_type=MEDIA |
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