High performance embedded architectures and compilers: fourth international conference, HiPEAC 2009, Paphos, Cyprus, January 25 - 28, 2009 ; proceedings
Gespeichert in:
| Format: | Tagungsbericht Buch |
|---|---|
| Sprache: | English |
| Veröffentlicht: |
Berlin [u.a.]
Springer
2009
|
| Schriftenreihe: | Lecture notes in computer science
5409 |
| Schlagworte: | |
| Online-Zugang: | Inhaltsverzeichnis |
| Beschreibung: | Literaturangaben |
| Beschreibung: | XIII, 420 S. graph. Darst. 24 cm |
| ISBN: | 9783540929895 |
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Datensatz im Suchindex
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TABLE OF CONTENTS INVITED PROGRAM KEYNOTE: CHALLENGES ON THE ROAD TO
EXASCALE COMPUTING 1 TILAK AGERWALA KEYNOTE: COMPILERS IN THE MANYCORE
ERA 2 FRANCOIS BODIN I DYNAMIC TRANSLATION AND OPTIMISATION
STEAL-ON-ABORT: IMPROVING TRANSACTIONAL MEMORY PERFORMANCE THROUGH
DYNAMIC TRANSACTION REORDERING 4 MOHAMMAD ANSARI, MIKEL LUJDN, CHRISTOS
KOTSELIDIS, KIM JARVIS, CHRIS KIRKHAM, AND IAN WATSON PREDICTIVE RUNTIME
CODE SCHEDULING FOR HETEROGENEOUS ARCHITECTURES. 19 VICTOR J. JIMENEZ,
LLUIS VILANOVA, ISAAC GELADO, MARISA GIL, GRIGORI FURSIN, AND NACHO
NAVARRO COLLECTIVE OPTIMIZATION 34 GRIGORI FURSIN AND OLIVIER TEMAM HIGH
SPEED CPU SIMULATION USING LTU DYNAMIC BINARY TRANSLATION 50 DANIEL
JONES AND NIGEL TOPHAM II LOW LEVEL SCHEDULING INTEGRATED MODULO
SCHEDULING FOR CLUSTERED VLIW ARCHITECTURES 65 MATTIAS V. ERIKSSON AND
CHRISTOPH W. KESSLER SOFTWARE PIPELINING IN NESTED LOOPS WITH
PROLOG-EPILOG MERGING 80 MOHAMMED FELLAHI AND ALBERT COHEN A FLEXIBLE
CODE COMPRESSION SCHEME USING PARTITIONED LOOK-UP TABLES 95 MARTIN
THURESSON, MAGNUS SJALANDER, AND PER STENSTROM III PARALLELISM AND
RESOURCE CONTROL MLP-AWARE RUNAHEAD THREADS IN A SIMULTANEOUS
MULTITHREADING PROCESSO BIBLIOGRAFISCHE INFORMATIONEN
HTTP://D-NB.INFO/991630858 DIGITALISIERT DURCH XII TABLE OF CONTENTS IPC
CONTROL FOR MULTIPLE REAL-TIME THREADS ON AN IN-ORDER SMT PROCESSOR 125
JORG MISCHE, SASCHA UHRIG, FLORIAN KLUGE, AND THEO UNGERER A HARDWARE
TASK SCHEDULER FOR EMBEDDED VIDEO PROCESSING 140 GHIATH AL-KADI AND
ANDREI SERGEEVICH TERECHKO FINDING STRESS PATTERNS IN MICROPROCESSOR
WORKLOADS 153 FREDERIK VANDEPUTTE AND LIEVEN EECKHOUT IV COMMUNICATION
DERIVING EFFICIENT DATA MOVEMENT FROM DECOUPLED ACCESS/EXECUTE
SPECIFICATIONS 168 LEE W. HOWES, ANTON LOKHRNOTOV, ALASTAIR F.
DONALDSON, AND PAUL H.J. KELLY MPSOC DESIGN USING APPLICATION-SPECIFIC
ARCHITECTURALLY VISIBLE COMMUNICATION 183 THEO KLUTER, PHILIP BRISK,
EDOARDO CHARBON, AND PAOLO IENNE COMMUNICATION BASED PROACTIVE LINK
POWER MANAGEMENT 198 SAI PRASHANTH MURALIDHARA AND MAHMUT KANDEMIR V
MAPPING FOR CMPS MAPPING AND SYNCHRONIZING STREAMING APPLICATIONS ON
CELL PROCESSORS 216 MAIK NIJHUIS, HERBERT BOS, HENRI E. BAL, AND CEDRIC
AUGONNET ADAPTING APPLICATION MAPPING TO SYSTEMATIC WITHIN-DIE PROCESS
VARIATIONS ON CHIP MULTIPROCESSORS 231 YANG DING, MAHMUT KANDEMIR, MARY
JANE IRWIN, AND PADMA RAGHAVAN ACCOMODATING DIVERSITY IN CMPS WITH
HETEROGENEOUS FREQUENCIES 248 MAJOR BHADAURIA, VINCE WEAVER, AND SALLY
A. MCKEE A 419 TABLE OF CONTENTS XIII PREDICTIVE THERMAL MANAGEMENT FOR
CHIP MULTIPROCESSORS USING CO-DESIGNED VIRTUAL MACHINES 293 OMER KHAN
AND SANDIP KUNDU HEDGE: HYBRID DATAFLOW GRAPH EXECUTION IN THE ISSUE
LOGIC 308 SURIYA SUBRAMANIAN AND KATHRYN S. MCKINLEY COMPILER CONTROLLED
SPECULATION FOR POWER AWARE ILP EXTRACTION IN DATAFLOW ARCHITECTURES 324
MUHAMMAD UMAR FAROOQ, LIZY JOHN, AND MARGARIDA F. JACOME VII CACHE
ISSUES REVISITING CACHE BLOCK SUPERLOADING 339 MATTHEW A. WATKINS, SALLY
A. MCKEE, AND LAMBERT SCHAELICKE ACM: AN EFFICIENT APPROACH FOR MANAGING
SHARED CACHES IN CHIP MULTIPROCESSORS 355 MOHAMMAD HAMMOUD, SANGYEUN
CHO, AND RAMI MELHEM IN-NETWORK CACHING FOR CHIP MULTIPROCESSORS 373
ADITYA YANAMANDRA, MARY JANE IRWIN, VIJAYKRISHNAN NARAYANAN, MAHMUT
KANDEMIR, AND SRI HARI KRISHNA NARAYANAN VIII PARALLEL EMBEDDED
APPLICATIONS PARALLEL LDPC DECODING ON THE CELL/B.E. PROCESSOR 389
GABRIEL FALCAO, LEONEL SOUSA, VITOR SILVA, AND JOSE MARINHO PARALLEL
H.264 DECODING ON AN EMBEDDED MULTICORE PROCESSOR 404 ARNALDO AZEVEDO,
COR MEENDERINCK, BEN JUURLINK, ANDREI TERECHKO, JAN HOOGERBRUGGE,
MAURICIO ALVAREZ, AND ALEX RAMIREZ AUTHOR INDEX |
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| spelling | High performance embedded architectures and compilers fourth international conference, HiPEAC 2009, Paphos, Cyprus, January 25 - 28, 2009 ; proceedings André Seznec ... (eds.) Berlin [u.a.] Springer 2009 XIII, 420 S. graph. Darst. 24 cm txt rdacontent n rdamedia nc rdacarrier Lecture notes in computer science 5409 Literaturangaben Eingebettetes System - Computerarchitektur - Compiler - Kongress - Paphos <Ktima, 2009> Supercomputer - Computerarchitektur - Compiler - Kongress - Paphos <Ktima, 2009> Compiler (DE-588)4148248-7 gnd rswk-swf Computerarchitektur (DE-588)4048717-9 gnd rswk-swf Eingebettetes System (DE-588)4396978-1 gnd rswk-swf Supercomputer (DE-588)4128144-5 gnd rswk-swf (DE-588)1071861417 Konferenzschrift 2009 Paphos Ktima gnd-content Eingebettetes System (DE-588)4396978-1 s Computerarchitektur (DE-588)4048717-9 s Compiler (DE-588)4148248-7 s DE-604 Supercomputer (DE-588)4128144-5 s Seznec, André Sonstige oth HiPEAC 4 2009 Paphos Sonstige (DE-588)10368948-5 oth Lecture notes in computer science 5409 (DE-604)BV000000607 5409 DNB Datenaustausch application/pdf http://bvbr.bib-bvb.de:8991/F?func=service&doc_library=BVB01&local_base=BVB01&doc_number=017308625&sequence=000001&line_number=0001&func_code=DB_RECORDS&service_type=MEDIA Inhaltsverzeichnis |
| spellingShingle | High performance embedded architectures and compilers fourth international conference, HiPEAC 2009, Paphos, Cyprus, January 25 - 28, 2009 ; proceedings Lecture notes in computer science Eingebettetes System - Computerarchitektur - Compiler - Kongress - Paphos <Ktima, 2009> Supercomputer - Computerarchitektur - Compiler - Kongress - Paphos <Ktima, 2009> Compiler (DE-588)4148248-7 gnd Computerarchitektur (DE-588)4048717-9 gnd Eingebettetes System (DE-588)4396978-1 gnd Supercomputer (DE-588)4128144-5 gnd |
| subject_GND | (DE-588)4148248-7 (DE-588)4048717-9 (DE-588)4396978-1 (DE-588)4128144-5 (DE-588)1071861417 |
| title | High performance embedded architectures and compilers fourth international conference, HiPEAC 2009, Paphos, Cyprus, January 25 - 28, 2009 ; proceedings |
| title_auth | High performance embedded architectures and compilers fourth international conference, HiPEAC 2009, Paphos, Cyprus, January 25 - 28, 2009 ; proceedings |
| title_exact_search | High performance embedded architectures and compilers fourth international conference, HiPEAC 2009, Paphos, Cyprus, January 25 - 28, 2009 ; proceedings |
| title_full | High performance embedded architectures and compilers fourth international conference, HiPEAC 2009, Paphos, Cyprus, January 25 - 28, 2009 ; proceedings André Seznec ... (eds.) |
| title_fullStr | High performance embedded architectures and compilers fourth international conference, HiPEAC 2009, Paphos, Cyprus, January 25 - 28, 2009 ; proceedings André Seznec ... (eds.) |
| title_full_unstemmed | High performance embedded architectures and compilers fourth international conference, HiPEAC 2009, Paphos, Cyprus, January 25 - 28, 2009 ; proceedings André Seznec ... (eds.) |
| title_short | High performance embedded architectures and compilers |
| title_sort | high performance embedded architectures and compilers fourth international conference hipeac 2009 paphos cyprus january 25 28 2009 proceedings |
| title_sub | fourth international conference, HiPEAC 2009, Paphos, Cyprus, January 25 - 28, 2009 ; proceedings |
| topic | Eingebettetes System - Computerarchitektur - Compiler - Kongress - Paphos <Ktima, 2009> Supercomputer - Computerarchitektur - Compiler - Kongress - Paphos <Ktima, 2009> Compiler (DE-588)4148248-7 gnd Computerarchitektur (DE-588)4048717-9 gnd Eingebettetes System (DE-588)4396978-1 gnd Supercomputer (DE-588)4128144-5 gnd |
| topic_facet | Eingebettetes System - Computerarchitektur - Compiler - Kongress - Paphos <Ktima, 2009> Supercomputer - Computerarchitektur - Compiler - Kongress - Paphos <Ktima, 2009> Compiler Computerarchitektur Eingebettetes System Supercomputer Konferenzschrift 2009 Paphos Ktima |
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