Verfügbarkeit: Cryptographic engineering

Cryptographic engineering:

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Weitere Verfasser:	Koç, Çetin Kaya 1957- (HerausgeberIn)
Format:	Buch
Sprache:	English
Veröffentlicht:	New York, NY Springer [2009]
Schlagworte:	Cryptography Data encryption (Computer science) Embedded computer systems > Design Design Eingebettetes System Technische Anlage Kryptologie Implementierung > Informatik Datenstruktur Aufgabensammlung Aufsatzsammlung
Online-Zugang:	Inhaltsverzeichnis
Beschreibung:	xxii, 517 Seiten Illustrationen, Diagramme 229 mm x 152 mm
ISBN:	9780387718163

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MARC


LEADER	00000nam a2200000 c 4500
001	BV035338008
003	DE-604
005	20181026
007	t
008	090227s2009 gw a\|\|\| \|\|\|\| 00\|\|\| eng d
015			\|a 08,N29,0827 \|2 dnb
020			\|a 9780387718163 \|c Gb. : ca. EUR 106.30 (freier Pr.), ca. sfr 163.00 (freier Pr.) \|9 978-0-387-71816-3
024	3		\|a 9780387718163
028	5	2	\|a 11945178
035			\|a (OCoLC)729575565
035			\|a (DE-599)BVBBV035338008
040			\|a DE-604 \|b ger \|e rakddb
041	0		\|a eng
044			\|a gw \|c XA-DE-BE
049			\|a DE-29T \|a DE-473 \|a DE-91 \|a DE-Aug4
050		0	\|a TK7895.E42
082	0		\|a 005.82 \|2 22
084			\|a ST 276 \|0 (DE-625)143642: \|2 rvk
084			\|a ZN 6025 \|0 (DE-625)157494: \|2 rvk
084			\|a DAT 465f \|2 stub
084			\|a 620 \|2 sdnb
245	1	0	\|a Cryptographic engineering \|c Çetin Kaya Koç, editor
264		1	\|a New York, NY \|b Springer \|c [2009]
300			\|a xxii, 517 Seiten \|b Illustrationen, Diagramme \|c 229 mm x 152 mm
336			\|b txt \|2 rdacontent
337			\|b n \|2 rdamedia
338			\|b nc \|2 rdacarrier
650		4	\|a Cryptography
650		4	\|a Data encryption (Computer science)
650		4	\|a Embedded computer systems \|x Design
650	0	7	\|a Design \|0 (DE-588)4011510-0 \|2 gnd \|9 rswk-swf
650	0	7	\|a Eingebettetes System \|0 (DE-588)4396978-1 \|2 gnd \|9 rswk-swf
650	0	7	\|a Technische Anlage \|0 (DE-588)4059220-0 \|2 gnd \|9 rswk-swf
650	0	7	\|a Kryptologie \|0 (DE-588)4033329-2 \|2 gnd \|9 rswk-swf
650	0	7	\|a Implementierung \|g Informatik \|0 (DE-588)4026663-1 \|2 gnd \|9 rswk-swf
650	0	7	\|a Datenstruktur \|0 (DE-588)4011146-5 \|2 gnd \|9 rswk-swf
655		7	\|0 (DE-588)4143389-0 \|a Aufgabensammlung \|2 gnd-content
655		7	\|0 (DE-588)4143413-4 \|a Aufsatzsammlung \|2 gnd-content
689	0	0	\|a Technische Anlage \|0 (DE-588)4059220-0 \|D s
689	0	1	\|a Datenstruktur \|0 (DE-588)4011146-5 \|D s
689	0		\|5 DE-604
689	1	0	\|a Eingebettetes System \|0 (DE-588)4396978-1 \|D s
689	1	1	\|a Design \|0 (DE-588)4011510-0 \|D s
689	1		\|5 DE-604
689	2	0	\|a Kryptologie \|0 (DE-588)4033329-2 \|D s
689	2	1	\|a Implementierung \|g Informatik \|0 (DE-588)4026663-1 \|D s
689	2		\|8 1\p \|5 DE-604
700	1		\|a Koç, Çetin Kaya \|d 1957- \|0 (DE-588)121427536 \|4 edt
776	1	8	\|i Erscheint auch als \|n Online-Ausgabe \|z 978-0-387-71817-0
856	4	2	\|m Digitalisierung UB Bamberg \|q application/pdf \|u http://bvbr.bib-bvb.de:8991/F?func=service&doc_library=BVB01&local_base=BVB01&doc_number=017142354&sequence=000002&line_number=0001&func_code=DB_RECORDS&service_type=MEDIA \|3 Inhaltsverzeichnis
999			\|a oai:aleph.bib-bvb.de:BVB01-017142354
883	1		\|8 1\p \|a cgwrk \|d 20201028 \|q DE-101 \|u https://d-nb.info/provenance/plan#cgwrk

Datensatz im Suchindex

_version_	1804138652987555840
adam_text	Contents 1 About Cryptographic Engineering ............................. 1 Çetin Kaya Кос 1.1 Introduction .............................................. 1 1.2 Chapter Contents ......................................... 2 1.3 Exercises and Projects ..................................... 4 2 Random Number Generators for Cryptographic Applications ...... 5 Werner Schindler 2.1 Introduction .............................................. 5 2.2 General Requirements ..................................... 6 2.3 Classification ............................................. 7 2.4 Deterministic Random Number Generators (DRNGs) ........... 7 2.4.1 Pure DRNGs ..................................... 8 2.4.2 Hybrid DRNGs ................................... 11 2.4.3 A Word of Warning ................................ 13 2.5 Physical True Random Number Generators (PTRNGs) .......... 14 2.5.1 The Generic Design ............................... 14 2.5.2 Entropy and Guesswork ............................ 16 2.6 Non-physical True Random Number Generators (NPTRNGs): Basic Properties .......................................... 18 2.7 Standards and Evaluation Guidances ......................... 20 2.8 Exercises ................................................ 20 2.9 Projects ................................................. 21 References ..................................................... 21 3 Evaluation Criteria for Physical Random Number Generators ...... 25 Werner Schindler 3.1 Introduction .............................................. 25 3.2 Generic Design ........................................... 26 3.3 Evaluation Criteria for the Principle Design ................... 27 3.4 The Stochastic Model ...................................... 29 χ Contents 3.5 Algorithmic Postprocessing ................................. 37 3.6 Online Test, Tot Test, and Self Test .......................... 41 3.6.1 Online Tests ...................................... 42 3.7 Alternative Security Philosophies ............................ 49 3.8 Side-channel Attacks and Fault Attacks ....................... 50 3.9 Exercises ................................................ 51 3.10 Projects ................................................. 51 References ..................................................... 52 4 True Random Number Generators for Cryptography ............. 55 Berk Sunar 4.1 Introduction .............................................. 55 4.2 TRNG Building Blocks .................................... 56 4.3 Desirable Features ........................................ 57 4.4 Survey of TRNG Designs .................................. 57 4.4.1 Baggini and Bucci ................................. 58 4.4.2 The Intel TRNG Design ............................ 58 4.4.3 The Tkacik TRNG Design .......................... 59 4.4.4 The Epstein et al. TRNG Design ..................... 60 4.4.5 The Fischer-Drutarovsky Design .................... 61 4.4.6 The Golić FIGARO Design ......................... 62 4.4.7 The Kohlbrenner-Gaj Design ....................... 63 4.4.8 The Bucci-Luzzi Testable TRNG Design Framework ... 64 4.4.9 The Rings Design ................................. 65 4.4.10 The PUF-RNG Design ............................. 66 4.4.11 The Yoo et al. Design .............................. 67 4.4.12 The Dichtl and Golić RNG Design ................... 67 4.5 Postprocessing Techniques ................................. 68 4.6 Exercises ................................................ 70 References ..................................................... 71 5 Fast Finite Field Multiplication ................................ 75 Serdar Süer Érdem, Tugrul Yanik, and Çetin Kaya Кос 5.1 Introduction .............................................. 75 5.2 Finite Fields .............................................. 76 5.3 Multiplication in Prime Fields ............................... 77 5.3.1 Integer Multiplication .............................. 78 5.3.2 Integer Squaring .................................. 80 5.3.3 Integer Modular Reduction ......................... 80 5.4 Multiplication in Binary Extension Fields ..................... 87 5.4.1 Polynomial Multiplication over F2 ................... 88 5.4.2 Polynomial Squaring over F2 ........................ 90 5.4.3 Polynomial Modular Reduction over F2 ............... 90 5.5 Multiplication in General Extension Fields .................... 96 5.5.1 Field Multiplication in OEF ......................... 97 5.5.2 Coefficient Multiplication and Reductions ............. 98 Contents xi 5.6 Karatsuba-Ofman Algorithm............................... 99 5.6.1 Complexity .......................................100 5.6.2 Number of Scalar Multiplications ....................100 5.7 Exercises ................................................102 5.8 Projects .................................................103 References .....................................................103 6 Efficient Unified Arithmetic for Hardware Cryptography ..........105 Erkay Savaş and Çetin Kaya Кос 6.1 Introduction ..............................................105 6.2 Fundamentals of Extension Fields ...........................106 6.3 Addition and Subtraction ...................................107 6.4 Multiplication ............................................110 6.4.1 Montgomery Multiplication Algorithm ...............110 6.4.2 Dual-Radix Multiplier ..............................116 6.4.3 Support for Ternary Extension Fields, GFQ ) ..........118 6.5 Inversion ................................................119 6.5.1 Montgomery Inversion for GF(p) and GF(2 ) .........119 6.6 Conclusions ..............................................122 6.7 Exercises ................................................122 6.8 Projects .................................................123 References .....................................................123 7 Spectral Modular Arithmetic for Cryptography .................. 125 Gökay Saldamh and Çetin Kaya Кос 7.1 Introduction ..............................................125 7.2 Notation and Background ..................................126 7.2.1 Evaluation Polynomials ............................126 7.2.2 Discrete Fourier Transform (DFT) ...................129 7.2.3 Properties of DFT: Time-frequency dictionary .........131 7.3 Spectral Modular Arithmetic ................................135 7.3.1 Time Simulations and Spectral Algorithms ............135 7.3.2 Modular Reduction ................................136 7.3.3 Spectral Modular Reduction .........................137 7.3.4 Time Simulation of Spectral Modular Reduction .......139 7.3.5 Spectral Modular Reduction in a Finite Ring Spectrum .. 141 7.3.6 Spectral Modular Multiplication (SMM) ..............143 7.3.7 Spectral Modular Exponentiation ....................145 7.3.8 Illustrative Example ...............................149 7.4 Applications to Cryptography ...............................153 7.4.1 Mersenne and Fermat rings .........................154 7.4.2 Pseudo Number Transforms .........................155 7.4.3 Parameter Selection for RSA ........................156 7.4.4 Parameter Selection for ECC over Prime Fields ........157 7.5 Spectral Extension Field Arithmetic ..........................158 7.5.1 Binary Extension Fields ............................158 Contents 7.5.2 Midsize Characteristic Extension Fields ...............161 7.5.3 Parameter Selection for ECC over Extension Fields .....164 7.6 Notes ...................................................165 7.7 Exercises ................................................166 7.8 Projects .................................................167 References .....................................................168 Elliptic and Hyperelliptic Curve Cryptography ..................171 Nigel Boston and Matthew Damali 8.1 Introduction ..............................................171 8.2 Diffie - Hellman Key Exchange .............................172 8.3 Introduction to Elliptic and Hyperelliptic Curves ...............172 8.4 The Jacobian of a Curve ....................................173 8.4.1 The Principal Subgroup and Jac(C) ..................174 8.5 Computing on JacţC) ......................................174 8.6 Group Law for Elliptic Curves ..............................176 8.7 Techniques for Computations in Hyperelliptic Curves ...........178 8.7.1 Explicit Formulae .................................178 8.7.2 Projective Coordinates .............................178 8.7.3 Other Optimization Techniques ......................179 8.8 Counting Points on JaciC) .................................179 8.9 Attacks ..................................................181 8.9.1 Baby-Step Giant-Step Attack ........................181 8.9.2 Pollard Rho and Lambda Attacks ....................181 8.9.3 Pohlig-Hellman Attack ............................182 8.9.4 Menezes-Okamoto-Vanstone Attack .................182 8.9.5 Semaev, Satoh- Araki, Smart Attack ..................183 8.9.6 Attacks employing Weil descent .....................183 8.10 Good Curves .............................................184 8.11 Exercises ................................................184 8.12 Projects .................................................185 References .....................................................185 Instruction Set Extensions for Cryptographic Applications ......... 191 Sandro Bartolini, Roberto Giorgi, and Enrico Martinelli 9.1 Introduction ..............................................191 9.1.1 Instruction Set Architecture .........................191 9.2 Applications and Benchmarks ...............................194 9.2.1 Benchmarks ......................................195 9.2.2 Potential Performance ..............................195 9.3 ISE for Cryptographic Applications ..........................196 9.3.1 Instructions for Information Confusion and Diffusion ... 196 9.3.2 ISE for AES ......................................203 9.3.3 ISE for ECC applications ...........................212 9.4 Exercises ................................................227 9.5 Projects .................................................228 References .....................................................229 Contents xiii 10 FPGA and ASIC Implementations of AES ......................235 Kris Gaj and Pawel Chodowiec 10.1 Introduction ..............................................235 10.2 AES Cipher Description ....................................236 10.2.1 Basic Features ....................................236 10.2.2 Round Operations .................................237 10.2.3 Iterative Structure .................................242 10.2.4 Key Scheduling ...................................243 10.3 FPGA and ASIC Technologies ..............................247 10.4 Parameters of Hardware Implementations .....................250 10.4.1 Throughput and Latency ............................250 10.4.2 Area ............................................250 10.5 Hardware Architectures of Symmetric Block Ciphers ...........251 10.5.1 Hardware Architectures vs. Block Cipher Modes of Operation ......................................251 10.5.2 Basic Iterative Architecture .........................252 10.5.3 Loop Unrolling ...................................253 10.5.4 Pipelining ........................................254 10.5.5 Limits on the Maximum Clock Frequency of Pipelined Architectures .....................................258 10.5.6 Compact Architectures with Resource Sharing .........260 10.6 Implementation of Basic Operations of AES in Hardware ........261 10.6.1 SubBytes and InvSubBytes .........................261 10.6.2 MixColumns and InvMixColumns ...................270 10.7 Hardware Architectures of a Single Round of AES .............274 10.7.1 S-Box-Based Architecture ..........................274 10.7.2 T-Box-Based Architecture ..........................276 10.7.3 Compact Architectures .............................282 10.8 Implementation of Key Scheduling ..........................286 10.9 Optimum Choice of a Hardware Architecture for AES ..........286 10.10 Exercises ................................................289 10.11 Projects .................................................290 References .....................................................291 11 Secure and Efficient Implementation of Symmetric Encryption Schemes using FPGAs .......................................295 François-Xavier Standaert 11.1 Introduction ..............................................295 11.2 Efficient FPGA Implementations ............................297 11.2.1 Exploiting the Slice Structure .......................297 11.2.2 Exploiting Embedded Blocks ........................300 11.2.3 Exploiting Further Features .........................302 11.2.4 Combining the Tricks: The Flexibility Versus Efficiency Tradeoff ................................303 11.3 Fair Evaluation of a Cryptographic FPGA Design ..............303 xiv Contents 11.3.1 Design Goals.....................................304 11.3.2 Performance Evaluation............................304 11.4 Security of FPGAs Against Side-Channel Attacks ..............305 11.4.1 Applicability of the Attack and FPGA Properties .......306 11.4.2 Countermeasures ..................................310 11.4.3 Measuring Side-Channel Resistance ..................311 11.5 Other Security Issues ......................................312 11.5.1 Fault Attacks .....................................312 11.5.2 Bitstream Security .................................312 11.6 Conclusions and Open Questions ............................315 11.7 Exercises ................................................315 11.8 Projects .................................................317 References .....................................................318 12 Block Cipher Modes of Operation from a Hardware Implementation Perspective ...................................321 Debrup Chakraborty and Francisco Rodríguez-Henríquez 12.1 Introduction ..............................................321 12.2 Block Ciphers ............................................326 12.3 Introduction to AES .......................................327 12.3.1 Byte Substitution (BS) Step .........................328 12.3.2 Shift Rows (SR) Step ..............................328 12.3.3 Mix Columns (MC) Step ...........................328 12.3.4 Add Round Key (ARK) Step ........................329 12.3.5 Key Scheduling Algorithm ..........................329 12.4 A Background in Binary Extension Finite Fields ...............330 12.4.1 Rings ............................................330 12.4.2 Fields ...........................................331 12.4.3 Finite Fields ......................................331 12.4.4 Binary Finite Field Arithmetic .......................331 12.5 Traditional Modes of Operations ............................332 12.5.1 Electronic Code Book Mode ........................333 12.5.2 Cipher Block Chaining Mode .......................333 12.5.3 Cipher Feedback Mode .............................334 12.5.4 Output Feedback Mode .............................334 12.5.5 Counter Mode ....................................335 12.6 Security Requirements for Modes of Operations ...............336 12.6.1 The Adversary ....................................336 12.6.2 Privacy Only Modes ...............................337 12.6.3 Authenticated Encryption ...........................338 12.6.4 Disk Encryption Schemes ...........................339 12.6.5 Security Proofs ...................................341 12.7 Some Modern Modes ......................................341 12.7.1 The Offset Codebook Mode .........................343 12.7.2 ECB-Mask-ECB Mode .............................344 Contents xv 12.8 The ССМ Mode: A Case Study .............................347 12.8.1 The ССМ Mode ..................................347 12.8.2 AES Encryptor Core Implementation .................350 12.8.3 Hardware Implementation of the CCM Mode ..........353 12.8.4 Experimental Results and Comparison ................357 12.9 Conclusions ..............................................358 12.10 Exercises ................................................359 12.11 Projects .................................................359 References .....................................................360 13 Basics of Side-Channel Analysis ...............................365 Marc Joye 13.1 Introduction ..............................................365 13.2 Timing Analysis ..........................................365 13.2.1 Attack on a Password Verification ....................366 13.2.2 Attack on an RSA Signature Scheme .................367 13.3 Simple Power Analysis ....................................368 13.3.1 Reverse-Engineering of an Algorithm .................369 13.3.2 Attack on a Private RSA Exponentiation ..............370 13.3.3 Attack on a DES Key Schedule ......................371 13.4 Differential Power Analysis .................................373 13.4.1 Bit Tracing .......................................373 13.4.2 Attack on an AES Implementation ...................374 13.4.3 Attack on an RSA Signature Scheme (2)..............376 13.5 Countermeasures ..........................................376 13.6 Exercises ................................................377 13.7 Projects .................................................378 References .....................................................379 14 Improved Techniques for Side-Channel Analysis .................381 Pankaj Rohatgi 14.1 Introduction ..............................................381 14.2 CMOS Devices: Side-Channel Leakage Perspective ............382 14.2.1 Intentional Current Flows ...........................382 14.2.2 Leakage Current Flows .............................383 14.2.3 Information Leakage in Power and EM Side-Channels .. 383 14.3 Characterizing Side-Channel Leakage Using Maximum Likelihood ...............................................385 14.3.1 Adversarial Model .................................385 14.3.2 Maximum Likelihood and Best Attack Strategy ........385 14.3.3 Gaussian Assumption ..............................386 14.4 Template Attacks .........................................387 14.4.1 Classical Template Attacks: The Case of RC4 ..........389 14.4.2 Single-Bit Templates and Applications ................393 14.5 Improved DPA/DEMA Metric ..............................395 14.5.1 Improving DPA...................................395 xvi Contents 14.6 Multi-Channel Attacks .....................................397 14.6.1 Multiple Channel Selection .........................397 14.6.2 Multi-Channel Template Attacks .....................399 14.6.3 Multi-Channel DPA ...............................400 14.7 Toward Information Leakage Assessment .....................401 14.7.1 Practical Considerations ............................402 14.8 Projects .................................................403 References .....................................................405 15 Electromagnetic Attacks and Countermeasures ..................407 Pankaj Rohatgi 15.1 Introduction and History ...................................407 15.2 EM Emanations Background ................................409 15.2.1 Types of EM Emanations ...........................409 15.2.2 EM Propagation ...................................410 15.3 EM Capturing Equipment ..................................413 15.4 EM Leakage Examples ....................................415 15.4.1 Examples: Amplitude Modulation ....................415 15.4.2 Examples: Angle Modulation .......................422 15.5 Multiplicity of EM Channels and Comparison with Power Channel .................................................424 15.6 Using EM to Bypass Power Analysis Countermeasures ..........427 15.7 Quantifying EM Exposure ..................................427 15.8 Countermeasures ..........................................428 15.9 Projects .................................................429 References .....................................................430 16 Leakage from Montgomery Multiplication ......................431 Colin D. Walter 16.1 Introduction ..............................................431 16.2 Montgomery Reduction ....................................431 16.3 Montgomery Modular Multiplication .........................433 16.4 Exponentiation ...........................................435 16.5 Space and Time Comparisons ...............................437 16.6 Side Channel Analysis .....................................438 16.7 Frequencies of Conditional Subtractions ......................440 16.8 Variance in Frequencies and SCA Errors ......................442 16.9 A Surprising Improvement .................................443 16.10 Conclusions ..............................................445 16.11 Exercises ................................................445 16.12 Projects .................................................446 References .....................................................448 17 Randomized Exponentiation Algorithms ........................451 Colin D. Walter 17.1 Introduction ..............................................451 Contents xvii 17.2 The Big Mac Attack .......................................452 17.3 Digit Representation and Exponentiation Algorithms ...........454 17.4 Liardet-Smart ............................................457 17.4.1 Attacking the Algorithm ............................459 17.5 Oswald-Aigner Exponentiation .............................460 17.5.1 Attacking the Algorithm ............................461 17.6 На -Moon................................................ 462 17.6.1 Attacking the Algorithm ............................463 17.7 Itoh s Overlapping Windows ................................464 17.7.1 Attacking the Algorithm ............................465 17.8 Randomized Table Method .................................466 17.8.1 Attacking the Algorithm ............................466 17.9 The MIST Algorithm ......................................467 17.9.1 Attacking the Algorithm ............................468 17.10 Conclusions ..............................................469 17.11 Exercises ................................................469 17.12 Projects .................................................470 References .....................................................472 18 Microarchitectural Attacks and Countermeasures ................475 Onur Aciiçmez and Çetin Kaya Кос 18.1 Introduction ..............................................475 18.2 Overview and Brief History .................................476 18.3 Cache Analysis ...........................................478 18.3.1 Basics of Cache ...................................478 18.3.2 Overview of Cache Attacks .........................480 18.3.3 A Brief Survey on Cache Analysis ...................481 18.3.4 Time-Driven and Trace-Driven Attacks ...............482 18.3.5 Exploiting Internal Collisions in Time-Driven Attacks ... 483 18.3.6 Access-Driven Attacks .............................485 18.3.7 Percivaľs Hyper-Threading Attack on RSA ............489 18.4 Branch Prediction Analysis .................................490 18.4.1 The Concept of Branch Prediction ...................490 18.4.2 Simple Branch Prediction Analysis ...................492 18.5 I-cache Analysis ..........................................494 18.6 Exploiting Shared Functional Units ..........................496 18.7 Comparing Microarchitectural Analysis Types .................497 18.8 Countermeasures for Microarchitectural Analysis ..............498 18.9 Exercises ................................................499 18.10 Projects .................................................500 References .....................................................501 Authors Biographies ...............................................505 Index .............................................................513
any_adam_object	1
author2	Koç, Çetin Kaya 1957-
author2_role	edt
author2_variant	ç k k çk çkk
author_GND	(DE-588)121427536
author_facet	Koç, Çetin Kaya 1957-
building	Verbundindex
bvnumber	BV035338008
callnumber-first	T - Technology
callnumber-label	TK7895
callnumber-raw	TK7895.E42
callnumber-search	TK7895.E42
callnumber-sort	TK 47895 E42
callnumber-subject	TK - Electrical and Nuclear Engineering
classification_rvk	ST 276 ZN 6025
classification_tum	DAT 465f
ctrlnum	(OCoLC)729575565 (DE-599)BVBBV035338008
dewey-full	005.82
dewey-hundreds	000 - Computer science, information, general works
dewey-ones	005 - Computer programming, programs, data, security
dewey-raw	005.82
dewey-search	005.82
dewey-sort	15.82
dewey-tens	000 - Computer science, information, general works
discipline	Maschinenbau / Maschinenwesen Informatik Elektrotechnik / Elektronik / Nachrichtentechnik
format	Book
fullrecord	<?xml version="1.0" encoding="UTF-8"?><collection xmlns="http://www.loc.gov/MARC21/slim"><record><leader>02643nam a2200649 c 4500</leader><controlfield tag="001">BV035338008</controlfield><controlfield tag="003">DE-604</controlfield><controlfield tag="005">20181026 </controlfield><controlfield tag="007">t</controlfield><controlfield tag="008">090227s2009 gw a\|\|\| \|\|\|\| 00\|\|\| eng d</controlfield><datafield tag="015" ind1=" " ind2=" "><subfield code="a">08,N29,0827</subfield><subfield code="2">dnb</subfield></datafield><datafield tag="020" ind1=" " ind2=" "><subfield code="a">9780387718163</subfield><subfield code="c">Gb. : ca. EUR 106.30 (freier Pr.), ca. sfr 163.00 (freier Pr.)</subfield><subfield code="9">978-0-387-71816-3</subfield></datafield><datafield tag="024" ind1="3" ind2=" "><subfield code="a">9780387718163</subfield></datafield><datafield tag="028" ind1="5" ind2="2"><subfield code="a">11945178</subfield></datafield><datafield tag="035" ind1=" " ind2=" "><subfield code="a">(OCoLC)729575565</subfield></datafield><datafield tag="035" ind1=" " ind2=" "><subfield code="a">(DE-599)BVBBV035338008</subfield></datafield><datafield tag="040" ind1=" " ind2=" "><subfield code="a">DE-604</subfield><subfield code="b">ger</subfield><subfield code="e">rakddb</subfield></datafield><datafield tag="041" ind1="0" ind2=" "><subfield code="a">eng</subfield></datafield><datafield tag="044" ind1=" " ind2=" "><subfield code="a">gw</subfield><subfield code="c">XA-DE-BE</subfield></datafield><datafield tag="049" ind1=" " ind2=" "><subfield code="a">DE-29T</subfield><subfield code="a">DE-473</subfield><subfield code="a">DE-91</subfield><subfield code="a">DE-Aug4</subfield></datafield><datafield tag="050" ind1=" " ind2="0"><subfield code="a">TK7895.E42</subfield></datafield><datafield tag="082" ind1="0" ind2=" "><subfield code="a">005.82</subfield><subfield code="2">22</subfield></datafield><datafield tag="084" ind1=" " ind2=" "><subfield code="a">ST 276</subfield><subfield code="0">(DE-625)143642:</subfield><subfield code="2">rvk</subfield></datafield><datafield tag="084" ind1=" " ind2=" "><subfield code="a">ZN 6025</subfield><subfield code="0">(DE-625)157494:</subfield><subfield code="2">rvk</subfield></datafield><datafield tag="084" ind1=" " ind2=" "><subfield code="a">DAT 465f</subfield><subfield code="2">stub</subfield></datafield><datafield tag="084" ind1=" " ind2=" "><subfield code="a">620</subfield><subfield code="2">sdnb</subfield></datafield><datafield tag="245" ind1="1" ind2="0"><subfield code="a">Cryptographic engineering</subfield><subfield code="c">Çetin Kaya Koç, editor</subfield></datafield><datafield tag="264" ind1=" " ind2="1"><subfield code="a">New York, NY</subfield><subfield code="b">Springer</subfield><subfield code="c">[2009]</subfield></datafield><datafield tag="300" ind1=" " ind2=" "><subfield code="a">xxii, 517 Seiten</subfield><subfield code="b">Illustrationen, Diagramme</subfield><subfield code="c">229 mm x 152 mm</subfield></datafield><datafield tag="336" ind1=" " ind2=" "><subfield code="b">txt</subfield><subfield code="2">rdacontent</subfield></datafield><datafield tag="337" ind1=" " ind2=" "><subfield code="b">n</subfield><subfield code="2">rdamedia</subfield></datafield><datafield tag="338" ind1=" " ind2=" "><subfield code="b">nc</subfield><subfield code="2">rdacarrier</subfield></datafield><datafield tag="650" ind1=" " ind2="4"><subfield code="a">Cryptography</subfield></datafield><datafield tag="650" ind1=" " ind2="4"><subfield code="a">Data encryption (Computer science)</subfield></datafield><datafield tag="650" ind1=" " ind2="4"><subfield code="a">Embedded computer systems</subfield><subfield code="x">Design</subfield></datafield><datafield tag="650" ind1="0" ind2="7"><subfield code="a">Design</subfield><subfield code="0">(DE-588)4011510-0</subfield><subfield code="2">gnd</subfield><subfield code="9">rswk-swf</subfield></datafield><datafield tag="650" ind1="0" ind2="7"><subfield code="a">Eingebettetes System</subfield><subfield code="0">(DE-588)4396978-1</subfield><subfield code="2">gnd</subfield><subfield code="9">rswk-swf</subfield></datafield><datafield tag="650" ind1="0" ind2="7"><subfield code="a">Technische Anlage</subfield><subfield code="0">(DE-588)4059220-0</subfield><subfield code="2">gnd</subfield><subfield code="9">rswk-swf</subfield></datafield><datafield tag="650" ind1="0" ind2="7"><subfield code="a">Kryptologie</subfield><subfield code="0">(DE-588)4033329-2</subfield><subfield code="2">gnd</subfield><subfield code="9">rswk-swf</subfield></datafield><datafield tag="650" ind1="0" ind2="7"><subfield code="a">Implementierung</subfield><subfield code="g">Informatik</subfield><subfield code="0">(DE-588)4026663-1</subfield><subfield code="2">gnd</subfield><subfield code="9">rswk-swf</subfield></datafield><datafield tag="650" ind1="0" ind2="7"><subfield code="a">Datenstruktur</subfield><subfield code="0">(DE-588)4011146-5</subfield><subfield code="2">gnd</subfield><subfield code="9">rswk-swf</subfield></datafield><datafield tag="655" ind1=" " ind2="7"><subfield code="0">(DE-588)4143389-0</subfield><subfield code="a">Aufgabensammlung</subfield><subfield code="2">gnd-content</subfield></datafield><datafield tag="655" ind1=" " ind2="7"><subfield code="0">(DE-588)4143413-4</subfield><subfield code="a">Aufsatzsammlung</subfield><subfield code="2">gnd-content</subfield></datafield><datafield tag="689" ind1="0" ind2="0"><subfield code="a">Technische Anlage</subfield><subfield code="0">(DE-588)4059220-0</subfield><subfield code="D">s</subfield></datafield><datafield tag="689" ind1="0" ind2="1"><subfield code="a">Datenstruktur</subfield><subfield code="0">(DE-588)4011146-5</subfield><subfield code="D">s</subfield></datafield><datafield tag="689" ind1="0" ind2=" "><subfield code="5">DE-604</subfield></datafield><datafield tag="689" ind1="1" ind2="0"><subfield code="a">Eingebettetes System</subfield><subfield code="0">(DE-588)4396978-1</subfield><subfield code="D">s</subfield></datafield><datafield tag="689" ind1="1" ind2="1"><subfield code="a">Design</subfield><subfield code="0">(DE-588)4011510-0</subfield><subfield code="D">s</subfield></datafield><datafield tag="689" ind1="1" ind2=" "><subfield code="5">DE-604</subfield></datafield><datafield tag="689" ind1="2" ind2="0"><subfield code="a">Kryptologie</subfield><subfield code="0">(DE-588)4033329-2</subfield><subfield code="D">s</subfield></datafield><datafield tag="689" ind1="2" ind2="1"><subfield code="a">Implementierung</subfield><subfield code="g">Informatik</subfield><subfield code="0">(DE-588)4026663-1</subfield><subfield code="D">s</subfield></datafield><datafield tag="689" ind1="2" ind2=" "><subfield code="8">1\p</subfield><subfield code="5">DE-604</subfield></datafield><datafield tag="700" ind1="1" ind2=" "><subfield code="a">Koç, Çetin Kaya</subfield><subfield code="d">1957-</subfield><subfield code="0">(DE-588)121427536</subfield><subfield code="4">edt</subfield></datafield><datafield tag="776" ind1="1" ind2="8"><subfield code="i">Erscheint auch als</subfield><subfield code="n">Online-Ausgabe</subfield><subfield code="z">978-0-387-71817-0</subfield></datafield><datafield tag="856" ind1="4" ind2="2"><subfield code="m">Digitalisierung UB Bamberg</subfield><subfield code="q">application/pdf</subfield><subfield code="u">http://bvbr.bib-bvb.de:8991/F?func=service&doc_library=BVB01&local_base=BVB01&doc_number=017142354&sequence=000002&line_number=0001&func_code=DB_RECORDS&service_type=MEDIA</subfield><subfield code="3">Inhaltsverzeichnis</subfield></datafield><datafield tag="999" ind1=" " ind2=" "><subfield code="a">oai:aleph.bib-bvb.de:BVB01-017142354</subfield></datafield><datafield tag="883" ind1="1" ind2=" "><subfield code="8">1\p</subfield><subfield code="a">cgwrk</subfield><subfield code="d">20201028</subfield><subfield code="q">DE-101</subfield><subfield code="u">https://d-nb.info/provenance/plan#cgwrk</subfield></datafield></record></collection>
genre	(DE-588)4143389-0 Aufgabensammlung gnd-content (DE-588)4143413-4 Aufsatzsammlung gnd-content
genre_facet	Aufgabensammlung Aufsatzsammlung
id	DE-604.BV035338008
illustrated	Illustrated
indexdate	2024-07-09T21:31:36Z
institution	BVB
isbn	9780387718163
language	English
oai_aleph_id	oai:aleph.bib-bvb.de:BVB01-017142354
oclc_num	729575565
open_access_boolean
owner	DE-29T DE-473 DE-BY-UBG DE-91 DE-BY-TUM DE-Aug4
owner_facet	DE-29T DE-473 DE-BY-UBG DE-91 DE-BY-TUM DE-Aug4
physical	xxii, 517 Seiten Illustrationen, Diagramme 229 mm x 152 mm
publishDate	2009
publishDateSearch	2009
publishDateSort	2009
publisher	Springer
record_format	marc
spelling	Cryptographic engineering Çetin Kaya Koç, editor New York, NY Springer [2009] xxii, 517 Seiten Illustrationen, Diagramme 229 mm x 152 mm txt rdacontent n rdamedia nc rdacarrier Cryptography Data encryption (Computer science) Embedded computer systems Design Design (DE-588)4011510-0 gnd rswk-swf Eingebettetes System (DE-588)4396978-1 gnd rswk-swf Technische Anlage (DE-588)4059220-0 gnd rswk-swf Kryptologie (DE-588)4033329-2 gnd rswk-swf Implementierung Informatik (DE-588)4026663-1 gnd rswk-swf Datenstruktur (DE-588)4011146-5 gnd rswk-swf (DE-588)4143389-0 Aufgabensammlung gnd-content (DE-588)4143413-4 Aufsatzsammlung gnd-content Technische Anlage (DE-588)4059220-0 s Datenstruktur (DE-588)4011146-5 s DE-604 Eingebettetes System (DE-588)4396978-1 s Design (DE-588)4011510-0 s Kryptologie (DE-588)4033329-2 s Implementierung Informatik (DE-588)4026663-1 s 1\p DE-604 Koç, Çetin Kaya 1957- (DE-588)121427536 edt Erscheint auch als Online-Ausgabe 978-0-387-71817-0 Digitalisierung UB Bamberg application/pdf http://bvbr.bib-bvb.de:8991/F?func=service&doc_library=BVB01&local_base=BVB01&doc_number=017142354&sequence=000002&line_number=0001&func_code=DB_RECORDS&service_type=MEDIA Inhaltsverzeichnis 1\p cgwrk 20201028 DE-101 https://d-nb.info/provenance/plan#cgwrk
spellingShingle	Cryptographic engineering Cryptography Data encryption (Computer science) Embedded computer systems Design Design (DE-588)4011510-0 gnd Eingebettetes System (DE-588)4396978-1 gnd Technische Anlage (DE-588)4059220-0 gnd Kryptologie (DE-588)4033329-2 gnd Implementierung Informatik (DE-588)4026663-1 gnd Datenstruktur (DE-588)4011146-5 gnd
subject_GND	(DE-588)4011510-0 (DE-588)4396978-1 (DE-588)4059220-0 (DE-588)4033329-2 (DE-588)4026663-1 (DE-588)4011146-5 (DE-588)4143389-0 (DE-588)4143413-4
title	Cryptographic engineering
title_auth	Cryptographic engineering
title_exact_search	Cryptographic engineering
title_full	Cryptographic engineering Çetin Kaya Koç, editor
title_fullStr	Cryptographic engineering Çetin Kaya Koç, editor
title_full_unstemmed	Cryptographic engineering Çetin Kaya Koç, editor
title_short	Cryptographic engineering
title_sort	cryptographic engineering
topic	Cryptography Data encryption (Computer science) Embedded computer systems Design Design (DE-588)4011510-0 gnd Eingebettetes System (DE-588)4396978-1 gnd Technische Anlage (DE-588)4059220-0 gnd Kryptologie (DE-588)4033329-2 gnd Implementierung Informatik (DE-588)4026663-1 gnd Datenstruktur (DE-588)4011146-5 gnd
topic_facet	Cryptography Data encryption (Computer science) Embedded computer systems Design Design Eingebettetes System Technische Anlage Kryptologie Implementierung Informatik Datenstruktur Aufgabensammlung Aufsatzsammlung
url	http://bvbr.bib-bvb.de:8991/F?func=service&doc_library=BVB01&local_base=BVB01&doc_number=017142354&sequence=000002&line_number=0001&func_code=DB_RECORDS&service_type=MEDIA
work_keys_str_mv	AT koccetinkaya cryptographicengineering

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