VLSI network design:
Gespeichert in:
1. Verfasser: | |
---|---|
Format: | Buch |
Sprache: | English |
Veröffentlicht: |
Berlin
Freie Univ., Fachbereich Mathematik
1992
|
Schriftenreihe: | Freie Universität Berlin, Fachbereich Mathematik
Ser. B ; 92,24 |
Schlagworte: | |
Beschreibung: | 70, [34] S. graph. Darst. |
Internformat
MARC
LEADER | 00000nam a2200000 cb4500 | ||
---|---|---|---|
001 | BV026108951 | ||
003 | DE-604 | ||
005 | 20241111 | ||
007 | t | ||
008 | 110326s1992 d||| |||| 00||| eng d | ||
015 | |a 93,B17,0578 |2 dnb | ||
035 | |a (OCoLC)75324162 | ||
035 | |a (DE-599)BVBBV026108951 | ||
040 | |a DE-604 |b ger |e rakwb | ||
041 | 0 | |a eng | |
049 | |a DE-188 | ||
100 | 1 | |a Möhring, Rolf H. |e Verfasser |4 aut | |
245 | 1 | 0 | |a VLSI network design |c Rolf H. Möhring ; Dorothea Wagner ; Frank Wagner |
264 | 1 | |a Berlin |b Freie Univ., Fachbereich Mathematik |c 1992 | |
300 | |a 70, [34] S. |b graph. Darst. | ||
336 | |b txt |2 rdacontent | ||
337 | |b n |2 rdamedia | ||
338 | |b nc |2 rdacarrier | ||
490 | 1 | |a Freie Universität Berlin, Fachbereich Mathematik : Ser. B |v 92,24 | |
650 | 0 | 7 | |a Schaltungsentwurf |0 (DE-588)4179389-4 |2 gnd |9 rswk-swf |
650 | 0 | 7 | |a VLSI |0 (DE-588)4117388-0 |2 gnd |9 rswk-swf |
689 | 0 | 0 | |a VLSI |0 (DE-588)4117388-0 |D s |
689 | 0 | 1 | |a Schaltungsentwurf |0 (DE-588)4179389-4 |D s |
689 | 0 | |5 DE-188 | |
700 | 1 | |a Wagner, Dorothea |e Sonstige |4 oth | |
700 | 1 | |a Wagner, Frank |e Sonstige |4 oth | |
830 | 0 | |a Freie Universität Berlin, Fachbereich Mathematik |v Ser. B ; 92,24 |w (DE-604)BV024368863 |9 92,24 | |
943 | 1 | |a oai:aleph.bib-bvb.de:BVB01-021701128 |
Datensatz im Suchindex
_version_ | 1815438735427239936 |
---|---|
adam_text | |
any_adam_object | |
author | Möhring, Rolf H. |
author_facet | Möhring, Rolf H. |
author_role | aut |
author_sort | Möhring, Rolf H. |
author_variant | r h m rh rhm |
building | Verbundindex |
bvnumber | BV026108951 |
ctrlnum | (OCoLC)75324162 (DE-599)BVBBV026108951 |
format | Book |
fullrecord | <?xml version="1.0" encoding="UTF-8"?><collection xmlns="http://www.loc.gov/MARC21/slim"><record><leader>00000nam a2200000 cb4500</leader><controlfield tag="001">BV026108951</controlfield><controlfield tag="003">DE-604</controlfield><controlfield tag="005">20241111</controlfield><controlfield tag="007">t</controlfield><controlfield tag="008">110326s1992 d||| |||| 00||| eng d</controlfield><datafield tag="015" ind1=" " ind2=" "><subfield code="a">93,B17,0578</subfield><subfield code="2">dnb</subfield></datafield><datafield tag="035" ind1=" " ind2=" "><subfield code="a">(OCoLC)75324162</subfield></datafield><datafield tag="035" ind1=" " ind2=" "><subfield code="a">(DE-599)BVBBV026108951</subfield></datafield><datafield tag="040" ind1=" " ind2=" "><subfield code="a">DE-604</subfield><subfield code="b">ger</subfield><subfield code="e">rakwb</subfield></datafield><datafield tag="041" ind1="0" ind2=" "><subfield code="a">eng</subfield></datafield><datafield tag="049" ind1=" " ind2=" "><subfield code="a">DE-188</subfield></datafield><datafield tag="100" ind1="1" ind2=" "><subfield code="a">Möhring, Rolf H.</subfield><subfield code="e">Verfasser</subfield><subfield code="4">aut</subfield></datafield><datafield tag="245" ind1="1" ind2="0"><subfield code="a">VLSI network design</subfield><subfield code="c">Rolf H. Möhring ; Dorothea Wagner ; Frank Wagner</subfield></datafield><datafield tag="264" ind1=" " ind2="1"><subfield code="a">Berlin</subfield><subfield code="b">Freie Univ., Fachbereich Mathematik</subfield><subfield code="c">1992</subfield></datafield><datafield tag="300" ind1=" " ind2=" "><subfield code="a">70, [34] S.</subfield><subfield code="b">graph. Darst.</subfield></datafield><datafield tag="336" ind1=" " ind2=" "><subfield code="b">txt</subfield><subfield code="2">rdacontent</subfield></datafield><datafield tag="337" ind1=" " ind2=" "><subfield code="b">n</subfield><subfield code="2">rdamedia</subfield></datafield><datafield tag="338" ind1=" " ind2=" "><subfield code="b">nc</subfield><subfield code="2">rdacarrier</subfield></datafield><datafield tag="490" ind1="1" ind2=" "><subfield code="a">Freie Universität Berlin, Fachbereich Mathematik : Ser. B</subfield><subfield code="v">92,24</subfield></datafield><datafield tag="650" ind1="0" ind2="7"><subfield code="a">Schaltungsentwurf</subfield><subfield code="0">(DE-588)4179389-4</subfield><subfield code="2">gnd</subfield><subfield code="9">rswk-swf</subfield></datafield><datafield tag="650" ind1="0" ind2="7"><subfield code="a">VLSI</subfield><subfield code="0">(DE-588)4117388-0</subfield><subfield code="2">gnd</subfield><subfield code="9">rswk-swf</subfield></datafield><datafield tag="689" ind1="0" ind2="0"><subfield code="a">VLSI</subfield><subfield code="0">(DE-588)4117388-0</subfield><subfield code="D">s</subfield></datafield><datafield tag="689" ind1="0" ind2="1"><subfield code="a">Schaltungsentwurf</subfield><subfield code="0">(DE-588)4179389-4</subfield><subfield code="D">s</subfield></datafield><datafield tag="689" ind1="0" ind2=" "><subfield code="5">DE-188</subfield></datafield><datafield tag="700" ind1="1" ind2=" "><subfield code="a">Wagner, Dorothea</subfield><subfield code="e">Sonstige</subfield><subfield code="4">oth</subfield></datafield><datafield tag="700" ind1="1" ind2=" "><subfield code="a">Wagner, Frank</subfield><subfield code="e">Sonstige</subfield><subfield code="4">oth</subfield></datafield><datafield tag="830" ind1=" " ind2="0"><subfield code="a">Freie Universität Berlin, Fachbereich Mathematik</subfield><subfield code="v">Ser. B ; 92,24</subfield><subfield code="w">(DE-604)BV024368863</subfield><subfield code="9">92,24</subfield></datafield><datafield tag="943" ind1="1" ind2=" "><subfield code="a">oai:aleph.bib-bvb.de:BVB01-021701128</subfield></datafield></record></collection> |
id | DE-604.BV026108951 |
illustrated | Illustrated |
indexdate | 2024-11-11T15:01:34Z |
institution | BVB |
language | English |
oai_aleph_id | oai:aleph.bib-bvb.de:BVB01-021701128 |
oclc_num | 75324162 |
open_access_boolean | |
owner | DE-188 |
owner_facet | DE-188 |
physical | 70, [34] S. graph. Darst. |
publishDate | 1992 |
publishDateSearch | 1992 |
publishDateSort | 1992 |
publisher | Freie Univ., Fachbereich Mathematik |
record_format | marc |
series | Freie Universität Berlin, Fachbereich Mathematik |
series2 | Freie Universität Berlin, Fachbereich Mathematik : Ser. B |
spelling | Möhring, Rolf H. Verfasser aut VLSI network design Rolf H. Möhring ; Dorothea Wagner ; Frank Wagner Berlin Freie Univ., Fachbereich Mathematik 1992 70, [34] S. graph. Darst. txt rdacontent n rdamedia nc rdacarrier Freie Universität Berlin, Fachbereich Mathematik : Ser. B 92,24 Schaltungsentwurf (DE-588)4179389-4 gnd rswk-swf VLSI (DE-588)4117388-0 gnd rswk-swf VLSI (DE-588)4117388-0 s Schaltungsentwurf (DE-588)4179389-4 s DE-188 Wagner, Dorothea Sonstige oth Wagner, Frank Sonstige oth Freie Universität Berlin, Fachbereich Mathematik Ser. B ; 92,24 (DE-604)BV024368863 92,24 |
spellingShingle | Möhring, Rolf H. VLSI network design Freie Universität Berlin, Fachbereich Mathematik Schaltungsentwurf (DE-588)4179389-4 gnd VLSI (DE-588)4117388-0 gnd |
subject_GND | (DE-588)4179389-4 (DE-588)4117388-0 |
title | VLSI network design |
title_auth | VLSI network design |
title_exact_search | VLSI network design |
title_full | VLSI network design Rolf H. Möhring ; Dorothea Wagner ; Frank Wagner |
title_fullStr | VLSI network design Rolf H. Möhring ; Dorothea Wagner ; Frank Wagner |
title_full_unstemmed | VLSI network design Rolf H. Möhring ; Dorothea Wagner ; Frank Wagner |
title_short | VLSI network design |
title_sort | vlsi network design |
topic | Schaltungsentwurf (DE-588)4179389-4 gnd VLSI (DE-588)4117388-0 gnd |
topic_facet | Schaltungsentwurf VLSI |
volume_link | (DE-604)BV024368863 |
work_keys_str_mv | AT mohringrolfh vlsinetworkdesign AT wagnerdorothea vlsinetworkdesign AT wagnerfrank vlsinetworkdesign |