Formal description of parallel computer: architectures as a basis of optimizing code generation
Gespeichert in:
| 1. Verfasser: | |
|---|---|
| Format: | Abschlussarbeit Buch |
| Sprache: | English |
| Veröffentlicht: |
München
1993
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| Schlagworte: | |
| Beschreibung: | 186 S. Ill. |
Internformat
MARC
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Datensatz im Suchindex
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| any_adam_object | |
| author | Heinrich, Werner |
| author_facet | Heinrich, Werner |
| author_role | aut |
| author_sort | Heinrich, Werner |
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| building | Verbundindex |
| bvnumber | BV024785160 |
| ctrlnum | (OCoLC)916749678 (DE-599)BVBBV024785160 |
| format | Thesis Book |
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| indexdate | 2024-07-09T22:21:11Z |
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| language | English |
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| spelling | Heinrich, Werner Verfasser aut Formal description of parallel computer architectures as a basis of optimizing code generation München 1993 186 S. Ill. txt rdacontent n rdamedia nc rdacarrier München, Techn. Univ., Fak. für Informatik, Diss., 1993 Parallelrechner (DE-588)4173280-7 gnd rswk-swf Codegenerierung (DE-588)4010346-8 gnd rswk-swf Formale Spezifikationstechnik (DE-588)4299725-2 gnd rswk-swf (DE-588)4113937-9 Hochschulschrift gnd-content Codegenerierung (DE-588)4010346-8 s Parallelrechner (DE-588)4173280-7 s Formale Spezifikationstechnik (DE-588)4299725-2 s DE-604 |
| spellingShingle | Heinrich, Werner Formal description of parallel computer architectures as a basis of optimizing code generation Parallelrechner (DE-588)4173280-7 gnd Codegenerierung (DE-588)4010346-8 gnd Formale Spezifikationstechnik (DE-588)4299725-2 gnd |
| subject_GND | (DE-588)4173280-7 (DE-588)4010346-8 (DE-588)4299725-2 (DE-588)4113937-9 |
| title | Formal description of parallel computer architectures as a basis of optimizing code generation |
| title_auth | Formal description of parallel computer architectures as a basis of optimizing code generation |
| title_exact_search | Formal description of parallel computer architectures as a basis of optimizing code generation |
| title_full | Formal description of parallel computer architectures as a basis of optimizing code generation |
| title_fullStr | Formal description of parallel computer architectures as a basis of optimizing code generation |
| title_full_unstemmed | Formal description of parallel computer architectures as a basis of optimizing code generation |
| title_short | Formal description of parallel computer |
| title_sort | formal description of parallel computer architectures as a basis of optimizing code generation |
| title_sub | architectures as a basis of optimizing code generation |
| topic | Parallelrechner (DE-588)4173280-7 gnd Codegenerierung (DE-588)4010346-8 gnd Formale Spezifikationstechnik (DE-588)4299725-2 gnd |
| topic_facet | Parallelrechner Codegenerierung Formale Spezifikationstechnik Hochschulschrift |
| work_keys_str_mv | AT heinrichwerner formaldescriptionofparallelcomputerarchitecturesasabasisofoptimizingcodegeneration |