VLSI algorithms and architectures:
Gespeichert in:
| Weitere Verfasser: | |
|---|---|
| Format: | Buch |
| Sprache: | Undetermined |
| Veröffentlicht: |
Los Alamitos, Calif. [u.a.]
IEEE Computer Soc. Pr.
|
| Schlagworte: | |
| Beschreibung: | 31 cm |
Internformat
MARC
| LEADER | 00000nam a2200000zca4500 | ||
|---|---|---|---|
| 001 | BV023698436 | ||
| 003 | DE-604 | ||
| 005 | 19981113000000.0 | ||
| 007 | t | ||
| 008 | 941221nuuuuuuuu |||| 00||| und d | ||
| 035 | |a (DE-599)BVBBV023698436 | ||
| 040 | |a DE-604 |b ger | ||
| 041 | |a und | ||
| 245 | 1 | 0 | |a VLSI algorithms and architectures |c N. Ranganathan |
| 264 | 1 | |a Los Alamitos, Calif. [u.a.] |b IEEE Computer Soc. Pr. | |
| 300 | |a 31 cm | ||
| 336 | |b txt |2 rdacontent | ||
| 337 | |b n |2 rdamedia | ||
| 338 | |b nc |2 rdacarrier | ||
| 650 | 0 | 7 | |a VLSI |0 (DE-588)4117388-0 |2 gnd |9 rswk-swf |
| 655 | 7 | |0 (DE-588)4143413-4 |a Aufsatzsammlung |2 gnd-content | |
| 689 | 0 | 0 | |a VLSI |0 (DE-588)4117388-0 |D s |
| 689 | 0 | |5 DE-604 | |
| 700 | 1 | |a Ranganathan, N. |4 edt | |
| 999 | |a oai:aleph.bib-bvb.de:BVB01-017199003 | ||
Datensatz im Suchindex
| _version_ | 1804138723521069056 |
|---|---|
| any_adam_object | |
| author2 | Ranganathan, N. |
| author2_role | edt |
| author2_variant | n r nr |
| author_facet | Ranganathan, N. |
| building | Verbundindex |
| bvnumber | BV023698436 |
| ctrlnum | (DE-599)BVBBV023698436 |
| format | Book |
| fullrecord | <?xml version="1.0" encoding="UTF-8"?><collection xmlns="http://www.loc.gov/MARC21/slim"><record><leader>00774nam a2200265zca4500</leader><controlfield tag="001">BV023698436</controlfield><controlfield tag="003">DE-604</controlfield><controlfield tag="005">19981113000000.0</controlfield><controlfield tag="007">t</controlfield><controlfield tag="008">941221nuuuuuuuu |||| 00||| und d</controlfield><datafield tag="035" ind1=" " ind2=" "><subfield code="a">(DE-599)BVBBV023698436</subfield></datafield><datafield tag="040" ind1=" " ind2=" "><subfield code="a">DE-604</subfield><subfield code="b">ger</subfield></datafield><datafield tag="041" ind1=" " ind2=" "><subfield code="a">und</subfield></datafield><datafield tag="245" ind1="1" ind2="0"><subfield code="a">VLSI algorithms and architectures</subfield><subfield code="c">N. Ranganathan</subfield></datafield><datafield tag="264" ind1=" " ind2="1"><subfield code="a">Los Alamitos, Calif. [u.a.]</subfield><subfield code="b">IEEE Computer Soc. Pr.</subfield></datafield><datafield tag="300" ind1=" " ind2=" "><subfield code="a">31 cm</subfield></datafield><datafield tag="336" ind1=" " ind2=" "><subfield code="b">txt</subfield><subfield code="2">rdacontent</subfield></datafield><datafield tag="337" ind1=" " ind2=" "><subfield code="b">n</subfield><subfield code="2">rdamedia</subfield></datafield><datafield tag="338" ind1=" " ind2=" "><subfield code="b">nc</subfield><subfield code="2">rdacarrier</subfield></datafield><datafield tag="650" ind1="0" ind2="7"><subfield code="a">VLSI</subfield><subfield code="0">(DE-588)4117388-0</subfield><subfield code="2">gnd</subfield><subfield code="9">rswk-swf</subfield></datafield><datafield tag="655" ind1=" " ind2="7"><subfield code="0">(DE-588)4143413-4</subfield><subfield code="a">Aufsatzsammlung</subfield><subfield code="2">gnd-content</subfield></datafield><datafield tag="689" ind1="0" ind2="0"><subfield code="a">VLSI</subfield><subfield code="0">(DE-588)4117388-0</subfield><subfield code="D">s</subfield></datafield><datafield tag="689" ind1="0" ind2=" "><subfield code="5">DE-604</subfield></datafield><datafield tag="700" ind1="1" ind2=" "><subfield code="a">Ranganathan, N.</subfield><subfield code="4">edt</subfield></datafield><datafield tag="999" ind1=" " ind2=" "><subfield code="a">oai:aleph.bib-bvb.de:BVB01-017199003</subfield></datafield></record></collection> |
| genre | (DE-588)4143413-4 Aufsatzsammlung gnd-content |
| genre_facet | Aufsatzsammlung |
| id | DE-604.BV023698436 |
| illustrated | Not Illustrated |
| indexdate | 2024-07-09T21:32:43Z |
| institution | BVB |
| language | Undetermined |
| oai_aleph_id | oai:aleph.bib-bvb.de:BVB01-017199003 |
| open_access_boolean | |
| physical | 31 cm |
| publishDateSort | 0000 |
| publisher | IEEE Computer Soc. Pr. |
| record_format | marc |
| spelling | VLSI algorithms and architectures N. Ranganathan Los Alamitos, Calif. [u.a.] IEEE Computer Soc. Pr. 31 cm txt rdacontent n rdamedia nc rdacarrier VLSI (DE-588)4117388-0 gnd rswk-swf (DE-588)4143413-4 Aufsatzsammlung gnd-content VLSI (DE-588)4117388-0 s DE-604 Ranganathan, N. edt |
| spellingShingle | VLSI algorithms and architectures VLSI (DE-588)4117388-0 gnd |
| subject_GND | (DE-588)4117388-0 (DE-588)4143413-4 |
| title | VLSI algorithms and architectures |
| title_auth | VLSI algorithms and architectures |
| title_exact_search | VLSI algorithms and architectures |
| title_full | VLSI algorithms and architectures N. Ranganathan |
| title_fullStr | VLSI algorithms and architectures N. Ranganathan |
| title_full_unstemmed | VLSI algorithms and architectures N. Ranganathan |
| title_short | VLSI algorithms and architectures |
| title_sort | vlsi algorithms and architectures |
| topic | VLSI (DE-588)4117388-0 gnd |
| topic_facet | VLSI Aufsatzsammlung |
| work_keys_str_mv | AT ranganathann vlsialgorithmsandarchitectures |