Design recipes for FPGAs:
Saved in:
| Main Author: | |
|---|---|
| Format: | Book |
| Language: | English |
| Published: |
Amsterdam [u.a.]
Elsevier, Newnes
2007
|
| Series: | Embedded technology series
|
| Subjects: | |
| Item Description: | Includes bibliographical references and index |
| Physical Description: | XXII, 289 S. Ill., graph. Darst. 25 cm 1 CD-ROM |
| ISBN: | 0750668458 9780750668453 |
Staff View
MARC
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| 245 | 1 | 0 | |a Design recipes for FPGAs |c Peter R. Wilson |
| 264 | 1 | |a Amsterdam [u.a.] |b Elsevier, Newnes |c 2007 | |
| 300 | |a XXII, 289 S. |b Ill., graph. Darst. |c 25 cm |e 1 CD-ROM | ||
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| 490 | 0 | |a Embedded technology series | |
| 500 | |a Includes bibliographical references and index | ||
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| 650 | 0 | 7 | |a VHDL |0 (DE-588)4254792-1 |2 gnd |9 rswk-swf |
| 650 | 0 | 7 | |a VERILOG |0 (DE-588)4268385-3 |2 gnd |9 rswk-swf |
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| 999 | |a oai:aleph.bib-bvb.de:BVB01-016542238 | ||
| 883 | 1 | |8 1\p |a cgwrk |d 20201028 |q DE-101 |u https://d-nb.info/provenance/plan#cgwrk | |
Record in the Search Index
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| discipline | Elektrotechnik / Elektronik / Nachrichtentechnik |
| discipline_str_mv | Elektrotechnik / Elektronik / Nachrichtentechnik |
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| id | DE-604.BV023358746 |
| illustrated | Illustrated |
| index_date | 2024-07-02T21:08:19Z |
| indexdate | 2024-07-09T21:16:47Z |
| institution | BVB |
| isbn | 0750668458 9780750668453 |
| language | English |
| oai_aleph_id | oai:aleph.bib-bvb.de:BVB01-016542238 |
| oclc_num | 85829383 |
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| owner | DE-858 DE-634 |
| owner_facet | DE-858 DE-634 |
| physical | XXII, 289 S. Ill., graph. Darst. 25 cm 1 CD-ROM |
| publishDate | 2007 |
| publishDateSearch | 2007 |
| publishDateSort | 2007 |
| publisher | Elsevier, Newnes |
| record_format | marc |
| series2 | Embedded technology series |
| spelling | Wilson, Peter R. Verfasser (DE-588)139125167 aut Design recipes for FPGAs Peter R. Wilson Amsterdam [u.a.] Elsevier, Newnes 2007 XXII, 289 S. Ill., graph. Darst. 25 cm 1 CD-ROM txt rdacontent n rdamedia nc rdacarrier Embedded technology series Includes bibliographical references and index Field programmable gate arrays Design and construction Field programmable gate array (DE-588)4347749-5 gnd rswk-swf VHDL (DE-588)4254792-1 gnd rswk-swf VERILOG (DE-588)4268385-3 gnd rswk-swf Field programmable gate array (DE-588)4347749-5 s VERILOG (DE-588)4268385-3 s VHDL (DE-588)4254792-1 s 1\p DE-604 1\p cgwrk 20201028 DE-101 https://d-nb.info/provenance/plan#cgwrk |
| spellingShingle | Wilson, Peter R. Design recipes for FPGAs Field programmable gate arrays Design and construction Field programmable gate array (DE-588)4347749-5 gnd VHDL (DE-588)4254792-1 gnd VERILOG (DE-588)4268385-3 gnd |
| subject_GND | (DE-588)4347749-5 (DE-588)4254792-1 (DE-588)4268385-3 |
| title | Design recipes for FPGAs |
| title_auth | Design recipes for FPGAs |
| title_exact_search | Design recipes for FPGAs |
| title_exact_search_txtP | Design recipes for FPGAs |
| title_full | Design recipes for FPGAs Peter R. Wilson |
| title_fullStr | Design recipes for FPGAs Peter R. Wilson |
| title_full_unstemmed | Design recipes for FPGAs Peter R. Wilson |
| title_short | Design recipes for FPGAs |
| title_sort | design recipes for fpgas |
| topic | Field programmable gate arrays Design and construction Field programmable gate array (DE-588)4347749-5 gnd VHDL (DE-588)4254792-1 gnd VERILOG (DE-588)4268385-3 gnd |
| topic_facet | Field programmable gate arrays Design and construction Field programmable gate array VHDL VERILOG |
| work_keys_str_mv | AT wilsonpeterr designrecipesforfpgas |