Communication system design using DSP algorithms: with laboratory experiments for the TMS320C6713 DSK
Gespeichert in:
1. Verfasser: | |
---|---|
Format: | Buch |
Sprache: | English |
Veröffentlicht: |
New York
Springer
2008
|
Ausgabe: | 3. ed. |
Schriftenreihe: | Information technology: transmission, processing, and storage
|
Schlagworte: | |
Online-Zugang: | Inhaltsverzeichnis |
Beschreibung: | XX, 344 S. Ill. |
ISBN: | 9780387748856 0387748857 |
Internformat
MARC
LEADER | 00000nam a2200000 c 4500 | ||
---|---|---|---|
001 | BV023350885 | ||
003 | DE-604 | ||
005 | 20080710 | ||
007 | t | ||
008 | 080618s2008 a||| |||| 00||| eng d | ||
015 | |a 07N360594 |2 dnb | ||
016 | 7 | |a 985306270 |2 DE-101 | |
020 | |a 9780387748856 |c : ca. EUR 102.99 (freier Pr.) |9 978-0-387-74885-6 | ||
020 | |a 0387748857 |c : ca. EUR 102.99 (freier Pr.) |9 0-387-74885-7 | ||
035 | |a (OCoLC)255796044 | ||
035 | |a (DE-599)DNB985306270 | ||
040 | |a DE-604 |b ger | ||
041 | 0 | |a eng | |
049 | |a DE-92 |a DE-M347 | ||
084 | |a ZN 6040 |0 (DE-625)157496: |2 rvk | ||
084 | |a 620 |2 sdnb | ||
100 | 1 | |a Tretter, Steven A. |e Verfasser |4 aut | |
245 | 1 | 0 | |a Communication system design using DSP algorithms |b with laboratory experiments for the TMS320C6713 DSK |c Steven A. Tretter |
250 | |a 3. ed. | ||
264 | 1 | |a New York |b Springer |c 2008 | |
300 | |a XX, 344 S. |b Ill. | ||
336 | |b txt |2 rdacontent | ||
337 | |b n |2 rdamedia | ||
338 | |b nc |2 rdacarrier | ||
490 | 0 | |a Information technology: transmission, processing, and storage | |
650 | 4 | |a Datenverarbeitung | |
650 | 4 | |a Real-time data processing | |
650 | 4 | |a Signal processing |x Digital techniques |x Data processing | |
650 | 4 | |a Texas Instruments TMS320 series microprocessors | |
650 | 0 | 7 | |a Algorithmus |0 (DE-588)4001183-5 |2 gnd |9 rswk-swf |
650 | 0 | 7 | |a Datenübertragung |0 (DE-588)4011150-7 |2 gnd |9 rswk-swf |
650 | 0 | 7 | |a Digitale Signalverarbeitung |0 (DE-588)4113314-6 |2 gnd |9 rswk-swf |
689 | 0 | 0 | |a Datenübertragung |0 (DE-588)4011150-7 |D s |
689 | 0 | 1 | |a Digitale Signalverarbeitung |0 (DE-588)4113314-6 |D s |
689 | 0 | 2 | |a Algorithmus |0 (DE-588)4001183-5 |D s |
689 | 0 | |5 DE-604 | |
856 | 4 | 2 | |m GBV Datenaustausch |q application/pdf |u http://bvbr.bib-bvb.de:8991/F?func=service&doc_library=BVB01&local_base=BVB01&doc_number=016534499&sequence=000001&line_number=0001&func_code=DB_RECORDS&service_type=MEDIA |3 Inhaltsverzeichnis |
999 | |a oai:aleph.bib-bvb.de:BVB01-016534499 |
Datensatz im Suchindex
_version_ | 1804137708590727168 |
---|---|
adam_text | COMMUNICATION SYSTEM DESIGN USING DSP ALGORITHMS WITH LABORATORY
EXPERIMENTS FOR THE TMS320C6713* DSK STEVEN A. TRETTER UNIVERSITY OF
MARYLAND COLLEGE PARK, MD SPRINGER CONTENTS 1 OVERVIEW OF THE HARDWARE
AND SOFTWARE TOOLS 1 1.1 SOME DSP CHIP HISTORY AND TYPICAL APPLICATIONS
2 1.2 THE TMS320C6713 FLOATING-POINT DSP 6 1.2.1 THE C6000 CENTRAL
PROCESSING UNIT (CPU) 6 1.2.2 MEMORY ORGANIZATION FOR THE TMS320C6713
DSK 11 1.2.3 ENHANCED DIRECT MEMORY ACCESS CONTROLLER (EDMA) 11 1.2.4
SERIAL PORTS 12 1.2.5 OTHER INTERNAL PERIPHERALS 13 1.2.6 BRIEF
DESCRIPTION OF THE TMS320C6000 INSTRUCTION SET 13 1.2.7 PARALLEL
OPERATIONS AND PIPELINING 16 1.3 THE TMS320C6713 DSP STARTER KIT (DSK)
18 1.3.1 THE AUDIO INTERFACE ONBOARD THE TMS320C6713 DSK 20 1.4 SOFTWARE
SUPPORT FOR THE DSK BOARD AND C6X DSP S 21 1.4.1 THE BOARD SUPPORT
LIBRARY (BSL) 21 1.4.2 THE CHIP SUPPORT LIBRARY 22 1.5 CODE COMPOSER
STUDIO 22 1.5.1 PROJECT FILES AND BUILDING PROGRAMS 22 1.5.2 THE
OPTIMIZING COMPILER AND ASSEMBLER 23 1.5.3 THE LINKER 25 1.5.4 BUILDING
PROGRAMS FROM COMMAND LINE PROMPTS 25 1.5.5 THE ARCHIVER 26 1.5.6
ADDITIONAL CODE COMPOSER STUDIO FEATURES 26 1.6 OTHER SOFTWARE 27 1.6.1
DIGITAL FILTER DESIGN PROGRAMS 27 1.6.2 COMMERCIAL SOFTWARE 27 1.7
INTRODUCTORY EXPERIMENTS 28 2 LEARNING TO USE THE HARDWARE AND SOFTWARE
TOOLS 29 2.1 GETTING STARTED WITH A SIMPLE AUDIO LOOP THROUGH PROGRAM 29
2.1.1 A LINKER COMMAND FILE AND BEGINNING C PROGRAM 29 2.1.2 PROPERTIES
OF THE AIC23 CODEC 35 2.1.3 CREATING A CCS PROJECT FOR DSKSTART32.C 36
2.1.4 EXPERIMENT 2.1: BUILDING AND TESTING DSKSTART32. C 37 2.2 MORE
DETAILS ON THE MCBSP SERIAL PORTS AND CODECS 38 XIII XIV CONTENTS
2.2.1 BASIC MCBSP TRANSMITTER AND RECEIVER OPERATION 38 2.2.2 EXAMPLE C
CODE FOR READING FROM AND WRITING TO THE CODEC 41 2.3 THE C6000 TIMERS
42 2.4 GENERATING A SINE WAVE BY POLLING XRDY 43 2.4.1 EXPERIMENT 2.2:
INSTRUCTIONS FOR THE POLLING EXPERIMENT 45 2.5 GENERATING A SINE WAVE
USING INTERRUPTS 46 2.5.1 THE CPU INTERRUPT PRIORITIES AND SOURCES 46
2.5.2 INTERRUPT CONTROL REGISTERS 46 2.5.3 WHAT HAPPENS WHEN AN
INTERRUPT OCCURS 50 2.5.4 TI EXTENSIONS TO STANDARD C INTERRUPT SERVICE
ROUTINES 51 2.5.5 USING THE DSK6713BSL32 LIBRARY FOR INTERRUPTS 51 2.5.6
EXPERIMENT 2.3: GENERATING SINE WAVES BY USING INTERRUPTS 53 2.6
GENERATING A SINE WAVE WITH THE EDMA AND A TABLE 56 2.6.1 EDMA OVERVIEW
56 2.6.2 EDMA EVENT SELECTION 57 2.6.3 REGISTERS FOR EVENT PROCESSING 58
2.6.4 THE PARAMETER RAM (PARAM) 59 2.6.5 SYNCHRONIZATION OF EDMA
TRANSFERS 60 2.6.6 LINKING AND CHAINING EDMA TRANSFERS 61 2.6.7 EDMA
INTERRUPTS TO THE CPU 62 2.6.8 EXPERIMENT 2.4: GENERATING A SINE WAVE
USING THE EDMA CONTROLLER 62 3 DIGITAL FILTERS 67 3.1 DISCRETE-TIME
CONVOLUTION AND FREQUENCY RESPONSES 67 3.2 FINITE DURATION IMPULSE
RESPONSE (FIR) FILTERS 68 3.2.1 BLOCK DIAGRAM FOR MOST COMMON
REALIZATION 68 3.2.2 TWO METHODS FOR FINDING THE FILTER COEFFICIENTS TO
ACHIEVE A DESIRED FREQUENCY RESPONSE 69 3.3 USING CIRCULAR BUFFERS TO
IMPLEMENT FIR FILTERS IN C 72 3.4 CIRCULAR BUFFERS USING THE C6000
HARDWARE 75 3.4.1 HOW THE CIRCULAR BUFFER IS IMPLEMENTED 75 3.4.2
INDIRECT ADDRESSING THROUGH REGISTERS 76 3.5 INTERFACING C AND ASSEMBLY
FUNCTIONS 76 3.5.1 RESPONSIBILITIES OF THE CALLING AND CALLED FUNCTION
76 3.5.2 USING ASSEMBLY FUNCTIONS WITH C 79 3.6 LINEAR ASSEMBLY CODE AND
THE ASSEMBLY OPTIMIZER 79 3.6.1 A LINEAR ASSEMBLY CONVOLUTION FUNCTION
THAT USES A CIRCULAR BUFFER AND CAN BE CALLED FROM C 81 3.7 INFINITE
DURATION IMPULSE RESPONSE (HR) FILTERS 89 3.7.1 REALIZATIONS FOR HR
FILTERS 89 3.7.2 A PROGRAM FOR DESIGNING HR FILTERS 92 3.7.3 TWO METHODS
FOR MEASURING A PHASE RESPONSE 95 3.8 LABORATORY EXPERIMENTS FOR DIGITAL
FILTERS 96 3.8.1 EXPERIMENT 3.1: FIR FILTERS ENTIRELY IN C 96 CONTENTS
3.8.2 EXPERIMENT 3.2: FIR FILTERS USING C AND ASSEMBLY 97 3.8.3
EXPERIMENT 3.3: IMPLEMENTING AN HR FILTER 98 3.9 ADDITIONAL REFERENCES
98 4 THE FFT AND POWER SPECTRUM ESTIMATION 101 4.1 THE DISCRETE-TIME
FOURIER TRANSFORM 101 4.2 DATA WINDOW FUNCTIONS 102 4.3 THE DISCRETE
FOURIER TRANSFORM AND ITS INVERSE 104 4.4 THE FAST FOURIER TRANSFORM 104
4.5 USING THE FFT TO ESTIMATE A POWER SPECTRUM 112 4.6 LABORATORY
EXPERIMENTS 113 4.6.1 EXPERIMENT 4.1: FFT EXPERIMENTS 113 4.6.2
EXPERIMENT 4.2: MAKING A SPECTRUM ANALYZER 114 4.7 ADDITIONAL REFERENCES
118 5 AMPLITUDE MODULATION 121 5.1 THEORETICAL DESCRIPTION OF AMPLITUDE
MODULATION 121 5.1.1 MATHEMATICAL FORMULA FOR AN AM SIGNAL 121 5.1.2
EXAMPLE FOR SINGLE TONE MODULATION 122 5.1.3 THE SPECTRUM OF AN AM
SIGNAL 123 5.2 DEMODULATING AN AM SIGNAL BY ENVELOPE DETECTION 123 5.2.1
SQUARE-LAW DEMODULATION OF AM SIGNALS 124 5.2.2 HUBERT TRANSFORMS AND
THE COMPLEX ENVELOPE 125 5.3 LABORATORY EXPERIMENTS FOR AM MODULATION
AND DEMODULATION 127 5.3.1 EXPERIMENT 5.1: MAKING AN AM MODULATOR 128
5.3.2 HOW TO CAPTURE DSK OUTPUT SAMPLES WITH CCS FOR PLOTTING .... 129
5.3.3 EXPERIMENT 5.2: MAKING A SQUARE-LAW ENVELOPE DETECTOR 130 5.3.4
EXPERIMENT 5.3: MAKING AN ENVELOPE DETECTOR USING THE HUBERT TRANS- FORM
131 5.4 ADDITIONAL REFERENCES 132 6 DSBSC AMPLITUDE MODULATION AND
COHERENT DETECTION 133 6.1 MATHEMATICAL FORM FOR A DSBSC-AM SIGNAL 133
6.2 THE IDEAL COHERENT RECEIVER 134 6.3 THE COSTAS LOOP AS A PRACTICAL
APPROACH TO COHERENT DEMODULATION . . . . 136 6.4 EXERCISES AND
EXPERIMENTS FOR THE COSTAS LOOP 138 6.4.1 THEORETICAL DESIGN EXERCISES
139 6.4.2 HARDWARE EXPERIMENTS 140 6.5 ADDITIONAL REFERENCES 141 7
SINGLE-SIDEBAND MODULATION AND FREQUENCY TRANSLATION 143 7.1
SINGLE-SIDEBAND MODULATORS 143 7.2 COHERENT DEMODULATION OF SSB SIGNALS
145 7.3 FREQUENCY TRANSLATION 146 7.4 LABORATORY EXPERIMENTS 147 XVI
CONTENTS 7.4.1 EXPERIMENT 7.1: MAKING AN SSB MODULATOR 148 7.4.2
EXPERIMENT 7.2: COHERENT DEMODULATION OF AN SSB SIGNAL 148 7.5
ADDITIONAL REFERENCES 150 8 FREQUENCY MODULATION 151 8.1 THE FM SIGNAL
AND SOME OF ITS PROPERTIES 151 8.1.1 DEFINITION OF INSTANTANEOUS
FREQUENCY AND THE FM SIGNAL 151 8.1.2 SINGLE TONE FM MODULATION 152
8.1.3 NARROW BAND FM MODULATION 154 8.1.4 THE BANDWIDTH OF AN FM SIGNAL
154 8.2 FM DEMODULATION BY A FREQUENCY DISCRIMINATOR 154 8.2.1 AN FM
DISCRIMINATOR USING THE PRE-ENVELOPE 155 8.2.2 A DISCRIMINATOR USING THE
COMPLEX ENVELOPE 156 8.3 USING A PHASE-LOCKED LOOP FOR FM DEMODULATION
157 8.4 LABORATORY EXPERIMENTS FOR FREQUENCY MODULATION 160 8.4.1
EXPERIMENT 8.1: MEASURING THE SPECTRUM OF AN FM SIGNAL 160 8.4.2
EXPERIMENT 8.2: FM DEMODULATION USING A FREQUENCY DISCRIMINATOR 161
8.4.3 EXPERIMENT 8.3: USING A PHASE-LOCKED LOOP FOR FM DEMODULATION .
161 8.5 ADDITIONAL REFERENCES 162 9 PSEUDO-RANDOM BINARY SEQUENCES AND
DATA SCRAMBLERS 163 9.1 USING SHIFT REGISTERS TO GENERATE PSEUDO-RANDOM
BINARY SEQUENCES .... 164 9.1.1 THE LINEAR FEEDBACK SHIFT REGISTER
SEQUENCE GENERATOR 164 9.1.2 THE CONNECTION POLYNOMIAL AND SEQUENCE
PERIOD 165 9.1.3 PROPERTIES OF MAXIMAL LENGTH SEQUENCES 166 9.2 SEIF
SYNCHRONIZING DATA SCRAMBLERS 167 9.2.1 THE SCRAMBLER 167 9.2.2 THE
DESCRAMBLER 169 9.3 THEORETICAL AND SIMULATION EXERCISES 169 9.3.1
EXERCISES FOR A SHIFT REGISTER SEQUENCE GENERATOR WITH A PRIMITIVE
CONNECTION POLYNOMIAL 169 9.3.2 EXERCISES FOR A SHIFT REGISTER SEQUENCE
GENERATOR WITH AN IRREDUCIBLE BUT NOT PRIMITIVE CONNECTION POLYNOMIAL
170 9.3.3 EXERCISES FOR A SHIFT REGISTER SEQUENCE GENERATOR WITH A
REDUCIBLE CONNECTION POLYNOMIAL 171 9.4 ADDITIONAL REFERENCES 171 10 THE
RS-232C PROTOCOL AND A BIT-ERROR RATE TESTER 173 10.1 THE EIA RS-232C
SERIAL INTERFACE PROTOCOL 173 10.2 ERROR RATE FOR BINARY SIGNALING ON
THE GAUSSIAN NOISE CHANNEL 176 10.3 THE NAVTEL DATATEST 3 BIT ERROR RATE
TESTER 177 10.4 BIT-ERROR RATE TEST EXPERIMENT 178 10.5 ADDITIONAL
REFERENCES 185 CONTENTS XVII 11 DIGITAL DATA TRANSMISSION BY PULSE
AMPLITUDE MODULATION 187 11.1 DESCRIPTION OF A BASEBAND PULSE AMPLITUDE
MODULATION SYSTEM 187 11.2 BASEBAND SHAPING AND INTERSYMBOL INTERFERENCE
190 11.2.1 THE NYQUIST CRITERION FOR NO ISI 190 11.2.2 RAISED COSINE
BASEBAND SHAPING FILTERS 191 11.2.3 SPLITTING THE SHAPING BETWEEN THE
TRANSMIT AND RECEIVE FILTERS . . . 192 11.2.4 EYE DIAGRAMS 192 11.3
IMPLEMENTING THE TRANSMIT FILTER BY AN INTERPOLATION FILTER BANK 194
11.4 SYMBOL ERROR PROBABILITY WITH ADDITIVE GAUSSIAN NOISE 194 11.5
SYMBOL CLOCK RECOVERY 196 11.6 SIMULATION AND THEORETICAL EXERCISES FOR
PAM 198 11.6.1 GENERATING FOUR-LEVEL PSEUDO-RANDOM PAM SYMBOLS 198
11.6.2 EYE DIAGRAM FOR A PAM SIGNAL USING A RAISED COSINE SHAPING FILTER
199 11.6.3 EYE DIAGRAM FOR A PAM SIGNAL USING A SQUARE-ROOT OF RAISED
COSINE SHAPING FILTER 199 11.6.4 THEORETICAL ERROR PROBABILITY FOR A PAM
SYSTEM 200 11.7 HARDWARE EXERCISES FOR PAM 200 11.7.1 GENERATING A PAM
SIGNAL AND EYE DIAGRAM 200 11.7.2 TESTING THE SQUARE-LAW SYMBOL CLOCK
FREQUENCY GENERATOR 201 11.7.3 OPTIONAL TEAM EXERCISE 202 11.8
ADDITIONAL REFERENCES 203 12 VARIABLE PHASE INTERPOLATION 205 12.1
CONTINUOUSLY VARIABLE PHASE INTERPOLATION 205 12.1.1 COMPUTING THE
LEAST-SQUARES FITS 208 12.2 QUANTIZED VARIABLE PHASE INTERPOLATION 208
12.3 CLOSING THE TRACKING LOOP 209 12.4 CHANGING THE SAMPLING RATE BY A
RATIONAL FACTOR 211 12.5 EXPERIMENTS FOR VARIABLE PHASE INTERPOLATION
213 12.5.1 EXPERIMENT 12.1: OPEN LOOP PHASE SHIFTING EXPERIMENTS 213
12.5.2 EXPERIMENT 12.2: MAKING A SYMBOL CLOCK TRACKING LOOP 213 12.6
ADDITIONAL REFERENCES 214 13 FUNDAMENTALS OF QUADRATURE AMPLITUDE
MODULATION 215 13.1 A BASIC QAM TRANSMITTER 215 13.2 TWO CONSTELLATION
EXAMPLES 217 13.2.1 THE 4X4 16-POINT CONSTELLATION 218 13.2.2 A 4-POINT
FOUR PHASE CONSTELLATION 220 13.3 A MODULATOR STRUCTURE USING PASSBAND
SHAPING FILTERS 221 13.4 IDEAL QAM DEMODULATION 223 13.5 QAM MODULATOR
EXPERIMENTS 224 13.5.1 STEPS TO FOLLOW IN MAKING A TRANSMITTER 225
13.5.2 TESTING YOUR TRANSMITTER 226 13.5.3 GENERATING A STARTUP SEQUENCE
227 XVIII CONTENTS 13.6 ADDITIONAL REFERENCES 228 14 QAM RECEIVER I *
CLOCK RECOVERY AND OTHER FRONT-END SUBSYSTEMS 229 14.1 OVERVIEW OF A QAM
RECEIVER 229 14.2 DETAILS ABOUT THE RECEIVER FRONT-END SUBSYSTEMS 231
14.2.1 AUTOMATIC GAIN CONTROL 231 14.2.2 THE CARRIER DETECT SUBSYSTEM
232 14.2.3 SYMBOL CLOCK RECOVERY 232 14.3 EXPERIMENTS FOR THE QAM
RECEIVER FRONT-END 239 14.4 ADDITIONAL REFERENCES 240 15 QAM RECEIVER II
- EQUALIZER AND CARRIER RECOVERY SYSTEM 241 15.1 THE COMPLEX
CROSS-COUPLED PASSBAND ADAPTIVE EQUALIZER 241 15.1.1 THE LMS METHOD FOR
ADJUSTING THE EQUALIZER TAP VALUES 242 15.1.2 THEORETICAL BEHAVIOR OF
THE LMS ALGORITHM 247 15.1.3 ADDING TAP LEAKAGE TO THE LMS ALGORITHM 248
15.2 THE PHASE-SPLITTING FRACTIONALLY SPACED EQUALIZER 249 15.3 DECISION
DIRECTED CARRIER TRACKING 251 15.4 BLIND EQUALIZATION 253 15.4.1 BLIND
EQUALIZATION WITH THE COMPLEX CROSS-COUPLED EQUALIZER .... 254 15.4.2
BLIND EQUALIZATION WITH THE PHASE-SPLITTING EQUALIZER 255 15.5 COMPLEX
CROSS-COUPLED EQUALIZER AND CARRIER TRACKING EXPERIMENTS .... 256 15.5.1
IMPLEMENTING THE SLICER 256 15.5.2 MAKING A DEMODULATOR AND CARRIER
TRACKING LOOP 258 15.5.3 MAKING A COMPLEX CROSS-COUPLED ADAPTIVE
EQUALIZER 259 15.5.4 BIT-ERROR RATE TEST 259 15.5.5 OPTIONAL EXPERIMENT
- RECEIVING THE 16-POINT V.22BIS CONSTELLATION 259 15.5.6 OPTIONAL
EXPERIMENT - IDEAL REFERENCE TRAINING 260 15.6 OPTIONAL PHASE-SPLITTING
FRACTIONALLY SPACED EQUALIZER EXPERIMENT 260 15.7 OPTIONAL BLIND
EQUALIZATION EXPERIMENT 261 15.8 ADDITIONAL REFERENCES 262 16 ECHO
CANCELLATION FOR FULL-DUPLEX MODEMS 263 16.1 THE ECHO SOURCES IN A
DIALED TELEPHONE LINE CIRCUIT 263 16.2 THE DATA-DRIVEN, NYQUIST, IN-BAND
ECHO CANCELER 265 16.2.1 GENERAL DESCRIPTION 265 16.2.2 THE NEAR-END
ECHO CANCELER 267 16.2.3 THE FAR-END ECHO CANCELER 269 16.2.4 FAR-END
FREQUENCY OFFSET COMPENSATION 270 16.3 ECHO CANCELER EXPERIMENTS 271
16.3.1 MAKING A NEAR-END ECHO CANCELER 271 16.3.2 MAKING A FAR-END ECHO
CANCELER WITH FREQUENCY OFFSET CORRECTION . 271 16.4 ADDITIONAL
REFERENCES 272 CONTENTS XIX 17 MULTI-CARRIER MODULATION 273 17.1 HISTORY
AND IMPLEMENTATION OF MULTI-CARRIER MODULATION 273 17.2 ASYMMETRIE
DIGITAL SUBSCRIBER LINE (ADSL) SYSTEM ARCHITECTURE 277 17.3 COMPONENTS
OF A SIMPLIFIED ADSL TRANSMITTER 278 17.3.1 THE CYCLIC REDUNDANCY CHECK
GENERATOR 278 17.3.2 THE SCRAMBLER 281 17.3.3 THE REED-SOLOMON ENCODER
281 17.3.4 THE CONVOLUTIONAL INTERLEAVER 282 17.3.5 THE MAP AND IFFT
MODULATOR BLOCKS 285 17.3.6 SOME SIGNALS USED FOR INITIALIZATION AND
SYNCHRONIZATION 288 17.4 A SIMPLIFIED ADSL RECEIVER 290 17.4.1
DEMODULATION AND FREQUENCY DOMAIN EQUALIZATION 291 17.4.2 SAMPLE CLOCK
ACQUISITION AND TRACKING 292 17.4.3 SYMBOL ALIGNMENT ACQUISITION AND
TRACKING 296 17.4.4 REMAINING BLOCKS 297 17.5 MAKING A SIMPLIFIED ADSL
TRANSMITTER AND RECEIVER 298 17.5.1 MAKING A 64-POINT IFFT AND A
64-POINT FFT 298 17.5.2 MAKING A SCRAMBLER, CONSTELLATION POINT MAPPER,
AND THEIR INVERSES 299 17.5.3 MEASURING THE CHANNEL IMPULSE RESPONSE
DURATION 299 17.5.4 COMPLETING THE TRANSMITTER 300 17.5.5 MAKING THE
RECEIVER 301 17.6 ADDITIONAL REFERENCES 304 18 SUGGESTIONS FOR
ADDITIONAL EXPERIMENTS 307 18.1 ELEMENTARY MODEM HANDSHAKE SEQUENCE 307
18.2 MAKE AN ITU-T V.21 FREQUENCY SHIFT KEYED (FSK) MODEM 307 18.3 FAST
EQUALIZER TRAINING USING PERIODIC SEQUENCES 308 18.4 TRELLIS CODED
MODULATION 309 18.5 REED-SOLOMON ENCODER AND DECODER 309 18.6 TURBO
CODES 309 18.7 LOW DENSITY PARITY CHECK CODES 310 18.8 V.34
CONSTELLATION SHAPING BY SHELL MAPPING 310 18.9 NONLINEAR PRECODING FOR
V.34 311 18.10 SPEECH CODECS 311 A GENERATING GAUSSIAN RANDOM NUMBERS
313 A.L THE C6713 C COMPILER PSEUDO RANDOM NUMBER GENERATOR 313 A.2 A
BETTER UNIFORM RANDOM NUMBER GENERATOR 314 A.3 TURNING UNIFORMLY
DISTRIBUTED RANDOM VARIABLES INTO A PAIR OF GAUSSIAN RANDOM VARIABLES
316 A.4 LIMIT ON THE PEAK OF THE SIMULATED GAUSSIAN RANDOM VARIABLES 317
B A TTL/RS-232C INTERFACE FOR MCBSPO 319 C EQUIPMENT LIST FOR EACH
STATION 323 XX CONTENTS REFERENCES 325 I. LIST OF MANUALS 325 II.
SELECTED REFERENCE BOOKS AND PAPERS 325 A. DSP LABORATORY BOOKS USING
DSP HARDWARE 325 B. DSP LABORATORY BOOKS USING SOFTWARE SIMULATION 326
C. BOOKS AND PAPERS ON DIGITAL SIGNAL PROCESSING 327 D. BOOKS AND PAPERS
ON COMMUNICATIONS 328 E. REFERENCES FOR WIRELINE AND WIRELESS
MULTI-CARRIER MODULATION 331 F. BOOKS AND PAPERS ON ERROR CORRECTING
CODES 332 III. INTERESTING WEB SITES 333 INDEX 335
|
adam_txt |
COMMUNICATION SYSTEM DESIGN USING DSP ALGORITHMS WITH LABORATORY
EXPERIMENTS FOR THE TMS320C6713* DSK STEVEN A. TRETTER UNIVERSITY OF
MARYLAND COLLEGE PARK, MD SPRINGER CONTENTS 1 OVERVIEW OF THE HARDWARE
AND SOFTWARE TOOLS 1 1.1 SOME DSP CHIP HISTORY AND TYPICAL APPLICATIONS
2 1.2 THE TMS320C6713 FLOATING-POINT DSP 6 1.2.1 THE 'C6000 CENTRAL
PROCESSING UNIT (CPU) 6 1.2.2 MEMORY ORGANIZATION FOR THE TMS320C6713
DSK 11 1.2.3 ENHANCED DIRECT MEMORY ACCESS CONTROLLER (EDMA) 11 1.2.4
SERIAL PORTS 12 1.2.5 OTHER INTERNAL PERIPHERALS 13 1.2.6 BRIEF
DESCRIPTION OF THE TMS320C6000 INSTRUCTION SET 13 1.2.7 PARALLEL
OPERATIONS AND PIPELINING 16 1.3 THE TMS320C6713 DSP STARTER KIT (DSK)
18 1.3.1 THE AUDIO INTERFACE ONBOARD THE TMS320C6713 DSK 20 1.4 SOFTWARE
SUPPORT FOR THE DSK BOARD AND 'C6X DSP'S 21 1.4.1 THE BOARD SUPPORT
LIBRARY (BSL) 21 1.4.2 THE CHIP SUPPORT LIBRARY 22 1.5 CODE COMPOSER
STUDIO 22 1.5.1 PROJECT FILES AND BUILDING PROGRAMS 22 1.5.2 THE
OPTIMIZING COMPILER AND ASSEMBLER 23 1.5.3 THE LINKER 25 1.5.4 BUILDING
PROGRAMS FROM COMMAND LINE PROMPTS 25 1.5.5 THE ARCHIVER 26 1.5.6
ADDITIONAL CODE COMPOSER STUDIO FEATURES 26 1.6 OTHER SOFTWARE 27 1.6.1
DIGITAL FILTER DESIGN PROGRAMS 27 1.6.2 COMMERCIAL SOFTWARE 27 1.7
INTRODUCTORY EXPERIMENTS 28 2 LEARNING TO USE THE HARDWARE AND SOFTWARE
TOOLS 29 2.1 GETTING STARTED WITH A SIMPLE AUDIO LOOP THROUGH PROGRAM 29
2.1.1 A LINKER COMMAND FILE AND BEGINNING C PROGRAM 29 2.1.2 PROPERTIES
OF THE AIC23 CODEC 35 2.1.3 CREATING A CCS PROJECT FOR DSKSTART32.C 36
2.1.4 EXPERIMENT 2.1: BUILDING AND TESTING DSKSTART32. C 37 2.2 MORE
DETAILS ON THE MCBSP SERIAL PORTS AND CODECS 38 XIII ' XIV CONTENTS
2.2.1 BASIC MCBSP TRANSMITTER AND RECEIVER OPERATION 38 2.2.2 EXAMPLE C
CODE FOR READING FROM AND WRITING TO THE CODEC 41 2.3 THE 'C6000 TIMERS
42 2.4 GENERATING A SINE WAVE BY POLLING XRDY 43 2.4.1 EXPERIMENT 2.2:
INSTRUCTIONS FOR THE POLLING EXPERIMENT 45 2.5 GENERATING A SINE WAVE
USING INTERRUPTS 46 2.5.1 THE CPU INTERRUPT PRIORITIES AND SOURCES 46
2.5.2 INTERRUPT CONTROL REGISTERS 46 2.5.3 WHAT HAPPENS WHEN AN
INTERRUPT OCCURS 50 2.5.4 TI EXTENSIONS TO STANDARD C INTERRUPT SERVICE
ROUTINES 51 2.5.5 USING THE DSK6713BSL32 LIBRARY FOR INTERRUPTS 51 2.5.6
EXPERIMENT 2.3: GENERATING SINE WAVES BY USING INTERRUPTS 53 2.6
GENERATING A SINE WAVE WITH THE EDMA AND A TABLE 56 2.6.1 EDMA OVERVIEW
56 2.6.2 EDMA EVENT SELECTION 57 2.6.3 REGISTERS FOR EVENT PROCESSING 58
2.6.4 THE PARAMETER RAM (PARAM) 59 2.6.5 SYNCHRONIZATION OF EDMA
TRANSFERS 60 2.6.6 LINKING AND CHAINING EDMA TRANSFERS 61 2.6.7 EDMA
INTERRUPTS TO THE CPU 62 2.6.8 EXPERIMENT 2.4: GENERATING A SINE WAVE
USING THE EDMA CONTROLLER 62 3 DIGITAL FILTERS 67 3.1 DISCRETE-TIME
CONVOLUTION AND FREQUENCY RESPONSES 67 3.2 FINITE DURATION IMPULSE
RESPONSE (FIR) FILTERS 68 3.2.1 BLOCK DIAGRAM FOR MOST COMMON
REALIZATION 68 3.2.2 TWO METHODS FOR FINDING THE FILTER COEFFICIENTS TO
ACHIEVE A DESIRED FREQUENCY RESPONSE 69 3.3 USING CIRCULAR BUFFERS TO
IMPLEMENT FIR FILTERS IN C 72 3.4 CIRCULAR BUFFERS USING THE 'C6000
HARDWARE 75 3.4.1 HOW THE CIRCULAR BUFFER IS IMPLEMENTED 75 3.4.2
INDIRECT ADDRESSING THROUGH REGISTERS 76 3.5 INTERFACING C AND ASSEMBLY
FUNCTIONS 76 3.5.1 RESPONSIBILITIES OF THE CALLING AND CALLED FUNCTION
76 3.5.2 USING ASSEMBLY FUNCTIONS WITH C 79 3.6 LINEAR ASSEMBLY CODE AND
THE ASSEMBLY OPTIMIZER 79 3.6.1 A LINEAR ASSEMBLY CONVOLUTION FUNCTION
THAT USES A CIRCULAR BUFFER AND CAN BE CALLED FROM C 81 3.7 INFINITE
DURATION IMPULSE RESPONSE (HR) FILTERS 89 3.7.1 REALIZATIONS FOR HR
FILTERS 89 3.7.2 A PROGRAM FOR DESIGNING HR FILTERS 92 3.7.3 TWO METHODS
FOR MEASURING A PHASE RESPONSE 95 3.8 LABORATORY EXPERIMENTS FOR DIGITAL
FILTERS 96 3.8.1 EXPERIMENT 3.1: FIR FILTERS ENTIRELY IN C 96 CONTENTS
3.8.2 EXPERIMENT 3.2: FIR FILTERS USING C AND ASSEMBLY 97 3.8.3
EXPERIMENT 3.3: IMPLEMENTING AN HR FILTER 98 3.9 ADDITIONAL REFERENCES
98 4 THE FFT AND POWER SPECTRUM ESTIMATION 101 4.1 THE DISCRETE-TIME
FOURIER TRANSFORM 101 4.2 DATA WINDOW FUNCTIONS 102 4.3 THE DISCRETE
FOURIER TRANSFORM AND ITS INVERSE 104 4.4 THE FAST FOURIER TRANSFORM 104
4.5 USING THE FFT TO ESTIMATE A POWER SPECTRUM 112 4.6 LABORATORY
EXPERIMENTS 113 4.6.1 EXPERIMENT 4.1: FFT EXPERIMENTS 113 4.6.2
EXPERIMENT 4.2: MAKING A SPECTRUM ANALYZER 114 4.7 ADDITIONAL REFERENCES
118 5 AMPLITUDE MODULATION 121 5.1 THEORETICAL DESCRIPTION OF AMPLITUDE
MODULATION 121 5.1.1 MATHEMATICAL FORMULA FOR AN AM SIGNAL 121 5.1.2
EXAMPLE FOR SINGLE TONE MODULATION 122 5.1.3 THE SPECTRUM OF AN AM
SIGNAL 123 5.2 DEMODULATING AN AM SIGNAL BY ENVELOPE DETECTION 123 5.2.1
SQUARE-LAW DEMODULATION OF AM SIGNALS 124 5.2.2 HUBERT TRANSFORMS AND
THE COMPLEX ENVELOPE 125 5.3 LABORATORY EXPERIMENTS FOR AM MODULATION
AND DEMODULATION 127 5.3.1 EXPERIMENT 5.1: MAKING AN AM MODULATOR 128
5.3.2 HOW TO CAPTURE DSK OUTPUT SAMPLES WITH CCS FOR PLOTTING . 129
5.3.3 EXPERIMENT 5.2: MAKING A SQUARE-LAW ENVELOPE DETECTOR 130 5.3.4
EXPERIMENT 5.3: MAKING AN ENVELOPE DETECTOR USING THE HUBERT TRANS- FORM
131 5.4 ADDITIONAL REFERENCES 132 6 DSBSC AMPLITUDE MODULATION AND
COHERENT DETECTION 133 6.1 MATHEMATICAL FORM FOR A DSBSC-AM SIGNAL 133
6.2 THE IDEAL COHERENT RECEIVER 134 6.3 THE COSTAS LOOP AS A PRACTICAL
APPROACH TO COHERENT DEMODULATION . . . . 136 6.4 EXERCISES AND
EXPERIMENTS FOR THE COSTAS LOOP 138 6.4.1 THEORETICAL DESIGN EXERCISES
139 6.4.2 HARDWARE EXPERIMENTS 140 6.5 ADDITIONAL REFERENCES 141 7
SINGLE-SIDEBAND MODULATION AND FREQUENCY TRANSLATION 143 7.1
SINGLE-SIDEBAND MODULATORS 143 7.2 COHERENT DEMODULATION OF SSB SIGNALS
145 7.3 FREQUENCY TRANSLATION 146 7.4 LABORATORY EXPERIMENTS 147 XVI
CONTENTS 7.4.1 EXPERIMENT 7.1: MAKING AN SSB MODULATOR 148 7.4.2
EXPERIMENT 7.2: COHERENT DEMODULATION OF AN SSB SIGNAL 148 7.5
ADDITIONAL REFERENCES 150 8 FREQUENCY MODULATION 151 8.1 THE FM SIGNAL
AND SOME OF ITS PROPERTIES 151 8.1.1 DEFINITION OF INSTANTANEOUS
FREQUENCY AND THE FM SIGNAL 151 8.1.2 SINGLE TONE FM MODULATION 152
8.1.3 NARROW BAND FM MODULATION 154 8.1.4 THE BANDWIDTH OF AN FM SIGNAL
154 8.2 FM DEMODULATION BY A FREQUENCY DISCRIMINATOR 154 8.2.1 AN FM
DISCRIMINATOR USING THE PRE-ENVELOPE 155 8.2.2 A DISCRIMINATOR USING THE
COMPLEX ENVELOPE 156 8.3 USING A PHASE-LOCKED LOOP FOR FM DEMODULATION
157 8.4 LABORATORY EXPERIMENTS FOR FREQUENCY MODULATION 160 8.4.1
EXPERIMENT 8.1: MEASURING THE SPECTRUM OF AN FM SIGNAL 160 8.4.2
EXPERIMENT 8.2: FM DEMODULATION USING A FREQUENCY DISCRIMINATOR 161
8.4.3 EXPERIMENT 8.3: USING A PHASE-LOCKED LOOP FOR FM DEMODULATION .
161 8.5 ADDITIONAL REFERENCES 162 9 PSEUDO-RANDOM BINARY SEQUENCES AND
DATA SCRAMBLERS 163 9.1 USING SHIFT REGISTERS TO GENERATE PSEUDO-RANDOM
BINARY SEQUENCES . 164 9.1.1 THE LINEAR FEEDBACK SHIFT REGISTER
SEQUENCE GENERATOR 164 9.1.2 THE CONNECTION POLYNOMIAL AND SEQUENCE
PERIOD 165 9.1.3 PROPERTIES OF MAXIMAL LENGTH SEQUENCES 166 9.2 SEIF
SYNCHRONIZING DATA SCRAMBLERS 167 9.2.1 THE SCRAMBLER 167 9.2.2 THE
DESCRAMBLER 169 9.3 THEORETICAL AND SIMULATION EXERCISES 169 9.3.1
EXERCISES FOR A SHIFT REGISTER SEQUENCE GENERATOR WITH A PRIMITIVE
CONNECTION POLYNOMIAL 169 9.3.2 EXERCISES FOR A SHIFT REGISTER SEQUENCE
GENERATOR WITH AN IRREDUCIBLE BUT NOT PRIMITIVE CONNECTION POLYNOMIAL
170 9.3.3 EXERCISES FOR A SHIFT REGISTER SEQUENCE GENERATOR WITH A
REDUCIBLE CONNECTION POLYNOMIAL 171 9.4 ADDITIONAL REFERENCES 171 10 THE
RS-232C PROTOCOL AND A BIT-ERROR RATE TESTER 173 10.1 THE EIA RS-232C
SERIAL INTERFACE PROTOCOL 173 10.2 ERROR RATE FOR BINARY SIGNALING ON
THE GAUSSIAN NOISE CHANNEL 176 10.3 THE NAVTEL DATATEST 3 BIT ERROR RATE
TESTER 177 10.4 BIT-ERROR RATE TEST EXPERIMENT 178 10.5 ADDITIONAL
REFERENCES 185 CONTENTS XVII 11 DIGITAL DATA TRANSMISSION BY PULSE
AMPLITUDE MODULATION 187 11.1 DESCRIPTION OF A BASEBAND PULSE AMPLITUDE
MODULATION SYSTEM 187 11.2 BASEBAND SHAPING AND INTERSYMBOL INTERFERENCE
190 11.2.1 THE NYQUIST CRITERION FOR NO ISI 190 11.2.2 RAISED COSINE
BASEBAND SHAPING FILTERS 191 11.2.3 SPLITTING THE SHAPING BETWEEN THE
TRANSMIT AND RECEIVE FILTERS . . . 192 11.2.4 EYE DIAGRAMS 192 11.3
IMPLEMENTING THE TRANSMIT FILTER BY AN INTERPOLATION FILTER BANK 194
11.4 SYMBOL ERROR PROBABILITY WITH ADDITIVE GAUSSIAN NOISE 194 11.5
SYMBOL CLOCK RECOVERY 196 11.6 SIMULATION AND THEORETICAL EXERCISES FOR
PAM 198 11.6.1 GENERATING FOUR-LEVEL PSEUDO-RANDOM PAM SYMBOLS 198
11.6.2 EYE DIAGRAM FOR A PAM SIGNAL USING A RAISED COSINE SHAPING FILTER
199 11.6.3 EYE DIAGRAM FOR A PAM SIGNAL USING A SQUARE-ROOT OF RAISED
COSINE SHAPING FILTER 199 11.6.4 THEORETICAL ERROR PROBABILITY FOR A PAM
SYSTEM 200 11.7 HARDWARE EXERCISES FOR PAM 200 11.7.1 GENERATING A PAM
SIGNAL AND EYE DIAGRAM 200 11.7.2 TESTING THE SQUARE-LAW SYMBOL CLOCK
FREQUENCY GENERATOR 201 11.7.3 OPTIONAL TEAM EXERCISE 202 11.8
ADDITIONAL REFERENCES 203 12 VARIABLE PHASE INTERPOLATION 205 12.1
CONTINUOUSLY VARIABLE PHASE INTERPOLATION 205 12.1.1 COMPUTING THE
LEAST-SQUARES FITS 208 12.2 QUANTIZED VARIABLE PHASE INTERPOLATION 208
12.3 CLOSING THE TRACKING LOOP 209 12.4 CHANGING THE SAMPLING RATE BY A
RATIONAL FACTOR 211 12.5 EXPERIMENTS FOR VARIABLE PHASE INTERPOLATION
213 12.5.1 EXPERIMENT 12.1: OPEN LOOP PHASE SHIFTING EXPERIMENTS 213
12.5.2 EXPERIMENT 12.2: MAKING A SYMBOL CLOCK TRACKING LOOP 213 12.6
ADDITIONAL REFERENCES 214 13 FUNDAMENTALS OF QUADRATURE AMPLITUDE
MODULATION 215 13.1 A BASIC QAM TRANSMITTER 215 13.2 TWO CONSTELLATION
EXAMPLES 217 13.2.1 THE 4X4 16-POINT CONSTELLATION 218 13.2.2 A 4-POINT
FOUR PHASE CONSTELLATION 220 13.3 A MODULATOR STRUCTURE USING PASSBAND
SHAPING FILTERS 221 13.4 IDEAL QAM DEMODULATION 223 13.5 QAM MODULATOR
EXPERIMENTS 224 13.5.1 STEPS TO FOLLOW IN MAKING A TRANSMITTER 225
13.5.2 TESTING YOUR TRANSMITTER 226 13.5.3 GENERATING A STARTUP SEQUENCE
227 XVIII CONTENTS 13.6 ADDITIONAL REFERENCES 228 14 QAM RECEIVER I *
CLOCK RECOVERY AND OTHER FRONT-END SUBSYSTEMS 229 14.1 OVERVIEW OF A QAM
RECEIVER 229 14.2 DETAILS ABOUT THE RECEIVER FRONT-END SUBSYSTEMS 231
14.2.1 AUTOMATIC GAIN CONTROL 231 14.2.2 THE CARRIER DETECT SUBSYSTEM
232 14.2.3 SYMBOL CLOCK RECOVERY 232 14.3 EXPERIMENTS FOR THE QAM
RECEIVER FRONT-END 239 14.4 ADDITIONAL REFERENCES 240 15 QAM RECEIVER II
- EQUALIZER AND CARRIER RECOVERY SYSTEM 241 15.1 THE COMPLEX
CROSS-COUPLED PASSBAND ADAPTIVE EQUALIZER 241 15.1.1 THE LMS METHOD FOR
ADJUSTING THE EQUALIZER TAP VALUES 242 15.1.2 THEORETICAL BEHAVIOR OF
THE LMS ALGORITHM 247 15.1.3 ADDING TAP LEAKAGE TO THE LMS ALGORITHM 248
15.2 THE PHASE-SPLITTING FRACTIONALLY SPACED EQUALIZER 249 15.3 DECISION
DIRECTED CARRIER TRACKING 251 15.4 BLIND EQUALIZATION 253 15.4.1 BLIND
EQUALIZATION WITH THE COMPLEX CROSS-COUPLED EQUALIZER . 254 15.4.2
BLIND EQUALIZATION WITH THE PHASE-SPLITTING EQUALIZER 255 15.5 COMPLEX
CROSS-COUPLED EQUALIZER AND CARRIER TRACKING EXPERIMENTS . 256 15.5.1
IMPLEMENTING THE SLICER 256 15.5.2 MAKING A DEMODULATOR AND CARRIER
TRACKING LOOP 258 15.5.3 MAKING A COMPLEX CROSS-COUPLED ADAPTIVE
EQUALIZER 259 15.5.4 BIT-ERROR RATE TEST 259 15.5.5 OPTIONAL EXPERIMENT
- RECEIVING THE 16-POINT V.22BIS CONSTELLATION 259 15.5.6 OPTIONAL
EXPERIMENT - IDEAL REFERENCE TRAINING 260 15.6 OPTIONAL PHASE-SPLITTING
FRACTIONALLY SPACED EQUALIZER EXPERIMENT 260 15.7 OPTIONAL BLIND
EQUALIZATION EXPERIMENT 261 15.8 ADDITIONAL REFERENCES 262 16 ECHO
CANCELLATION FOR FULL-DUPLEX MODEMS 263 16.1 THE ECHO SOURCES IN A
DIALED TELEPHONE LINE CIRCUIT 263 16.2 THE DATA-DRIVEN, NYQUIST, IN-BAND
ECHO CANCELER 265 16.2.1 GENERAL DESCRIPTION 265 16.2.2 THE NEAR-END
ECHO CANCELER 267 16.2.3 THE FAR-END ECHO CANCELER 269 16.2.4 FAR-END
FREQUENCY OFFSET COMPENSATION 270 16.3 ECHO CANCELER EXPERIMENTS 271
16.3.1 MAKING A NEAR-END ECHO CANCELER 271 16.3.2 MAKING A FAR-END ECHO
CANCELER WITH FREQUENCY OFFSET CORRECTION . 271 16.4 ADDITIONAL
REFERENCES 272 CONTENTS XIX 17 MULTI-CARRIER MODULATION 273 17.1 HISTORY
AND IMPLEMENTATION OF MULTI-CARRIER MODULATION 273 17.2 ASYMMETRIE
DIGITAL SUBSCRIBER LINE (ADSL) SYSTEM ARCHITECTURE 277 17.3 COMPONENTS
OF A SIMPLIFIED ADSL TRANSMITTER 278 17.3.1 THE CYCLIC REDUNDANCY CHECK
GENERATOR 278 17.3.2 THE SCRAMBLER 281 17.3.3 THE REED-SOLOMON ENCODER
281 17.3.4 THE CONVOLUTIONAL INTERLEAVER 282 17.3.5 THE MAP AND IFFT
MODULATOR BLOCKS 285 17.3.6 SOME SIGNALS USED FOR INITIALIZATION AND
SYNCHRONIZATION 288 17.4 A SIMPLIFIED ADSL RECEIVER 290 17.4.1
DEMODULATION AND FREQUENCY DOMAIN EQUALIZATION 291 17.4.2 SAMPLE CLOCK
ACQUISITION AND TRACKING 292 17.4.3 SYMBOL ALIGNMENT ACQUISITION AND
TRACKING 296 17.4.4 REMAINING BLOCKS 297 17.5 MAKING A SIMPLIFIED ADSL
TRANSMITTER AND RECEIVER 298 17.5.1 MAKING A 64-POINT IFFT AND A
64-POINT FFT 298 17.5.2 MAKING A SCRAMBLER, CONSTELLATION POINT MAPPER,
AND THEIR INVERSES 299 17.5.3 MEASURING THE CHANNEL IMPULSE RESPONSE
DURATION 299 17.5.4 COMPLETING THE TRANSMITTER 300 17.5.5 MAKING THE
RECEIVER 301 17.6 ADDITIONAL REFERENCES 304 18 SUGGESTIONS FOR
ADDITIONAL EXPERIMENTS 307 18.1 ELEMENTARY MODEM HANDSHAKE SEQUENCE 307
18.2 MAKE AN ITU-T V.21 FREQUENCY SHIFT KEYED (FSK) MODEM 307 18.3 FAST
EQUALIZER TRAINING USING PERIODIC SEQUENCES 308 18.4 TRELLIS CODED
MODULATION 309 18.5 REED-SOLOMON ENCODER AND DECODER 309 18.6 TURBO
CODES 309 18.7 LOW DENSITY PARITY CHECK CODES 310 18.8 V.34
CONSTELLATION SHAPING BY SHELL MAPPING 310 18.9 NONLINEAR PRECODING FOR
V.34 311 18.10 SPEECH CODECS 311 A GENERATING GAUSSIAN RANDOM NUMBERS
313 A.L THE 'C6713 C COMPILER PSEUDO RANDOM NUMBER GENERATOR 313 A.2 A
BETTER UNIFORM RANDOM NUMBER GENERATOR 314 A.3 TURNING UNIFORMLY
DISTRIBUTED RANDOM VARIABLES INTO A PAIR OF GAUSSIAN RANDOM VARIABLES
316 A.4 LIMIT ON THE PEAK OF THE SIMULATED GAUSSIAN RANDOM VARIABLES 317
B A TTL/RS-232C INTERFACE FOR MCBSPO 319 C EQUIPMENT LIST FOR EACH
STATION 323 XX CONTENTS REFERENCES 325 I. LIST OF MANUALS 325 II.
SELECTED REFERENCE BOOKS AND PAPERS 325 A. DSP LABORATORY BOOKS USING
DSP HARDWARE 325 B. DSP LABORATORY BOOKS USING SOFTWARE SIMULATION 326
C. BOOKS AND PAPERS ON DIGITAL SIGNAL PROCESSING 327 D. BOOKS AND PAPERS
ON COMMUNICATIONS 328 E. REFERENCES FOR WIRELINE AND WIRELESS
MULTI-CARRIER MODULATION 331 F. BOOKS AND PAPERS ON ERROR CORRECTING
CODES 332 III. INTERESTING WEB SITES 333 INDEX 335 |
any_adam_object | 1 |
any_adam_object_boolean | 1 |
author | Tretter, Steven A. |
author_facet | Tretter, Steven A. |
author_role | aut |
author_sort | Tretter, Steven A. |
author_variant | s a t sa sat |
building | Verbundindex |
bvnumber | BV023350885 |
classification_rvk | ZN 6040 |
ctrlnum | (OCoLC)255796044 (DE-599)DNB985306270 |
discipline | Maschinenbau / Maschinenwesen Elektrotechnik / Elektronik / Nachrichtentechnik |
discipline_str_mv | Maschinenbau / Maschinenwesen Elektrotechnik / Elektronik / Nachrichtentechnik |
edition | 3. ed. |
format | Book |
fullrecord | <?xml version="1.0" encoding="UTF-8"?><collection xmlns="http://www.loc.gov/MARC21/slim"><record><leader>01970nam a2200481 c 4500</leader><controlfield tag="001">BV023350885</controlfield><controlfield tag="003">DE-604</controlfield><controlfield tag="005">20080710 </controlfield><controlfield tag="007">t</controlfield><controlfield tag="008">080618s2008 a||| |||| 00||| eng d</controlfield><datafield tag="015" ind1=" " ind2=" "><subfield code="a">07N360594</subfield><subfield code="2">dnb</subfield></datafield><datafield tag="016" ind1="7" ind2=" "><subfield code="a">985306270</subfield><subfield code="2">DE-101</subfield></datafield><datafield tag="020" ind1=" " ind2=" "><subfield code="a">9780387748856</subfield><subfield code="c">: ca. EUR 102.99 (freier Pr.)</subfield><subfield code="9">978-0-387-74885-6</subfield></datafield><datafield tag="020" ind1=" " ind2=" "><subfield code="a">0387748857</subfield><subfield code="c">: ca. EUR 102.99 (freier Pr.)</subfield><subfield code="9">0-387-74885-7</subfield></datafield><datafield tag="035" ind1=" " ind2=" "><subfield code="a">(OCoLC)255796044</subfield></datafield><datafield tag="035" ind1=" " ind2=" "><subfield code="a">(DE-599)DNB985306270</subfield></datafield><datafield tag="040" ind1=" " ind2=" "><subfield code="a">DE-604</subfield><subfield code="b">ger</subfield></datafield><datafield tag="041" ind1="0" ind2=" "><subfield code="a">eng</subfield></datafield><datafield tag="049" ind1=" " ind2=" "><subfield code="a">DE-92</subfield><subfield code="a">DE-M347</subfield></datafield><datafield tag="084" ind1=" " ind2=" "><subfield code="a">ZN 6040</subfield><subfield code="0">(DE-625)157496:</subfield><subfield code="2">rvk</subfield></datafield><datafield tag="084" ind1=" " ind2=" "><subfield code="a">620</subfield><subfield code="2">sdnb</subfield></datafield><datafield tag="100" ind1="1" ind2=" "><subfield code="a">Tretter, Steven A.</subfield><subfield code="e">Verfasser</subfield><subfield code="4">aut</subfield></datafield><datafield tag="245" ind1="1" ind2="0"><subfield code="a">Communication system design using DSP algorithms</subfield><subfield code="b">with laboratory experiments for the TMS320C6713 DSK</subfield><subfield code="c">Steven A. Tretter</subfield></datafield><datafield tag="250" ind1=" " ind2=" "><subfield code="a">3. ed.</subfield></datafield><datafield tag="264" ind1=" " ind2="1"><subfield code="a">New York</subfield><subfield code="b">Springer</subfield><subfield code="c">2008</subfield></datafield><datafield tag="300" ind1=" " ind2=" "><subfield code="a">XX, 344 S.</subfield><subfield code="b">Ill.</subfield></datafield><datafield tag="336" ind1=" " ind2=" "><subfield code="b">txt</subfield><subfield code="2">rdacontent</subfield></datafield><datafield tag="337" ind1=" " ind2=" "><subfield code="b">n</subfield><subfield code="2">rdamedia</subfield></datafield><datafield tag="338" ind1=" " ind2=" "><subfield code="b">nc</subfield><subfield code="2">rdacarrier</subfield></datafield><datafield tag="490" ind1="0" ind2=" "><subfield code="a">Information technology: transmission, processing, and storage</subfield></datafield><datafield tag="650" ind1=" " ind2="4"><subfield code="a">Datenverarbeitung</subfield></datafield><datafield tag="650" ind1=" " ind2="4"><subfield code="a">Real-time data processing</subfield></datafield><datafield tag="650" ind1=" " ind2="4"><subfield code="a">Signal processing</subfield><subfield code="x">Digital techniques</subfield><subfield code="x">Data processing</subfield></datafield><datafield tag="650" ind1=" " ind2="4"><subfield code="a">Texas Instruments TMS320 series microprocessors</subfield></datafield><datafield tag="650" ind1="0" ind2="7"><subfield code="a">Algorithmus</subfield><subfield code="0">(DE-588)4001183-5</subfield><subfield code="2">gnd</subfield><subfield code="9">rswk-swf</subfield></datafield><datafield tag="650" ind1="0" ind2="7"><subfield code="a">Datenübertragung</subfield><subfield code="0">(DE-588)4011150-7</subfield><subfield code="2">gnd</subfield><subfield code="9">rswk-swf</subfield></datafield><datafield tag="650" ind1="0" ind2="7"><subfield code="a">Digitale Signalverarbeitung</subfield><subfield code="0">(DE-588)4113314-6</subfield><subfield code="2">gnd</subfield><subfield code="9">rswk-swf</subfield></datafield><datafield tag="689" ind1="0" ind2="0"><subfield code="a">Datenübertragung</subfield><subfield code="0">(DE-588)4011150-7</subfield><subfield code="D">s</subfield></datafield><datafield tag="689" ind1="0" ind2="1"><subfield code="a">Digitale Signalverarbeitung</subfield><subfield code="0">(DE-588)4113314-6</subfield><subfield code="D">s</subfield></datafield><datafield tag="689" ind1="0" ind2="2"><subfield code="a">Algorithmus</subfield><subfield code="0">(DE-588)4001183-5</subfield><subfield code="D">s</subfield></datafield><datafield tag="689" ind1="0" ind2=" "><subfield code="5">DE-604</subfield></datafield><datafield tag="856" ind1="4" ind2="2"><subfield code="m">GBV Datenaustausch</subfield><subfield code="q">application/pdf</subfield><subfield code="u">http://bvbr.bib-bvb.de:8991/F?func=service&doc_library=BVB01&local_base=BVB01&doc_number=016534499&sequence=000001&line_number=0001&func_code=DB_RECORDS&service_type=MEDIA</subfield><subfield code="3">Inhaltsverzeichnis</subfield></datafield><datafield tag="999" ind1=" " ind2=" "><subfield code="a">oai:aleph.bib-bvb.de:BVB01-016534499</subfield></datafield></record></collection> |
id | DE-604.BV023350885 |
illustrated | Illustrated |
index_date | 2024-07-02T21:05:08Z |
indexdate | 2024-07-09T21:16:35Z |
institution | BVB |
isbn | 9780387748856 0387748857 |
language | English |
oai_aleph_id | oai:aleph.bib-bvb.de:BVB01-016534499 |
oclc_num | 255796044 |
open_access_boolean | |
owner | DE-92 DE-M347 |
owner_facet | DE-92 DE-M347 |
physical | XX, 344 S. Ill. |
publishDate | 2008 |
publishDateSearch | 2008 |
publishDateSort | 2008 |
publisher | Springer |
record_format | marc |
series2 | Information technology: transmission, processing, and storage |
spelling | Tretter, Steven A. Verfasser aut Communication system design using DSP algorithms with laboratory experiments for the TMS320C6713 DSK Steven A. Tretter 3. ed. New York Springer 2008 XX, 344 S. Ill. txt rdacontent n rdamedia nc rdacarrier Information technology: transmission, processing, and storage Datenverarbeitung Real-time data processing Signal processing Digital techniques Data processing Texas Instruments TMS320 series microprocessors Algorithmus (DE-588)4001183-5 gnd rswk-swf Datenübertragung (DE-588)4011150-7 gnd rswk-swf Digitale Signalverarbeitung (DE-588)4113314-6 gnd rswk-swf Datenübertragung (DE-588)4011150-7 s Digitale Signalverarbeitung (DE-588)4113314-6 s Algorithmus (DE-588)4001183-5 s DE-604 GBV Datenaustausch application/pdf http://bvbr.bib-bvb.de:8991/F?func=service&doc_library=BVB01&local_base=BVB01&doc_number=016534499&sequence=000001&line_number=0001&func_code=DB_RECORDS&service_type=MEDIA Inhaltsverzeichnis |
spellingShingle | Tretter, Steven A. Communication system design using DSP algorithms with laboratory experiments for the TMS320C6713 DSK Datenverarbeitung Real-time data processing Signal processing Digital techniques Data processing Texas Instruments TMS320 series microprocessors Algorithmus (DE-588)4001183-5 gnd Datenübertragung (DE-588)4011150-7 gnd Digitale Signalverarbeitung (DE-588)4113314-6 gnd |
subject_GND | (DE-588)4001183-5 (DE-588)4011150-7 (DE-588)4113314-6 |
title | Communication system design using DSP algorithms with laboratory experiments for the TMS320C6713 DSK |
title_auth | Communication system design using DSP algorithms with laboratory experiments for the TMS320C6713 DSK |
title_exact_search | Communication system design using DSP algorithms with laboratory experiments for the TMS320C6713 DSK |
title_exact_search_txtP | Communication system design using DSP algorithms with laboratory experiments for the TMS320C6713 DSK |
title_full | Communication system design using DSP algorithms with laboratory experiments for the TMS320C6713 DSK Steven A. Tretter |
title_fullStr | Communication system design using DSP algorithms with laboratory experiments for the TMS320C6713 DSK Steven A. Tretter |
title_full_unstemmed | Communication system design using DSP algorithms with laboratory experiments for the TMS320C6713 DSK Steven A. Tretter |
title_short | Communication system design using DSP algorithms |
title_sort | communication system design using dsp algorithms with laboratory experiments for the tms320c6713 dsk |
title_sub | with laboratory experiments for the TMS320C6713 DSK |
topic | Datenverarbeitung Real-time data processing Signal processing Digital techniques Data processing Texas Instruments TMS320 series microprocessors Algorithmus (DE-588)4001183-5 gnd Datenübertragung (DE-588)4011150-7 gnd Digitale Signalverarbeitung (DE-588)4113314-6 gnd |
topic_facet | Datenverarbeitung Real-time data processing Signal processing Digital techniques Data processing Texas Instruments TMS320 series microprocessors Algorithmus Datenübertragung Digitale Signalverarbeitung |
url | http://bvbr.bib-bvb.de:8991/F?func=service&doc_library=BVB01&local_base=BVB01&doc_number=016534499&sequence=000001&line_number=0001&func_code=DB_RECORDS&service_type=MEDIA |
work_keys_str_mv | AT tretterstevena communicationsystemdesignusingdspalgorithmswithlaboratoryexperimentsforthetms320c6713dsk |