Verilog HDL: digital design and modeling
Saved in:
| Main Author: | |
|---|---|
| Format: | Book |
| Language: | English |
| Published: |
Boca Raton, Fla. [u.a.]
CRC Press
2007
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| Subjects: | |
| Online Access: | Publisher description |
| Item Description: | Includes bibliographical references and index |
| Physical Description: | XVIII, 900 S. Ill., graph. Darst. |
| ISBN: | 1420051547 9781420051544 |
Staff View
MARC
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Record in the Search Index
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| author | Cavanagh, Joseph J. F. |
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| id | DE-604.BV023337581 |
| illustrated | Illustrated |
| index_date | 2024-07-02T21:00:18Z |
| indexdate | 2024-07-09T21:16:17Z |
| institution | BVB |
| isbn | 1420051547 9781420051544 |
| language | English |
| oai_aleph_id | oai:aleph.bib-bvb.de:BVB01-016521420 |
| oclc_num | 633674193 |
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| physical | XVIII, 900 S. Ill., graph. Darst. |
| publishDate | 2007 |
| publishDateSearch | 2007 |
| publishDateSort | 2007 |
| publisher | CRC Press |
| record_format | marc |
| spelling | Cavanagh, Joseph J. F. Verfasser aut Verilog HDL digital design and modeling Joseph Cavanagh Boca Raton, Fla. [u.a.] CRC Press 2007 XVIII, 900 S. Ill., graph. Darst. txt rdacontent n rdamedia nc rdacarrier Includes bibliographical references and index Digital electronics Logic circuits / Computer-aided design Verilog (Computer hardware description language) VERILOG (DE-588)4268385-3 gnd rswk-swf VERILOG (DE-588)4268385-3 s DE-604 http://www.loc.gov/catdir/enhancements/fy0626/2006052725-d.html Publisher description lizenzfrei |
| spellingShingle | Cavanagh, Joseph J. F. Verilog HDL digital design and modeling Digital electronics Logic circuits / Computer-aided design Verilog (Computer hardware description language) VERILOG (DE-588)4268385-3 gnd |
| subject_GND | (DE-588)4268385-3 |
| title | Verilog HDL digital design and modeling |
| title_auth | Verilog HDL digital design and modeling |
| title_exact_search | Verilog HDL digital design and modeling |
| title_exact_search_txtP | Verilog HDL digital design and modeling |
| title_full | Verilog HDL digital design and modeling Joseph Cavanagh |
| title_fullStr | Verilog HDL digital design and modeling Joseph Cavanagh |
| title_full_unstemmed | Verilog HDL digital design and modeling Joseph Cavanagh |
| title_short | Verilog HDL |
| title_sort | verilog hdl digital design and modeling |
| title_sub | digital design and modeling |
| topic | Digital electronics Logic circuits / Computer-aided design Verilog (Computer hardware description language) VERILOG (DE-588)4268385-3 gnd |
| topic_facet | Digital electronics Logic circuits / Computer-aided design Verilog (Computer hardware description language) VERILOG |
| url | http://www.loc.gov/catdir/enhancements/fy0626/2006052725-d.html |
| work_keys_str_mv | AT cavanaghjosephjf veriloghdldigitaldesignandmodeling |