The art of multiprocessor programming:
Gespeichert in:
| Hauptverfasser: | , |
|---|---|
| Format: | Buch |
| Sprache: | English |
| Veröffentlicht: |
Amsterdam [u.a.]
Elsevier, Morgan Kaufmann
2008
|
| Schlagworte: | |
| Online-Zugang: | Inhaltsverzeichnis |
| Beschreibung: | XX, 508 S. graph. Darst. |
| ISBN: | 9780123705914 0123705916 |
Internformat
MARC
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| 100 | 1 | |a Herlihy, Maurice |d 1954- |e Verfasser |0 (DE-588)135665558 |4 aut | |
| 245 | 1 | 0 | |a The art of multiprocessor programming |c Maurice Herlihy ; Nir Shavit |
| 264 | 1 | |a Amsterdam [u.a.] |b Elsevier, Morgan Kaufmann |c 2008 | |
| 300 | |a XX, 508 S. |b graph. Darst. | ||
| 336 | |b txt |2 rdacontent | ||
| 337 | |b n |2 rdamedia | ||
| 338 | |b nc |2 rdacarrier | ||
| 650 | 4 | |a Multiprocesseurs | |
| 650 | 4 | |a Multiprogrammation | |
| 650 | 4 | |a Multiprogramming (Electronic computers) | |
| 650 | 4 | |a Multiprocessors | |
| 650 | 0 | 7 | |a Programmierung |0 (DE-588)4076370-5 |2 gnd |9 rswk-swf |
| 650 | 0 | 7 | |a Mehrprozessorsystem |0 (DE-588)4038397-0 |2 gnd |9 rswk-swf |
| 655 | 7 | |0 (DE-588)4123623-3 |a Lehrbuch |2 gnd-content | |
| 689 | 0 | 0 | |a Mehrprozessorsystem |0 (DE-588)4038397-0 |D s |
| 689 | 0 | 1 | |a Programmierung |0 (DE-588)4076370-5 |D s |
| 689 | 0 | |5 DE-604 | |
| 700 | 1 | |a Shavit, Nir |d 1959- |e Verfasser |0 (DE-588)135665612 |4 aut | |
| 856 | 4 | 2 | |m Digitalisierung UB Bamberg |q application/pdf |u http://bvbr.bib-bvb.de:8991/F?func=service&doc_library=BVB01&local_base=BVB01&doc_number=016397704&sequence=000002&line_number=0001&func_code=DB_RECORDS&service_type=MEDIA |3 Inhaltsverzeichnis |
| 999 | |a oai:aleph.bib-bvb.de:BVB01-016397704 | ||
Datensatz im Suchindex
| _version_ | 1804137493916811264 |
|---|---|
| adam_text | Contents
Acknowledgments
xvii
Preface
xix
1 Introduction I
I
.
I Shared Objects and Synchronization
3
1.2
Arable
6
1.2.1
Properties of Mutual Exclusion
8
1
.2.2
The Moral
9
1.3
The Producer-Consumer Problem
10
1
.4
The Readers-Writers Problem 1
2
1.5
The Harsh Realities of Parallelization
13
1.6
Parallel Programming
15
1
.7
Chapter Notes 1
5
1.8
Exercises
16
і
PRINCIPLES
19
2
Mutual Exclusion
21
2.1
Time
21
2.2
Critical Sections
22
vii
viii Contents
2.3
2-Thread Solutions
24
2.3.1
The LockOne
Class
25
2.3.2
The LockTwo Class
26
2.3.3
The Peterson Lock
27
2.4
The Filter Lock
28
2.5
Fairness
31
2.6
Lamport s Bakery Algorithm
ЗІ
2.7
Bounded Timestamps
33
2.8
Lower Bounds on the Number of Locations
37
2.9
Chapter Notes
40
2.10
Exercises
41
3
Concurrent Objects
45
3.1
Concurrency and Correctness
45
3.2
Sequential Objects
48
3.3
Quiescent Consistency
49
3.3.1
Remarks
51
3.4
Sequential Consistency
51
3.4.1
Remarks
52
3.5
Linearizabiiity
54
3.5.
1 Linearization Points
55
3.5.2
Remarks
55
3.6
Formal Definitions
55
3.6.
1 Linearizabiiity
57
3.6.2
Compositional Linearizabiiity
57
3.6.3
The Nonblocking Property
58
3.7
Progress Conditions
59
3.7.
1 Dependent Progress Conditions
60
3.8
The Java Memory Model
61
3.8.
1 Locks and Synchronized Blocks
62
3.8.2
Volatile Fields
63
3.8.3
Final Fields
63
Contents
¡Χ
3.9
Remarks
64
3.10
Chapter Notes
65
3.
1 I Exercises
66
4
Foundations of Shared Memory
71
4.
1 The Space of Registers
72
4.2
Register Constructions
77
4.2.
1 MRSW Safe Registers
78
4.2.2
A Regular Boolean MRSW Register
78
4.2.3
A Regular M-Valued MRSW Register
79
4.2.4
An Atomic SRSW Register
81
4.2.5
An Atomic MRSW Register
82
4.2.6
An Atomic MRMW Register
85
4.3
Atomic Snapshots
87
4.3.
1 An Obstruction-Free Snapshot
87
4.3.2
A Wait-Free Snapshot
88
4.3.3
Correctness Arguments
90
4.4
Chapter Notes
93
4.5
Exercises
94
5
The Relative Power of Primitive
Synchronization Operations
99
5.1
Consensus Numbers
100
5.1.1
States and Valence 1
0
1
5.2
Atomic Registers 1
03
5.3
Consensus Protocols
106
5.4
FIFO Queues
106
5.5
Multiple Assignment Objects
110
5.6
Read-Modify-Write Operations I 1
2
5.7
Common2 RMW Operations I
14
5.8
The compareAndSetO Operation
116
5.9
Chapter Notes I 1
7
5.10
Exercises
118
Contents
6
Universality of
Consensus
125
6.1
Introduction
125
6.2
Universality
126
6.3
A Lock-Free Universal Construction 1
26
6.4
A Wait-Free Universal Construction
130
6.5
Chapter Notes 1
36
6.6
Exercises
137
ІЇ!
PRACTICE
139
7
Spin Locks and Contention
141
7.
1 Welcome to the Real World 1
4
1
7.2
Test-And-Set Locks
144
7.3
TAS-Based Spin Locks Revisited
146
7.4
Exponential Backoff
147
7.5
Queue Locks
149
7.5.
1 Array-Based Locks 1
50
7.5.2
The CLH Queue Lock 1
5
1
7.5.3
The MCS Queue Lock
154
7.6
A Queue Lock with Timeouts
157
7.7
A Composite Lock
159
7.7.
1 A Fast-Path Composite Lock 1
65
7.8
Hierarchical Locks
167
7.8.1
A Hierarchical Backoff Lock
167
7.8.2
A Hierarchical CLH Queue Lock
168
7.9
One Lock To Rule Them All 1
73
7.
1
0
Chapter Notes 1
73
7.11
Exercises
174
8
Monitors and Blocking Synchronization
177
8.
1 Introduction 1
77
Contents
XI
8.2 Monitor
Locks and Conditions
178
8.2.1
Conditions
179
8.2.2
The Lost-Wakeup Problem
181
8.3
Readers-Writers Locks
183
8.3.1
Simple Readers-Writers Lock
184
8.3.2
Fair Readers-Writers Lock
185
8.4
Our Own Reentrant Lock
187
8.5
Semaphores
189
8.6
Chapter Notes
189
8.7
Exercises
190
9
Linked Lists: The Role of Locking
195
9.1
Introduction
195
9.2
List-Based Sets
196
9.3
Concurrent Reasoning
198
9.4
Coarse-Grained Synchronization
200
9.5
Fine-Grained Synchronization
201
9.6
Optimistic Synchronization
205
9.7
Lazy Synchronization
208
9.8
Non-Blocking Synchronization
213
9.9
Discussion
218
9.10
Chapter Notes
219
9.1 1
Exercises
219
10
Concurrent Queues and the ABA Problem
223
10.1
Introduction
223
10.2
Queues
224
10.3
A Bounded Partial Queue
225
10.4
An Unbounded Total Queue
229
10.5
An Unbounded Lock-Free Queue
230
10.6
Memory Reclamation and the ABA Problem
233
10.6.1
A Naïve
Synchronous Oueue
237
xii Contents
10.7 Dual Data
Structures
238
10.8
Chapter
Notes 241
10.9
Exercises
241
I I Concurrent Stacks and Elimination
245
I I.I Introduction
245
I 1
.2
An Unbounded Lock-Free Stack
245
I
1.3
Elimination
248
I 1
.4
The Elimination Backoff Stack
249
I 1
.4.
1 A Lock-Free Exchanger
249
I
1.4.2
The Elimination Array
251
I 1
.5
Chapter Notes
255
I 1
.6
Exercises
255
1
2
Counting, Sorting, and Distributed
Coordination
259
12.1
Introduction
259
12.2
Shared Counting
259
1
2.3
Software Combining
260
12.3.1
Overview
261
1
2.3.2
An Extended Example
267
12.3.3
Performance and Robustness
269
1
2.4
Quiescently Consistent Pools and Counters
269
1
2.5
Counting Networks
270
1
2.5.
1 Networks That Count
270
1
2.5.2
The Bitonic Counting Network
273
12.5.3
Performance and Pipelining
280
12.6
Diffracting Trees
282
12.7
Parallel Sorting
286
1
2.8
Sorting Networks
286
1
2.8.
1 Designing a Sorting Network
287
12.9
Sample Sorting
290
12.10
Distributed Coordination
291
Contents xiii
12.11
Chapter
Notes 292
12.12
Exercises
293
1
3
Concurrent Hashing and Natural
Parallelism
299
13.1
Introduction
299
13.2
Closed-Address Hash Sets
300
I
3.2.
1 A Coarse-Grained Hash Set
302
I
3.2.2
A Striped Hash Set
303
I
3.2.3
A Refinable Hash Set
305
1
3.3
A Lock-Free Hash Set
309
13.3.1
Recursive Split-Ordering
309
13.3.2
The BucketList Class
312
1
3.3.3
The LockFreeHashSet^ Class
ЗІЗ
1
3.4
An Open-Addressed Hash Set
316
13.4.1
Cuckoo Hashing
316
13.4.2
Concurrent Cuckoo Hashing
318
1
3.4.3
Striped Concurrent Cuckoo Hashing
322
1
3.4.4
A Refinable Concurrent Cuckoo Hash Set
324
13.5
Chapter Notes
325
13.6
Exercises
326
1
4
Skiplists and Balanced Search
329
14.1
Introduction
329
14.2
Sequential Skiplists
329
14.3
A Lock-Based Concurrent Skiplist
331
14.3.1
A Bird s-Eye View
331
14.3.2
The Algorithm
333
14.4
A Lock-Free Concurrent Skiplist
339
14.4.1
A Bird s-Eye View
339
14.4.2
The Algorithm in Detail
341
14.5
Concurrent Skiplists
348
14.6
Chapter Notes
348
14.7
Exercises
349
xiv Contents
1
5
Priority Queues
35
1
15.1
Introduction
351
1
5.
1.1 Concurrent Priority Queues
351
15.2
An Array-Based Bounded Priority Queue
352
15.3
A Tree-Based Bounded Priority Queue
353
15.4
An Unbounded Heap-Based Priority Queue
355
15.4.1
A Sequential Heap
356
1
5.4.2
A Concurrent Heap
357
15.5
A Skiplist-Based Unbounded Priority Queue
363
15.6
Chapter Notes
366
15.7
Exercises
366
1
6
Futures, Scheduling, and Work Distribution
369
16.1
Introduction
369
16.2
Analyzing Parallelism
375
16.3
Realistic Multiprocessor Scheduling
378
1
6.4
Work Distribution
38
1
16.4.1
Work Stealing
381
16.4.2
Yielding and Multiprogramming
381
16.5
Work-Stealing Dequeues
382
1
6.5.
1 A Bounded Work-Stealing Dequeue
383
I
6.5.2
An Unbounded Work-Stealing DEQueue
386
16.5.3
Work Balancing
390
16.6
Chapter Notes
392
16.7
Exercises
392
17
Barriers
397
17.1
Introduction
397
17.2
Barrier Implementations
398
1
7.3
Sense-Reversing Barrier
399
1
7.4
Combining Tree Barrier
40
1
1
7.5
Static Tree Barrier
402
1
7.6
Termination Detecting Barriers
404
Contents
XV
1
7.7
Chapter Notes
408
17.8
Exercises
409
18
Transactional Memory
417
18.1
Introduction
417
1
8.
1
.
1 What is Wrong with Locking?
4
1
7
18.1.2
What is Wrong with compareAndSet
()? 418
1
8.
1
.3
What is Wrong with Compositionaiity?
420
1
8.
1
.4
What can We Do about It?
42
1
1
8.2
Transactions and Atomicity
42
1
1
8.3
Software Transactional Memory
424
1
8.3.
1 Transactions and Transactional Threads
427
1
8.3.2
Zombies and Consistency
428
18.3.3
Atomic Objects
429
1
8.3.4
Dependent or Independent Progress?
43
1
1
8.3.5
Contention Managers
43
1
1
8.3.6
Implementing Atomic Objects
433
1
8.3.7
An Obstruction-Free Atomic Object
434
1
8.3.8
A Lock-Based Atomic Object
438
1
8.4
Hardware Transactional Memory
445
1
8.4.
1 Cache Coherence
446
8.4.2
Transactional Cache Coherence
447
18.4.3
Enhancements
447
18.5
Chapter Notes
448
18.6
Exercises
449
111 APPENDIX
451
A Software Basics
453
A.I Introduction
453
A.2 Java
453
A.2.1 Threads
453
A.2.2 Monitors
455
A.2.3 Yielding and Sleeping
458
A.2.4 Thread-Local Objects
458
XVI Contents
A.3 C#
460
A3.
1 Threads
460
A.3.2 Monitors
461
A.3.3 Thread-Local Objects
462
A.4 Pthreads
464
A.4.1 Thread-Local Storage
465
A.5 Chapter Notes
466
В
Hardware Basics
469
В. І
Introduction (and a Puzzle)
469
B.2 Processors and Threads
472
B.3 Interconnect
472
B.4 Memory
473
B.5 Caches
473
B.5.1 Coherence
474
B.5.2 Spinning
476
B.6 Cache-Conscious Programming, or the Puzzle
Solved
476
B.7 Multi-Core and Multi-Threaded Architectures
477
B.7.1 Relaxed Memory Consistency
478
B.8 Hardware Synchronization Instructions
479
B.9 Chapter Notes
48
1
B.IO Exercises
481
Bibliography
483
Index
495
|
| adam_txt |
Contents
Acknowledgments
xvii
Preface
xix
1 Introduction I
I
.
I Shared Objects and Synchronization
3
1.2
Arable
6
1.2.1
Properties of Mutual Exclusion
8
1
.2.2
The Moral
9
1.3
The Producer-Consumer Problem
10
1
.4
The Readers-Writers Problem 1
2
1.5
The Harsh Realities of Parallelization
13
1.6
Parallel Programming
15
1
.7
Chapter Notes 1
5
1.8
Exercises
16
і
PRINCIPLES
19
2
Mutual Exclusion
21
2.1
Time
21
2.2
Critical Sections
22
vii
viii Contents
2.3
2-Thread Solutions
24
2.3.1
The LockOne
Class
25
2.3.2
The LockTwo Class
26
2.3.3
The Peterson Lock
27
2.4
The Filter Lock
28
2.5
Fairness
31
2.6
Lamport's Bakery Algorithm
ЗІ
2.7
Bounded Timestamps
33
2.8
Lower Bounds on the Number of Locations
37
2.9
Chapter Notes
40
2.10
Exercises
41
3
Concurrent Objects
45
3.1
Concurrency and Correctness
45
3.2
Sequential Objects
48
3.3
Quiescent Consistency
49
3.3.1
Remarks
51
3.4
Sequential Consistency
51
3.4.1
Remarks
52
3.5
Linearizabiiity
54
3.5.
1 Linearization Points
55
3.5.2
Remarks
55
3.6
Formal Definitions
55
3.6.
1 Linearizabiiity
57
3.6.2
Compositional Linearizabiiity
57
3.6.3
The Nonblocking Property
58
3.7
Progress Conditions
59
3.7.
1 Dependent Progress Conditions
60
3.8
The Java Memory Model
61
3.8.
1 Locks and Synchronized Blocks
62
3.8.2
Volatile Fields
63
3.8.3
Final Fields
63
Contents
¡Χ
3.9
Remarks
64
3.10
Chapter Notes
65
3.
1 I Exercises
66
4
Foundations of Shared Memory
71
4.
1 The Space of Registers
72
4.2
Register Constructions
77
4.2.
1 MRSW Safe Registers
78
4.2.2
A Regular Boolean MRSW Register
78
4.2.3
A Regular M-Valued MRSW Register
79
4.2.4
An Atomic SRSW Register
81
4.2.5
An Atomic MRSW Register
82
4.2.6
An Atomic MRMW Register
85
4.3
Atomic Snapshots
87
4.3.
1 An Obstruction-Free Snapshot
87
4.3.2
A Wait-Free Snapshot
88
4.3.3
Correctness Arguments
90
4.4
Chapter Notes
93
4.5
Exercises
94
5
The Relative Power of Primitive
Synchronization Operations
99
5.1
Consensus Numbers
100
5.1.1
States and Valence 1
0
1
5.2
Atomic Registers 1
03
5.3
Consensus Protocols
106
5.4
FIFO Queues
106
5.5
Multiple Assignment Objects
110
5.6
Read-Modify-Write Operations I 1
2
5.7
Common2 RMW Operations I
14
5.8
The compareAndSetO Operation
116
5.9
Chapter Notes I 1
7
5.10
Exercises
118
Contents
6
Universality of
Consensus
125
6.1
Introduction
125
6.2
Universality
126
6.3
A Lock-Free Universal Construction 1
26
6.4
A Wait-Free Universal Construction
130
6.5
Chapter Notes 1
36
6.6
Exercises
137
ІЇ!
PRACTICE
139
7
Spin Locks and Contention
141
7.
1 Welcome to the Real World 1
4
1
7.2
Test-And-Set Locks
144
7.3
TAS-Based Spin Locks Revisited
146
7.4
Exponential Backoff
147
7.5
Queue Locks
149
7.5.
1 Array-Based Locks 1
50
7.5.2
The CLH Queue Lock 1
5
1
7.5.3
The MCS Queue Lock
154
7.6
A Queue Lock with Timeouts
157
7.7
A Composite Lock
159
7.7.
1 A Fast-Path Composite Lock 1
65
7.8
Hierarchical Locks
167
7.8.1
A Hierarchical Backoff Lock
167
7.8.2
A Hierarchical CLH Queue Lock
168
7.9
One Lock To Rule Them All 1
73
7.
1
0
Chapter Notes 1
73
7.11
Exercises
174
8
Monitors and Blocking Synchronization
177
8.
1 Introduction 1
77
Contents
XI
8.2 Monitor
Locks and Conditions
178
8.2.1
Conditions
179
8.2.2
The Lost-Wakeup Problem
181
8.3
Readers-Writers Locks
183
8.3.1
Simple Readers-Writers Lock
184
8.3.2
Fair Readers-Writers Lock
185
8.4
Our Own Reentrant Lock
187
8.5
Semaphores
189
8.6
Chapter Notes
189
8.7
Exercises
190
9
Linked Lists: The Role of Locking
195
9.1
Introduction
195
9.2
List-Based Sets
196
9.3
Concurrent Reasoning
198
9.4
Coarse-Grained Synchronization
200
9.5
Fine-Grained Synchronization
201
9.6
Optimistic Synchronization
205
9.7
Lazy Synchronization
208
9.8
Non-Blocking Synchronization
213
9.9
Discussion
218
9.10
Chapter Notes
219
9.1 1
Exercises
219
10
Concurrent Queues and the ABA Problem
223
10.1
Introduction
223
10.2
Queues
224
10.3
A Bounded Partial Queue
225
10.4
An Unbounded Total Queue
229
10.5
An Unbounded Lock-Free Queue
230
10.6
Memory Reclamation and the ABA Problem
233
10.6.1
A Naïve
Synchronous Oueue
237
xii Contents
10.7 Dual Data
Structures
238
10.8
Chapter
Notes 241
10.9
Exercises
241
I I Concurrent Stacks and Elimination
245
I I.I Introduction
245
I 1
.2
An Unbounded Lock-Free Stack
245
I
1.3
Elimination
248
I 1
.4
The Elimination Backoff Stack
249
I 1
.4.
1 A Lock-Free Exchanger
249
I
1.4.2
The Elimination Array
251
I 1
.5
Chapter Notes
255
I 1
.6
Exercises
255
1
2
Counting, Sorting, and Distributed
Coordination
259
12.1
Introduction
259
12.2
Shared Counting
259
1
2.3
Software Combining
260
12.3.1
Overview
261
1
2.3.2
An Extended Example
267
12.3.3
Performance and Robustness
269
1
2.4
Quiescently Consistent Pools and Counters
269
1
2.5
Counting Networks
270
1
2.5.
1 Networks That Count
270
1
2.5.2
The Bitonic Counting Network
273
12.5.3
Performance and Pipelining
280
12.6
Diffracting Trees
282
12.7
Parallel Sorting
286
1
2.8
Sorting Networks
286
1
2.8.
1 Designing a Sorting Network
287
12.9
Sample Sorting
290
12.10
Distributed Coordination
291
Contents xiii
12.11
Chapter
Notes 292
12.12
Exercises
293
1
3
Concurrent Hashing and Natural
Parallelism
299
13.1
Introduction
299
13.2
Closed-Address Hash Sets
300
I
3.2.
1 A Coarse-Grained Hash Set
302
I
3.2.2
A Striped Hash Set
303
I
3.2.3
A Refinable Hash Set
305
1
3.3
A Lock-Free Hash Set
309
13.3.1
Recursive Split-Ordering
309
13.3.2
The BucketList Class
312
1
3.3.3
The LockFreeHashSet^ Class
ЗІЗ
1
3.4
An Open-Addressed Hash Set
316
13.4.1
Cuckoo Hashing
316
13.4.2
Concurrent Cuckoo Hashing
318
1
3.4.3
Striped Concurrent Cuckoo Hashing
322
1
3.4.4
A Refinable Concurrent Cuckoo Hash Set
324
13.5
Chapter Notes
325
13.6
Exercises
326
1
4
Skiplists and Balanced Search
329
14.1
Introduction
329
14.2
Sequential Skiplists
329
14.3
A Lock-Based Concurrent Skiplist
331
14.3.1
A Bird's-Eye View
331
14.3.2
The Algorithm
333
14.4
A Lock-Free Concurrent Skiplist
339
14.4.1
A Bird's-Eye View
339
14.4.2
The Algorithm in Detail
341
14.5
Concurrent Skiplists
348
14.6
Chapter Notes
348
14.7
Exercises
349
xiv Contents
1
5
Priority Queues
35
1
15.1
Introduction
351
1
5.
1.1 Concurrent Priority Queues
351
15.2
An Array-Based Bounded Priority Queue
352
15.3
A Tree-Based Bounded Priority Queue
353
15.4
An Unbounded Heap-Based Priority Queue
355
15.4.1
A Sequential Heap
356
1
5.4.2
A Concurrent Heap
357
15.5
A Skiplist-Based Unbounded Priority Queue
363
15.6
Chapter Notes
366
15.7
Exercises
366
1
6
Futures, Scheduling, and Work Distribution
369
16.1
Introduction
369
16.2
Analyzing Parallelism
375
16.3
Realistic Multiprocessor Scheduling
378
1
6.4
Work Distribution
38
1
16.4.1
Work Stealing
381
16.4.2
Yielding and Multiprogramming
381
16.5
Work-Stealing Dequeues
382
1
6.5.
1 A Bounded Work-Stealing Dequeue
383
I
6.5.2
An Unbounded Work-Stealing DEQueue
386
16.5.3
Work Balancing
390
16.6
Chapter Notes
392
16.7
Exercises
392
17
Barriers
397
17.1
Introduction
397
17.2
Barrier Implementations
398
1
7.3
Sense-Reversing Barrier
399
1
7.4
Combining Tree Barrier
40
1
1
7.5
Static Tree Barrier
402
1
7.6
Termination Detecting Barriers
404
Contents
XV
1
7.7
Chapter Notes
408
17.8
Exercises
409
18
Transactional Memory
417
18.1
Introduction
417
1
8.
1
.
1 What is Wrong with Locking?
4
1
7
18.1.2
What is Wrong with compareAndSet
()? 418
1
8.
1
.3
What is Wrong with Compositionaiity?
420
1
8.
1
.4
What can We Do about It?
42
1
1
8.2
Transactions and Atomicity
42
1
1
8.3
Software Transactional Memory
424
1
8.3.
1 Transactions and Transactional Threads
427
1
8.3.2
Zombies and Consistency
428
18.3.3
Atomic Objects
429
1
8.3.4
Dependent or Independent Progress?
43
1
1
8.3.5
Contention Managers
43
1
1
8.3.6
Implementing Atomic Objects
433
1
8.3.7
An Obstruction-Free Atomic Object
434
1
8.3.8
A Lock-Based Atomic Object
438
1
8.4
Hardware Transactional Memory
445
1
8.4.
1 Cache Coherence
446
8.4.2
Transactional Cache Coherence
447
18.4.3
Enhancements
447
18.5
Chapter Notes
448
18.6
Exercises
449
111 APPENDIX
451
A Software Basics
453
A.I Introduction
453
A.2 Java
453
A.2.1 Threads
453
A.2.2 Monitors
455
A.2.3 Yielding and Sleeping
458
A.2.4 Thread-Local Objects
458
XVI Contents
A.3 C#
460
A3.
1 Threads
460
A.3.2 Monitors
461
A.3.3 Thread-Local Objects
462
A.4 Pthreads
464
A.4.1 Thread-Local Storage
465
A.5 Chapter Notes
466
В
Hardware Basics
469
В. І
Introduction (and a Puzzle)
469
B.2 Processors and Threads
472
B.3 Interconnect
472
B.4 Memory
473
B.5 Caches
473
B.5.1 Coherence
474
B.5.2 Spinning
476
B.6 Cache-Conscious Programming, or the Puzzle
Solved
476
B.7 Multi-Core and Multi-Threaded Architectures
477
B.7.1 Relaxed Memory Consistency
478
B.8 Hardware Synchronization Instructions
479
B.9 Chapter Notes
48
1
B.IO Exercises
481
Bibliography
483
Index
495 |
| any_adam_object | 1 |
| any_adam_object_boolean | 1 |
| author | Herlihy, Maurice 1954- Shavit, Nir 1959- |
| author_GND | (DE-588)135665558 (DE-588)135665612 |
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| dewey-hundreds | 000 - Computer science, information, general works |
| dewey-ones | 005 - Computer programming, programs, data, security |
| dewey-raw | 005.434 005.434 22 |
| dewey-search | 005.434 005.434 22 |
| dewey-sort | 15.434 |
| dewey-tens | 000 - Computer science, information, general works |
| discipline | Informatik |
| discipline_str_mv | Informatik |
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| spelling | Herlihy, Maurice 1954- Verfasser (DE-588)135665558 aut The art of multiprocessor programming Maurice Herlihy ; Nir Shavit Amsterdam [u.a.] Elsevier, Morgan Kaufmann 2008 XX, 508 S. graph. Darst. txt rdacontent n rdamedia nc rdacarrier Multiprocesseurs Multiprogrammation Multiprogramming (Electronic computers) Multiprocessors Programmierung (DE-588)4076370-5 gnd rswk-swf Mehrprozessorsystem (DE-588)4038397-0 gnd rswk-swf (DE-588)4123623-3 Lehrbuch gnd-content Mehrprozessorsystem (DE-588)4038397-0 s Programmierung (DE-588)4076370-5 s DE-604 Shavit, Nir 1959- Verfasser (DE-588)135665612 aut Digitalisierung UB Bamberg application/pdf http://bvbr.bib-bvb.de:8991/F?func=service&doc_library=BVB01&local_base=BVB01&doc_number=016397704&sequence=000002&line_number=0001&func_code=DB_RECORDS&service_type=MEDIA Inhaltsverzeichnis |
| spellingShingle | Herlihy, Maurice 1954- Shavit, Nir 1959- The art of multiprocessor programming Multiprocesseurs Multiprogrammation Multiprogramming (Electronic computers) Multiprocessors Programmierung (DE-588)4076370-5 gnd Mehrprozessorsystem (DE-588)4038397-0 gnd |
| subject_GND | (DE-588)4076370-5 (DE-588)4038397-0 (DE-588)4123623-3 |
| title | The art of multiprocessor programming |
| title_auth | The art of multiprocessor programming |
| title_exact_search | The art of multiprocessor programming |
| title_exact_search_txtP | The art of multiprocessor programming |
| title_full | The art of multiprocessor programming Maurice Herlihy ; Nir Shavit |
| title_fullStr | The art of multiprocessor programming Maurice Herlihy ; Nir Shavit |
| title_full_unstemmed | The art of multiprocessor programming Maurice Herlihy ; Nir Shavit |
| title_short | The art of multiprocessor programming |
| title_sort | the art of multiprocessor programming |
| topic | Multiprocesseurs Multiprogrammation Multiprogramming (Electronic computers) Multiprocessors Programmierung (DE-588)4076370-5 gnd Mehrprozessorsystem (DE-588)4038397-0 gnd |
| topic_facet | Multiprocesseurs Multiprogrammation Multiprogramming (Electronic computers) Multiprocessors Programmierung Mehrprozessorsystem Lehrbuch |
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