Digital VLSI systems design: a design manual for implementation of projects on FPGAs and ASICs using Verilog
Gespeichert in:
1. Verfasser: | |
---|---|
Format: | Elektronisch E-Book |
Sprache: | English |
Veröffentlicht: |
Dordrecht
Springer
2007
|
Schlagworte: | |
Online-Zugang: | BTU01 FHR01 Volltext |
Beschreibung: | 1 Online-Ressource |
ISBN: | 9781402058288 9781402058295 |
DOI: | 10.1007/978-1-4020-5829-5 |
Internformat
MARC
LEADER | 00000nmm a2200000 c 4500 | ||
---|---|---|---|
001 | BV023119936 | ||
003 | DE-604 | ||
005 | 20091111 | ||
007 | cr|uuu---uuuuu | ||
008 | 080208s2007 gw |||| o||u| ||||||eng d | ||
020 | |a 9781402058288 |9 978-1-402-05828-8 | ||
020 | |a 9781402058295 |c Online |9 978-1-4020-5829-5 | ||
024 | 7 | |a 10.1007/978-1-4020-5829-5 |2 doi | |
035 | |a (OCoLC)315669926 | ||
035 | |a (DE-599)BVBBV023119936 | ||
040 | |a DE-604 |b ger |e rakddb | ||
041 | 0 | |a eng | |
044 | |a gw |c XA-DE-BE | ||
049 | |a DE-898 |a DE-83 |a DE-634 | ||
084 | |a ZN 4950 |0 (DE-625)157424: |2 rvk | ||
084 | |a ZN 4952 |0 (DE-625)157425: |2 rvk | ||
084 | |a 620 |2 sdnb | ||
100 | 1 | |a Ramachandran, Seetharaman |e Verfasser |4 aut | |
245 | 1 | 0 | |a Digital VLSI systems design |b a design manual for implementation of projects on FPGAs and ASICs using Verilog |c by S. Ramachandran |
264 | 1 | |a Dordrecht |b Springer |c 2007 | |
300 | |a 1 Online-Ressource | ||
336 | |b txt |2 rdacontent | ||
337 | |b c |2 rdamedia | ||
338 | |b cr |2 rdacarrier | ||
650 | 0 | 7 | |a Digitale integrierte Schaltung |0 (DE-588)4113313-4 |2 gnd |9 rswk-swf |
650 | 0 | 7 | |a Entwurf |0 (DE-588)4121208-3 |2 gnd |9 rswk-swf |
650 | 0 | 7 | |a VLSI |0 (DE-588)4117388-0 |2 gnd |9 rswk-swf |
689 | 0 | 0 | |a Digitale integrierte Schaltung |0 (DE-588)4113313-4 |D s |
689 | 0 | 1 | |a VLSI |0 (DE-588)4117388-0 |D s |
689 | 0 | 2 | |a Entwurf |0 (DE-588)4121208-3 |D s |
689 | 0 | |5 DE-604 | |
856 | 4 | 0 | |u https://doi.org/10.1007/978-1-4020-5829-5 |x Verlag |3 Volltext |
912 | |a ZDB-2-ENG | ||
999 | |a oai:aleph.bib-bvb.de:BVB01-016322417 | ||
966 | e | |u https://doi.org/10.1007/978-1-4020-5829-5 |l BTU01 |p ZDB-2-ENG |x Verlag |3 Volltext | |
966 | e | |u https://doi.org/10.1007/978-1-4020-5829-5 |l FHR01 |p ZDB-2-ENG |x Verlag |3 Volltext |
Datensatz im Suchindex
_version_ | 1804137388641878017 |
---|---|
adam_txt | |
any_adam_object | |
any_adam_object_boolean | |
author | Ramachandran, Seetharaman |
author_facet | Ramachandran, Seetharaman |
author_role | aut |
author_sort | Ramachandran, Seetharaman |
author_variant | s r sr |
building | Verbundindex |
bvnumber | BV023119936 |
classification_rvk | ZN 4950 ZN 4952 |
collection | ZDB-2-ENG |
ctrlnum | (OCoLC)315669926 (DE-599)BVBBV023119936 |
discipline | Maschinenbau / Maschinenwesen Elektrotechnik / Elektronik / Nachrichtentechnik |
discipline_str_mv | Maschinenbau / Maschinenwesen Elektrotechnik / Elektronik / Nachrichtentechnik |
doi_str_mv | 10.1007/978-1-4020-5829-5 |
format | Electronic eBook |
fullrecord | <?xml version="1.0" encoding="UTF-8"?><collection xmlns="http://www.loc.gov/MARC21/slim"><record><leader>01733nmm a2200457 c 4500</leader><controlfield tag="001">BV023119936</controlfield><controlfield tag="003">DE-604</controlfield><controlfield tag="005">20091111 </controlfield><controlfield tag="007">cr|uuu---uuuuu</controlfield><controlfield tag="008">080208s2007 gw |||| o||u| ||||||eng d</controlfield><datafield tag="020" ind1=" " ind2=" "><subfield code="a">9781402058288</subfield><subfield code="9">978-1-402-05828-8</subfield></datafield><datafield tag="020" ind1=" " ind2=" "><subfield code="a">9781402058295</subfield><subfield code="c">Online</subfield><subfield code="9">978-1-4020-5829-5</subfield></datafield><datafield tag="024" ind1="7" ind2=" "><subfield code="a">10.1007/978-1-4020-5829-5</subfield><subfield code="2">doi</subfield></datafield><datafield tag="035" ind1=" " ind2=" "><subfield code="a">(OCoLC)315669926</subfield></datafield><datafield tag="035" ind1=" " ind2=" "><subfield code="a">(DE-599)BVBBV023119936</subfield></datafield><datafield tag="040" ind1=" " ind2=" "><subfield code="a">DE-604</subfield><subfield code="b">ger</subfield><subfield code="e">rakddb</subfield></datafield><datafield tag="041" ind1="0" ind2=" "><subfield code="a">eng</subfield></datafield><datafield tag="044" ind1=" " ind2=" "><subfield code="a">gw</subfield><subfield code="c">XA-DE-BE</subfield></datafield><datafield tag="049" ind1=" " ind2=" "><subfield code="a">DE-898</subfield><subfield code="a">DE-83</subfield><subfield code="a">DE-634</subfield></datafield><datafield tag="084" ind1=" " ind2=" "><subfield code="a">ZN 4950</subfield><subfield code="0">(DE-625)157424:</subfield><subfield code="2">rvk</subfield></datafield><datafield tag="084" ind1=" " ind2=" "><subfield code="a">ZN 4952</subfield><subfield code="0">(DE-625)157425:</subfield><subfield code="2">rvk</subfield></datafield><datafield tag="084" ind1=" " ind2=" "><subfield code="a">620</subfield><subfield code="2">sdnb</subfield></datafield><datafield tag="100" ind1="1" ind2=" "><subfield code="a">Ramachandran, Seetharaman</subfield><subfield code="e">Verfasser</subfield><subfield code="4">aut</subfield></datafield><datafield tag="245" ind1="1" ind2="0"><subfield code="a">Digital VLSI systems design</subfield><subfield code="b">a design manual for implementation of projects on FPGAs and ASICs using Verilog</subfield><subfield code="c">by S. Ramachandran</subfield></datafield><datafield tag="264" ind1=" " ind2="1"><subfield code="a">Dordrecht</subfield><subfield code="b">Springer</subfield><subfield code="c">2007</subfield></datafield><datafield tag="300" ind1=" " ind2=" "><subfield code="a">1 Online-Ressource</subfield></datafield><datafield tag="336" ind1=" " ind2=" "><subfield code="b">txt</subfield><subfield code="2">rdacontent</subfield></datafield><datafield tag="337" ind1=" " ind2=" "><subfield code="b">c</subfield><subfield code="2">rdamedia</subfield></datafield><datafield tag="338" ind1=" " ind2=" "><subfield code="b">cr</subfield><subfield code="2">rdacarrier</subfield></datafield><datafield tag="650" ind1="0" ind2="7"><subfield code="a">Digitale integrierte Schaltung</subfield><subfield code="0">(DE-588)4113313-4</subfield><subfield code="2">gnd</subfield><subfield code="9">rswk-swf</subfield></datafield><datafield tag="650" ind1="0" ind2="7"><subfield code="a">Entwurf</subfield><subfield code="0">(DE-588)4121208-3</subfield><subfield code="2">gnd</subfield><subfield code="9">rswk-swf</subfield></datafield><datafield tag="650" ind1="0" ind2="7"><subfield code="a">VLSI</subfield><subfield code="0">(DE-588)4117388-0</subfield><subfield code="2">gnd</subfield><subfield code="9">rswk-swf</subfield></datafield><datafield tag="689" ind1="0" ind2="0"><subfield code="a">Digitale integrierte Schaltung</subfield><subfield code="0">(DE-588)4113313-4</subfield><subfield code="D">s</subfield></datafield><datafield tag="689" ind1="0" ind2="1"><subfield code="a">VLSI</subfield><subfield code="0">(DE-588)4117388-0</subfield><subfield code="D">s</subfield></datafield><datafield tag="689" ind1="0" ind2="2"><subfield code="a">Entwurf</subfield><subfield code="0">(DE-588)4121208-3</subfield><subfield code="D">s</subfield></datafield><datafield tag="689" ind1="0" ind2=" "><subfield code="5">DE-604</subfield></datafield><datafield tag="856" ind1="4" ind2="0"><subfield code="u">https://doi.org/10.1007/978-1-4020-5829-5</subfield><subfield code="x">Verlag</subfield><subfield code="3">Volltext</subfield></datafield><datafield tag="912" ind1=" " ind2=" "><subfield code="a">ZDB-2-ENG</subfield></datafield><datafield tag="999" ind1=" " ind2=" "><subfield code="a">oai:aleph.bib-bvb.de:BVB01-016322417</subfield></datafield><datafield tag="966" ind1="e" ind2=" "><subfield code="u">https://doi.org/10.1007/978-1-4020-5829-5</subfield><subfield code="l">BTU01</subfield><subfield code="p">ZDB-2-ENG</subfield><subfield code="x">Verlag</subfield><subfield code="3">Volltext</subfield></datafield><datafield tag="966" ind1="e" ind2=" "><subfield code="u">https://doi.org/10.1007/978-1-4020-5829-5</subfield><subfield code="l">FHR01</subfield><subfield code="p">ZDB-2-ENG</subfield><subfield code="x">Verlag</subfield><subfield code="3">Volltext</subfield></datafield></record></collection> |
id | DE-604.BV023119936 |
illustrated | Not Illustrated |
index_date | 2024-07-02T19:51:07Z |
indexdate | 2024-07-09T21:11:29Z |
institution | BVB |
isbn | 9781402058288 9781402058295 |
language | English |
oai_aleph_id | oai:aleph.bib-bvb.de:BVB01-016322417 |
oclc_num | 315669926 |
open_access_boolean | |
owner | DE-898 DE-BY-UBR DE-83 DE-634 |
owner_facet | DE-898 DE-BY-UBR DE-83 DE-634 |
physical | 1 Online-Ressource |
psigel | ZDB-2-ENG |
publishDate | 2007 |
publishDateSearch | 2007 |
publishDateSort | 2007 |
publisher | Springer |
record_format | marc |
spelling | Ramachandran, Seetharaman Verfasser aut Digital VLSI systems design a design manual for implementation of projects on FPGAs and ASICs using Verilog by S. Ramachandran Dordrecht Springer 2007 1 Online-Ressource txt rdacontent c rdamedia cr rdacarrier Digitale integrierte Schaltung (DE-588)4113313-4 gnd rswk-swf Entwurf (DE-588)4121208-3 gnd rswk-swf VLSI (DE-588)4117388-0 gnd rswk-swf Digitale integrierte Schaltung (DE-588)4113313-4 s VLSI (DE-588)4117388-0 s Entwurf (DE-588)4121208-3 s DE-604 https://doi.org/10.1007/978-1-4020-5829-5 Verlag Volltext |
spellingShingle | Ramachandran, Seetharaman Digital VLSI systems design a design manual for implementation of projects on FPGAs and ASICs using Verilog Digitale integrierte Schaltung (DE-588)4113313-4 gnd Entwurf (DE-588)4121208-3 gnd VLSI (DE-588)4117388-0 gnd |
subject_GND | (DE-588)4113313-4 (DE-588)4121208-3 (DE-588)4117388-0 |
title | Digital VLSI systems design a design manual for implementation of projects on FPGAs and ASICs using Verilog |
title_auth | Digital VLSI systems design a design manual for implementation of projects on FPGAs and ASICs using Verilog |
title_exact_search | Digital VLSI systems design a design manual for implementation of projects on FPGAs and ASICs using Verilog |
title_exact_search_txtP | Digital VLSI systems design a design manual for implementation of projects on FPGAs and ASICs using Verilog |
title_full | Digital VLSI systems design a design manual for implementation of projects on FPGAs and ASICs using Verilog by S. Ramachandran |
title_fullStr | Digital VLSI systems design a design manual for implementation of projects on FPGAs and ASICs using Verilog by S. Ramachandran |
title_full_unstemmed | Digital VLSI systems design a design manual for implementation of projects on FPGAs and ASICs using Verilog by S. Ramachandran |
title_short | Digital VLSI systems design |
title_sort | digital vlsi systems design a design manual for implementation of projects on fpgas and asics using verilog |
title_sub | a design manual for implementation of projects on FPGAs and ASICs using Verilog |
topic | Digitale integrierte Schaltung (DE-588)4113313-4 gnd Entwurf (DE-588)4121208-3 gnd VLSI (DE-588)4117388-0 gnd |
topic_facet | Digitale integrierte Schaltung Entwurf VLSI |
url | https://doi.org/10.1007/978-1-4020-5829-5 |
work_keys_str_mv | AT ramachandranseetharaman digitalvlsisystemsdesignadesignmanualforimplementationofprojectsonfpgasandasicsusingverilog |