SystemVerilog for design: a guide to using SystemVerilog for hardware design and modeling
Gespeichert in:
| Hauptverfasser: | , |
|---|---|
| Format: | Elektronisch E-Book |
| Sprache: | English |
| Veröffentlicht: |
New York [u.a.]
Springer
2006
|
| Ausgabe: | 2. ed. |
| Schlagworte: | |
| Online-Zugang: | BTU01 FHR01 Volltext |
| Beschreibung: | Includes bibliographical references and index |
| Beschreibung: | 1 Online-Ressource (xxx, 418 p.) ill. |
| ISBN: | 9780387333991 9780387364957 |
| DOI: | 10.1007/0-387-36495-1 |
Internformat
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| 245 | 1 | 0 | |a SystemVerilog for design |b a guide to using SystemVerilog for hardware design and modeling |c by Stuart Sutherland ; Simon Davidmann ; Peter Flak. Foreword by Phil Moorby |
| 250 | |a 2. ed. | ||
| 264 | 1 | |a New York [u.a.] |b Springer |c 2006 | |
| 300 | |a 1 Online-Ressource (xxx, 418 p.) |b ill. | ||
| 336 | |b txt |2 rdacontent | ||
| 337 | |b c |2 rdamedia | ||
| 338 | |b cr |2 rdacarrier | ||
| 500 | |a Includes bibliographical references and index | ||
| 650 | 4 | |a Verilog (Computer hardware description language) | |
| 650 | 4 | |a Electronic digital computers |x Design and construction | |
| 650 | 4 | |a Computer simulation | |
| 650 | 0 | 7 | |a VERILOG |0 (DE-588)4268385-3 |2 gnd |9 rswk-swf |
| 689 | 0 | 0 | |a VERILOG |0 (DE-588)4268385-3 |D s |
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| 700 | 1 | |a Sutherland, Stuart |e Sonstige |4 oth | |
| 700 | 1 | |a Davidmann, Simon |e Verfasser |4 aut | |
| 700 | 1 | |a Flake, Peter |e Verfasser |4 aut | |
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Datensatz im Suchindex
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| author | Davidmann, Simon Flake, Peter |
| author_facet | Davidmann, Simon Flake, Peter |
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| author_sort | Davidmann, Simon |
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| building | Verbundindex |
| bvnumber | BV023118454 |
| classification_rvk | ST 250 |
| collection | ZDB-2-ENG |
| ctrlnum | (OCoLC)255372743 (DE-599)BVBBV023118454 |
| discipline | Informatik |
| discipline_str_mv | Informatik |
| doi_str_mv | 10.1007/0-387-36495-1 |
| edition | 2. ed. |
| format | Electronic eBook |
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| illustrated | Illustrated |
| index_date | 2024-07-02T19:50:45Z |
| indexdate | 2024-07-09T21:11:27Z |
| institution | BVB |
| isbn | 9780387333991 9780387364957 |
| language | English |
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| physical | 1 Online-Ressource (xxx, 418 p.) ill. |
| psigel | ZDB-2-ENG |
| publishDate | 2006 |
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| publisher | Springer |
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| spelling | SystemVerilog for design a guide to using SystemVerilog for hardware design and modeling by Stuart Sutherland ; Simon Davidmann ; Peter Flak. Foreword by Phil Moorby 2. ed. New York [u.a.] Springer 2006 1 Online-Ressource (xxx, 418 p.) ill. txt rdacontent c rdamedia cr rdacarrier Includes bibliographical references and index Verilog (Computer hardware description language) Electronic digital computers Design and construction Computer simulation VERILOG (DE-588)4268385-3 gnd rswk-swf VERILOG (DE-588)4268385-3 s DE-604 Sutherland, Stuart Sonstige oth Davidmann, Simon Verfasser aut Flake, Peter Verfasser aut https://doi.org/10.1007/0-387-36495-1 Verlag Volltext |
| spellingShingle | Davidmann, Simon Flake, Peter SystemVerilog for design a guide to using SystemVerilog for hardware design and modeling Verilog (Computer hardware description language) Electronic digital computers Design and construction Computer simulation VERILOG (DE-588)4268385-3 gnd |
| subject_GND | (DE-588)4268385-3 |
| title | SystemVerilog for design a guide to using SystemVerilog for hardware design and modeling |
| title_auth | SystemVerilog for design a guide to using SystemVerilog for hardware design and modeling |
| title_exact_search | SystemVerilog for design a guide to using SystemVerilog for hardware design and modeling |
| title_exact_search_txtP | SystemVerilog for design a guide to using SystemVerilog for hardware design and modeling |
| title_full | SystemVerilog for design a guide to using SystemVerilog for hardware design and modeling by Stuart Sutherland ; Simon Davidmann ; Peter Flak. Foreword by Phil Moorby |
| title_fullStr | SystemVerilog for design a guide to using SystemVerilog for hardware design and modeling by Stuart Sutherland ; Simon Davidmann ; Peter Flak. Foreword by Phil Moorby |
| title_full_unstemmed | SystemVerilog for design a guide to using SystemVerilog for hardware design and modeling by Stuart Sutherland ; Simon Davidmann ; Peter Flak. Foreword by Phil Moorby |
| title_short | SystemVerilog for design |
| title_sort | systemverilog for design a guide to using systemverilog for hardware design and modeling |
| title_sub | a guide to using SystemVerilog for hardware design and modeling |
| topic | Verilog (Computer hardware description language) Electronic digital computers Design and construction Computer simulation VERILOG (DE-588)4268385-3 gnd |
| topic_facet | Verilog (Computer hardware description language) Electronic digital computers Design and construction Computer simulation VERILOG |
| url | https://doi.org/10.1007/0-387-36495-1 |
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