Routing congestion in VLSI circuits: estimation and optimization
Gespeichert in:
| Format: | Elektronisch E-Book |
|---|---|
| Sprache: | English |
| Veröffentlicht: |
New York, NY
Springer
2007
|
| Schriftenreihe: | Series on integrated circuits and systems
|
| Online-Zugang: | BTU01 FHR01 Volltext |
| Beschreibung: | 1 Online-Ressource |
| ISBN: | 0387300376 0387485503 9780387300375 9780387485508 |
| DOI: | 10.1007/0-387-48550-3 |
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| id | DE-604.BV023101092 |
| illustrated | Not Illustrated |
| index_date | 2024-07-02T19:44:43Z |
| indexdate | 2024-07-09T21:11:02Z |
| institution | BVB |
| isbn | 0387300376 0387485503 9780387300375 9780387485508 |
| language | English |
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| physical | 1 Online-Ressource |
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| publishDate | 2007 |
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| publisher | Springer |
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| series2 | Series on integrated circuits and systems |
| spelling | Routing congestion in VLSI circuits estimation and optimization Prashant Saxena ; Rupesh S. Shelar ; Sachin S. Sapatnekar New York, NY Springer 2007 1 Online-Ressource txt rdacontent c rdamedia cr rdacarrier Series on integrated circuits and systems Saxena, Prashant Sonstige oth Shelar, Rupesh S. Sonstige oth Sapatnekar, Sachin S. Sonstige oth https://doi.org/10.1007/0-387-48550-3 Verlag Volltext |
| spellingShingle | Routing congestion in VLSI circuits estimation and optimization |
| title | Routing congestion in VLSI circuits estimation and optimization |
| title_auth | Routing congestion in VLSI circuits estimation and optimization |
| title_exact_search | Routing congestion in VLSI circuits estimation and optimization |
| title_exact_search_txtP | Routing congestion in VLSI circuits estimation and optimization |
| title_full | Routing congestion in VLSI circuits estimation and optimization Prashant Saxena ; Rupesh S. Shelar ; Sachin S. Sapatnekar |
| title_fullStr | Routing congestion in VLSI circuits estimation and optimization Prashant Saxena ; Rupesh S. Shelar ; Sachin S. Sapatnekar |
| title_full_unstemmed | Routing congestion in VLSI circuits estimation and optimization Prashant Saxena ; Rupesh S. Shelar ; Sachin S. Sapatnekar |
| title_short | Routing congestion in VLSI circuits |
| title_sort | routing congestion in vlsi circuits estimation and optimization |
| title_sub | estimation and optimization |
| url | https://doi.org/10.1007/0-387-48550-3 |
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