Sensitivity and optimization:
Gespeichert in:
| Hauptverfasser: | , |
|---|---|
| Format: | Buch |
| Sprache: | English |
| Veröffentlicht: |
Amsterdam [u.a.]
Elsevier
1980
|
| Schriftenreihe: | Computer-aided design of electronic circuits
2 |
| Schlagworte: | |
| Beschreibung: | XII, 368 S. |
| ISBN: | 0444419292 |
Internformat
MARC
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| 264 | 1 | |a Amsterdam [u.a.] |b Elsevier |c 1980 | |
| 300 | |a XII, 368 S. | ||
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Datensatz im Suchindex
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| dewey-full | 621.3815/3 |
| dewey-hundreds | 600 - Technology (Applied sciences) |
| dewey-ones | 621 - Applied physics |
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| dewey-search | 621.3815/3 |
| dewey-sort | 3621.3815 13 |
| dewey-tens | 620 - Engineering and allied operations |
| discipline | Mathematik Elektrotechnik / Elektronik / Nachrichtentechnik |
| discipline_str_mv | Mathematik Elektrotechnik / Elektronik / Nachrichtentechnik |
| format | Book |
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| illustrated | Not Illustrated |
| index_date | 2024-07-02T16:11:51Z |
| indexdate | 2024-07-09T20:49:13Z |
| institution | BVB |
| isbn | 0444419292 |
| language | English |
| oai_aleph_id | oai:aleph.bib-bvb.de:BVB01-015226424 |
| oclc_num | 6735434 |
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| owner | DE-706 |
| owner_facet | DE-706 |
| physical | XII, 368 S. |
| publishDate | 1980 |
| publishDateSearch | 1980 |
| publishDateSort | 1980 |
| publisher | Elsevier |
| record_format | marc |
| series | Computer-aided design of electronic circuits |
| series2 | Computer-aided design of electronic circuits |
| spelling | Brayton, Robert K. Verfasser aut Sensitivity and optimization Robert K. Brayton ; Robert Spence Amsterdam [u.a.] Elsevier 1980 XII, 368 S. txt rdacontent n rdamedia nc rdacarrier Computer-aided design of electronic circuits 2 Datenverarbeitung Electronic circuit design Data processing Simulation (DE-588)4055072-2 gnd rswk-swf Netzwerkanalyse (DE-588)4075298-7 gnd rswk-swf Sensitivitätsanalyse (DE-588)4129730-1 gnd rswk-swf Schaltungsentwurf (DE-588)4179389-4 gnd rswk-swf Logischer Entwurf (DE-588)4168051-0 gnd rswk-swf CAD (DE-588)4069794-0 gnd rswk-swf Simulation (DE-588)4055072-2 s DE-604 CAD (DE-588)4069794-0 s Netzwerkanalyse (DE-588)4075298-7 s Schaltungsentwurf (DE-588)4179389-4 s Logischer Entwurf (DE-588)4168051-0 s Sensitivitätsanalyse (DE-588)4129730-1 s 1\p DE-604 Spence, Robert Verfasser aut Computer-aided design of electronic circuits 2 (DE-604)BV021844930 1\p cgwrk 20201028 DE-101 https://d-nb.info/provenance/plan#cgwrk |
| spellingShingle | Brayton, Robert K. Spence, Robert Sensitivity and optimization Computer-aided design of electronic circuits Datenverarbeitung Electronic circuit design Data processing Simulation (DE-588)4055072-2 gnd Netzwerkanalyse (DE-588)4075298-7 gnd Sensitivitätsanalyse (DE-588)4129730-1 gnd Schaltungsentwurf (DE-588)4179389-4 gnd Logischer Entwurf (DE-588)4168051-0 gnd CAD (DE-588)4069794-0 gnd |
| subject_GND | (DE-588)4055072-2 (DE-588)4075298-7 (DE-588)4129730-1 (DE-588)4179389-4 (DE-588)4168051-0 (DE-588)4069794-0 |
| title | Sensitivity and optimization |
| title_auth | Sensitivity and optimization |
| title_exact_search | Sensitivity and optimization |
| title_exact_search_txtP | Sensitivity and optimization |
| title_full | Sensitivity and optimization Robert K. Brayton ; Robert Spence |
| title_fullStr | Sensitivity and optimization Robert K. Brayton ; Robert Spence |
| title_full_unstemmed | Sensitivity and optimization Robert K. Brayton ; Robert Spence |
| title_short | Sensitivity and optimization |
| title_sort | sensitivity and optimization |
| topic | Datenverarbeitung Electronic circuit design Data processing Simulation (DE-588)4055072-2 gnd Netzwerkanalyse (DE-588)4075298-7 gnd Sensitivitätsanalyse (DE-588)4129730-1 gnd Schaltungsentwurf (DE-588)4179389-4 gnd Logischer Entwurf (DE-588)4168051-0 gnd CAD (DE-588)4069794-0 gnd |
| topic_facet | Datenverarbeitung Electronic circuit design Data processing Simulation Netzwerkanalyse Sensitivitätsanalyse Schaltungsentwurf Logischer Entwurf CAD |
| volume_link | (DE-604)BV021844930 |
| work_keys_str_mv | AT braytonrobertk sensitivityandoptimization AT spencerobert sensitivityandoptimization |