Mixed systolic arrays: a reconfigurable multiprocessor architecture
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| Main Author: | |
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| Format: | Book |
| Language: | English |
| Published: |
1982
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| Subjects: | |
| Item Description: | East Lansing, Mich., Univ., Diss., 1982. -Kopie, erschienen im Verl. Univ. Microfilms Internat., Ann Arbor, Mich. |
| Physical Description: | VIII, 107 S. graph. Darst. |
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| index_date | 2024-07-02T16:10:44Z |
| indexdate | 2024-07-09T20:48:57Z |
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| spelling | Chang, Tung-Liang Verfasser aut Mixed systolic arrays a reconfigurable multiprocessor architecture 1982 VIII, 107 S. graph. Darst. txt rdacontent n rdamedia nc rdacarrier East Lansing, Mich., Univ., Diss., 1982. -Kopie, erschienen im Verl. Univ. Microfilms Internat., Ann Arbor, Mich. Computer architecture Multiprocessors VLSI (DE-588)4117388-0 gnd rswk-swf Mehrprozessorsystem (DE-588)4038397-0 gnd rswk-swf Entwurf (DE-588)4121208-3 gnd rswk-swf (DE-588)4113937-9 Hochschulschrift gnd-content Entwurf (DE-588)4121208-3 s Mehrprozessorsystem (DE-588)4038397-0 s VLSI (DE-588)4117388-0 s DE-604 |
| spellingShingle | Chang, Tung-Liang Mixed systolic arrays a reconfigurable multiprocessor architecture Computer architecture Multiprocessors VLSI (DE-588)4117388-0 gnd Mehrprozessorsystem (DE-588)4038397-0 gnd Entwurf (DE-588)4121208-3 gnd |
| subject_GND | (DE-588)4117388-0 (DE-588)4038397-0 (DE-588)4121208-3 (DE-588)4113937-9 |
| title | Mixed systolic arrays a reconfigurable multiprocessor architecture |
| title_auth | Mixed systolic arrays a reconfigurable multiprocessor architecture |
| title_exact_search | Mixed systolic arrays a reconfigurable multiprocessor architecture |
| title_exact_search_txtP | Mixed systolic arrays a reconfigurable multiprocessor architecture |
| title_full | Mixed systolic arrays a reconfigurable multiprocessor architecture |
| title_fullStr | Mixed systolic arrays a reconfigurable multiprocessor architecture |
| title_full_unstemmed | Mixed systolic arrays a reconfigurable multiprocessor architecture |
| title_short | Mixed systolic arrays |
| title_sort | mixed systolic arrays a reconfigurable multiprocessor architecture |
| title_sub | a reconfigurable multiprocessor architecture |
| topic | Computer architecture Multiprocessors VLSI (DE-588)4117388-0 gnd Mehrprozessorsystem (DE-588)4038397-0 gnd Entwurf (DE-588)4121208-3 gnd |
| topic_facet | Computer architecture Multiprocessors VLSI Mehrprozessorsystem Entwurf Hochschulschrift |
| work_keys_str_mv | AT changtungliang mixedsystolicarraysareconfigurablemultiprocessorarchitecture |