Vaidya, A. K. (1982). Automatic logic synthesis for VLSI gate array implementations of a digital system from a conlan description.
Chicago-Zitierstil (17. Ausg.)Vaidya, Avinash Kashinath. Automatic Logic Synthesis for VLSI Gate Array Implementations of a Digital System from a Conlan Description. 1982.
MLA-Zitierstil (9. Ausg.)Vaidya, Avinash Kashinath. Automatic Logic Synthesis for VLSI Gate Array Implementations of a Digital System from a Conlan Description. 1982.
Achtung: Diese Zitate sind unter Umständen nicht zu 100% korrekt.