Computer systems architecture:
Saved in:
| Main Author: | |
|---|---|
| Format: | Book |
| Language: | English |
| Published: |
London [u.a.]
Pitman [u.a.]
1980
|
| Edition: | 1. print. |
| Subjects: | |
| Physical Description: | 626 S. |
| ISBN: | 0914894153 0273014749 |
Staff View
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| 650 | 7 | |a hiérarchie mémoire |2 inriac | |
| 650 | 7 | |a microprocesseur |2 inriac | |
| 650 | 7 | |a microprogrammation |2 inriac | |
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Record in the Search Index
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| author | Baer, Jean-Loup |
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| building | Verbundindex |
| bvnumber | BV021924932 |
| callnumber-first | Q - Science |
| callnumber-label | QA76 |
| callnumber-raw | QA76 |
| callnumber-search | QA76 |
| callnumber-sort | QA 276 |
| callnumber-subject | QA - Mathematics |
| classification_rvk | ST 150 |
| ctrlnum | (OCoLC)7134315 (DE-599)BVBBV021924932 |
| dewey-full | 001.64 004.22 |
| dewey-hundreds | 000 - Computer science, information, general works |
| dewey-ones | 001 - Knowledge 004 - Computer science |
| dewey-raw | 001.64 004.22 |
| dewey-search | 001.64 004.22 |
| dewey-sort | 11.64 |
| dewey-tens | 000 - Computer science, information, general works |
| discipline | Allgemeines Informatik |
| discipline_str_mv | Allgemeines Informatik |
| edition | 1. print. |
| format | Book |
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| id | DE-604.BV021924932 |
| illustrated | Not Illustrated |
| index_date | 2024-07-02T16:05:56Z |
| indexdate | 2024-07-09T20:47:31Z |
| institution | BVB |
| isbn | 0914894153 0273014749 |
| language | English |
| oai_aleph_id | oai:aleph.bib-bvb.de:BVB01-015140089 |
| oclc_num | 7134315 |
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| owner | DE-706 DE-188 |
| owner_facet | DE-706 DE-188 |
| physical | 626 S. |
| publishDate | 1980 |
| publishDateSearch | 1980 |
| publishDateSort | 1980 |
| publisher | Pitman [u.a.] |
| record_format | marc |
| spelling | Baer, Jean-Loup Verfasser aut Computer systems architecture Jean-Loup Baer 1. print. London [u.a.] Pitman [u.a.] 1980 626 S. txt rdacontent n rdamedia nc rdacarrier Computerarchitectuur gtt Computersystemen gtt algorithme arithmétique inriac architecture ordinateur inriac entrée-sortie inriac gestion mémoire inriac hiérarchie mémoire inriac microprocesseur inriac microprogrammation inriac processeur central inriac prospective architecture ordinateur inriac super-calculateur inriac unité commande inriac Computer architecture Systementwicklung (DE-588)4126945-7 gnd rswk-swf Computerarchitektur (DE-588)4048717-9 gnd rswk-swf Computerarchitektur (DE-588)4048717-9 s DE-604 Systementwicklung (DE-588)4126945-7 s |
| spellingShingle | Baer, Jean-Loup Computer systems architecture Computerarchitectuur gtt Computersystemen gtt algorithme arithmétique inriac architecture ordinateur inriac entrée-sortie inriac gestion mémoire inriac hiérarchie mémoire inriac microprocesseur inriac microprogrammation inriac processeur central inriac prospective architecture ordinateur inriac super-calculateur inriac unité commande inriac Computer architecture Systementwicklung (DE-588)4126945-7 gnd Computerarchitektur (DE-588)4048717-9 gnd |
| subject_GND | (DE-588)4126945-7 (DE-588)4048717-9 |
| title | Computer systems architecture |
| title_auth | Computer systems architecture |
| title_exact_search | Computer systems architecture |
| title_exact_search_txtP | Computer systems architecture |
| title_full | Computer systems architecture Jean-Loup Baer |
| title_fullStr | Computer systems architecture Jean-Loup Baer |
| title_full_unstemmed | Computer systems architecture Jean-Loup Baer |
| title_short | Computer systems architecture |
| title_sort | computer systems architecture |
| topic | Computerarchitectuur gtt Computersystemen gtt algorithme arithmétique inriac architecture ordinateur inriac entrée-sortie inriac gestion mémoire inriac hiérarchie mémoire inriac microprocesseur inriac microprogrammation inriac processeur central inriac prospective architecture ordinateur inriac super-calculateur inriac unité commande inriac Computer architecture Systementwicklung (DE-588)4126945-7 gnd Computerarchitektur (DE-588)4048717-9 gnd |
| topic_facet | Computerarchitectuur Computersystemen algorithme arithmétique architecture ordinateur entrée-sortie gestion mémoire hiérarchie mémoire microprocesseur microprogrammation processeur central prospective architecture ordinateur super-calculateur unité commande Computer architecture Systementwicklung Computerarchitektur |
| work_keys_str_mv | AT baerjeanloup computersystemsarchitecture |