Built-in test for VLSI: pseudorandom techniques
Saved in:
| Main Authors: | , , |
|---|---|
| Format: | Book |
| Language: | English |
| Published: |
New York [u.a.]
Wiley
1987
|
| Edition: | 1. print. |
| Series: | A Wiley-Interscience publication
|
| Subjects: | |
| Physical Description: | XIII, 354 S. |
| ISBN: | 0471624632 |
Staff View
MARC
| LEADER | 00000nam a2200000zc 4500 | ||
|---|---|---|---|
| 001 | BV021888338 | ||
| 003 | DE-604 | ||
| 005 | 20060630000000.0 | ||
| 007 | t | ||
| 008 | 900116s1987 |||| 00||| eng d | ||
| 020 | |a 0471624632 |9 0-471-62463-2 | ||
| 035 | |a (OCoLC)16580098 | ||
| 035 | |a (DE-599)BVBBV021888338 | ||
| 040 | |a DE-604 |b ger | ||
| 041 | 0 | |a eng | |
| 049 | |a DE-706 | ||
| 050 | 0 | |a TK7874 | |
| 082 | 0 | |a 621.381/73 |2 19 | |
| 084 | |a ST 190 |0 (DE-625)143607: |2 rvk | ||
| 100 | 1 | |a Bardell, Paul H. |e Verfasser |4 aut | |
| 245 | 1 | 0 | |a Built-in test for VLSI |b pseudorandom techniques |
| 250 | |a 1. print. | ||
| 264 | 1 | |a New York [u.a.] |b Wiley |c 1987 | |
| 300 | |a XIII, 354 S. | ||
| 336 | |b txt |2 rdacontent | ||
| 337 | |b n |2 rdamedia | ||
| 338 | |b nc |2 rdacarrier | ||
| 490 | 0 | |a A Wiley-Interscience publication | |
| 650 | 4 | |a Electronic equipment - Very large scale integrated circuits - Testing | |
| 650 | 4 | |a Circuits intégrés à très grande échelle - Essais | |
| 650 | 7 | |a Prüftechnik |2 swd | |
| 650 | 7 | |a VLSI |2 swd | |
| 650 | 4 | |a Integrated circuits |x Very large scale integration |x Testing | |
| 650 | 0 | 7 | |a VLSI |0 (DE-588)4117388-0 |2 gnd |9 rswk-swf |
| 650 | 0 | 7 | |a Prüftechnik |0 (DE-588)4047610-8 |2 gnd |9 rswk-swf |
| 689 | 0 | 0 | |a VLSI |0 (DE-588)4117388-0 |D s |
| 689 | 0 | 1 | |a Prüftechnik |0 (DE-588)4047610-8 |D s |
| 689 | 0 | |8 1\p |5 DE-604 | |
| 700 | 1 | |a MacAnney, William H. |e Verfasser |4 aut | |
| 700 | 1 | |a Savir, Jacob |e Verfasser |4 aut | |
| 999 | |a oai:aleph.bib-bvb.de:BVB01-015103569 | ||
| 883 | 1 | |8 1\p |a cgwrk |d 20201028 |q DE-101 |u https://d-nb.info/provenance/plan#cgwrk | |
Record in the Search Index
| _version_ | 1804135830645637120 |
|---|---|
| adam_txt | |
| any_adam_object | |
| any_adam_object_boolean | |
| author | Bardell, Paul H. MacAnney, William H. Savir, Jacob |
| author_facet | Bardell, Paul H. MacAnney, William H. Savir, Jacob |
| author_role | aut aut aut |
| author_sort | Bardell, Paul H. |
| author_variant | p h b ph phb w h m wh whm j s js |
| building | Verbundindex |
| bvnumber | BV021888338 |
| callnumber-first | T - Technology |
| callnumber-label | TK7874 |
| callnumber-raw | TK7874 |
| callnumber-search | TK7874 |
| callnumber-sort | TK 47874 |
| callnumber-subject | TK - Electrical and Nuclear Engineering |
| classification_rvk | ST 190 |
| ctrlnum | (OCoLC)16580098 (DE-599)BVBBV021888338 |
| dewey-full | 621.381/73 |
| dewey-hundreds | 600 - Technology (Applied sciences) |
| dewey-ones | 621 - Applied physics |
| dewey-raw | 621.381/73 |
| dewey-search | 621.381/73 |
| dewey-sort | 3621.381 273 |
| dewey-tens | 620 - Engineering and allied operations |
| discipline | Informatik Elektrotechnik / Elektronik / Nachrichtentechnik |
| discipline_str_mv | Informatik Elektrotechnik / Elektronik / Nachrichtentechnik |
| edition | 1. print. |
| format | Book |
| fullrecord | <?xml version="1.0" encoding="UTF-8"?><collection xmlns="http://www.loc.gov/MARC21/slim"><record><leader>01573nam a2200469zc 4500</leader><controlfield tag="001">BV021888338</controlfield><controlfield tag="003">DE-604</controlfield><controlfield tag="005">20060630000000.0</controlfield><controlfield tag="007">t</controlfield><controlfield tag="008">900116s1987 |||| 00||| eng d</controlfield><datafield tag="020" ind1=" " ind2=" "><subfield code="a">0471624632</subfield><subfield code="9">0-471-62463-2</subfield></datafield><datafield tag="035" ind1=" " ind2=" "><subfield code="a">(OCoLC)16580098</subfield></datafield><datafield tag="035" ind1=" " ind2=" "><subfield code="a">(DE-599)BVBBV021888338</subfield></datafield><datafield tag="040" ind1=" " ind2=" "><subfield code="a">DE-604</subfield><subfield code="b">ger</subfield></datafield><datafield tag="041" ind1="0" ind2=" "><subfield code="a">eng</subfield></datafield><datafield tag="049" ind1=" " ind2=" "><subfield code="a">DE-706</subfield></datafield><datafield tag="050" ind1=" " ind2="0"><subfield code="a">TK7874</subfield></datafield><datafield tag="082" ind1="0" ind2=" "><subfield code="a">621.381/73</subfield><subfield code="2">19</subfield></datafield><datafield tag="084" ind1=" " ind2=" "><subfield code="a">ST 190</subfield><subfield code="0">(DE-625)143607:</subfield><subfield code="2">rvk</subfield></datafield><datafield tag="100" ind1="1" ind2=" "><subfield code="a">Bardell, Paul H.</subfield><subfield code="e">Verfasser</subfield><subfield code="4">aut</subfield></datafield><datafield tag="245" ind1="1" ind2="0"><subfield code="a">Built-in test for VLSI</subfield><subfield code="b">pseudorandom techniques</subfield></datafield><datafield tag="250" ind1=" " ind2=" "><subfield code="a">1. print.</subfield></datafield><datafield tag="264" ind1=" " ind2="1"><subfield code="a">New York [u.a.]</subfield><subfield code="b">Wiley</subfield><subfield code="c">1987</subfield></datafield><datafield tag="300" ind1=" " ind2=" "><subfield code="a">XIII, 354 S.</subfield></datafield><datafield tag="336" ind1=" " ind2=" "><subfield code="b">txt</subfield><subfield code="2">rdacontent</subfield></datafield><datafield tag="337" ind1=" " ind2=" "><subfield code="b">n</subfield><subfield code="2">rdamedia</subfield></datafield><datafield tag="338" ind1=" " ind2=" "><subfield code="b">nc</subfield><subfield code="2">rdacarrier</subfield></datafield><datafield tag="490" ind1="0" ind2=" "><subfield code="a">A Wiley-Interscience publication</subfield></datafield><datafield tag="650" ind1=" " ind2="4"><subfield code="a">Electronic equipment - Very large scale integrated circuits - Testing</subfield></datafield><datafield tag="650" ind1=" " ind2="4"><subfield code="a">Circuits intégrés à très grande échelle - Essais</subfield></datafield><datafield tag="650" ind1=" " ind2="7"><subfield code="a">Prüftechnik</subfield><subfield code="2">swd</subfield></datafield><datafield tag="650" ind1=" " ind2="7"><subfield code="a">VLSI</subfield><subfield code="2">swd</subfield></datafield><datafield tag="650" ind1=" " ind2="4"><subfield code="a">Integrated circuits</subfield><subfield code="x">Very large scale integration</subfield><subfield code="x">Testing</subfield></datafield><datafield tag="650" ind1="0" ind2="7"><subfield code="a">VLSI</subfield><subfield code="0">(DE-588)4117388-0</subfield><subfield code="2">gnd</subfield><subfield code="9">rswk-swf</subfield></datafield><datafield tag="650" ind1="0" ind2="7"><subfield code="a">Prüftechnik</subfield><subfield code="0">(DE-588)4047610-8</subfield><subfield code="2">gnd</subfield><subfield code="9">rswk-swf</subfield></datafield><datafield tag="689" ind1="0" ind2="0"><subfield code="a">VLSI</subfield><subfield code="0">(DE-588)4117388-0</subfield><subfield code="D">s</subfield></datafield><datafield tag="689" ind1="0" ind2="1"><subfield code="a">Prüftechnik</subfield><subfield code="0">(DE-588)4047610-8</subfield><subfield code="D">s</subfield></datafield><datafield tag="689" ind1="0" ind2=" "><subfield code="8">1\p</subfield><subfield code="5">DE-604</subfield></datafield><datafield tag="700" ind1="1" ind2=" "><subfield code="a">MacAnney, William H.</subfield><subfield code="e">Verfasser</subfield><subfield code="4">aut</subfield></datafield><datafield tag="700" ind1="1" ind2=" "><subfield code="a">Savir, Jacob</subfield><subfield code="e">Verfasser</subfield><subfield code="4">aut</subfield></datafield><datafield tag="999" ind1=" " ind2=" "><subfield code="a">oai:aleph.bib-bvb.de:BVB01-015103569</subfield></datafield><datafield tag="883" ind1="1" ind2=" "><subfield code="8">1\p</subfield><subfield code="a">cgwrk</subfield><subfield code="d">20201028</subfield><subfield code="q">DE-101</subfield><subfield code="u">https://d-nb.info/provenance/plan#cgwrk</subfield></datafield></record></collection> |
| id | DE-604.BV021888338 |
| illustrated | Not Illustrated |
| index_date | 2024-07-02T16:04:04Z |
| indexdate | 2024-07-09T20:46:44Z |
| institution | BVB |
| isbn | 0471624632 |
| language | English |
| oai_aleph_id | oai:aleph.bib-bvb.de:BVB01-015103569 |
| oclc_num | 16580098 |
| open_access_boolean | |
| owner | DE-706 |
| owner_facet | DE-706 |
| physical | XIII, 354 S. |
| publishDate | 1987 |
| publishDateSearch | 1987 |
| publishDateSort | 1987 |
| publisher | Wiley |
| record_format | marc |
| series2 | A Wiley-Interscience publication |
| spelling | Bardell, Paul H. Verfasser aut Built-in test for VLSI pseudorandom techniques 1. print. New York [u.a.] Wiley 1987 XIII, 354 S. txt rdacontent n rdamedia nc rdacarrier A Wiley-Interscience publication Electronic equipment - Very large scale integrated circuits - Testing Circuits intégrés à très grande échelle - Essais Prüftechnik swd VLSI swd Integrated circuits Very large scale integration Testing VLSI (DE-588)4117388-0 gnd rswk-swf Prüftechnik (DE-588)4047610-8 gnd rswk-swf VLSI (DE-588)4117388-0 s Prüftechnik (DE-588)4047610-8 s 1\p DE-604 MacAnney, William H. Verfasser aut Savir, Jacob Verfasser aut 1\p cgwrk 20201028 DE-101 https://d-nb.info/provenance/plan#cgwrk |
| spellingShingle | Bardell, Paul H. MacAnney, William H. Savir, Jacob Built-in test for VLSI pseudorandom techniques Electronic equipment - Very large scale integrated circuits - Testing Circuits intégrés à très grande échelle - Essais Prüftechnik swd VLSI swd Integrated circuits Very large scale integration Testing VLSI (DE-588)4117388-0 gnd Prüftechnik (DE-588)4047610-8 gnd |
| subject_GND | (DE-588)4117388-0 (DE-588)4047610-8 |
| title | Built-in test for VLSI pseudorandom techniques |
| title_auth | Built-in test for VLSI pseudorandom techniques |
| title_exact_search | Built-in test for VLSI pseudorandom techniques |
| title_exact_search_txtP | Built-in test for VLSI pseudorandom techniques |
| title_full | Built-in test for VLSI pseudorandom techniques |
| title_fullStr | Built-in test for VLSI pseudorandom techniques |
| title_full_unstemmed | Built-in test for VLSI pseudorandom techniques |
| title_short | Built-in test for VLSI |
| title_sort | built in test for vlsi pseudorandom techniques |
| title_sub | pseudorandom techniques |
| topic | Electronic equipment - Very large scale integrated circuits - Testing Circuits intégrés à très grande échelle - Essais Prüftechnik swd VLSI swd Integrated circuits Very large scale integration Testing VLSI (DE-588)4117388-0 gnd Prüftechnik (DE-588)4047610-8 gnd |
| topic_facet | Electronic equipment - Very large scale integrated circuits - Testing Circuits intégrés à très grande échelle - Essais Prüftechnik VLSI Integrated circuits Very large scale integration Testing |
| work_keys_str_mv | AT bardellpaulh builtintestforvlsipseudorandomtechniques AT macanneywilliamh builtintestforvlsipseudorandomtechniques AT savirjacob builtintestforvlsipseudorandomtechniques |