Built-in test for VLSI: pseudorandom techniques
Gespeichert in:
Hauptverfasser: | , , |
---|---|
Format: | Buch |
Sprache: | English |
Veröffentlicht: |
New York [u.a.]
Wiley
1987
|
Ausgabe: | 1. print. |
Schriftenreihe: | A Wiley-Interscience publication
|
Schlagworte: | |
Beschreibung: | XIII, 354 S. |
ISBN: | 0471624632 |
Internformat
MARC
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245 | 1 | 0 | |a Built-in test for VLSI |b pseudorandom techniques |
250 | |a 1. print. | ||
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300 | |a XIII, 354 S. | ||
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338 | |b nc |2 rdacarrier | ||
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700 | 1 | |a Savir, Jacob |e Verfasser |4 aut | |
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883 | 1 | |8 1\p |a cgwrk |d 20201028 |q DE-101 |u https://d-nb.info/provenance/plan#cgwrk |
Datensatz im Suchindex
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adam_txt | |
any_adam_object | |
any_adam_object_boolean | |
author | Bardell, Paul H. MacAnney, William H. Savir, Jacob |
author_facet | Bardell, Paul H. MacAnney, William H. Savir, Jacob |
author_role | aut aut aut |
author_sort | Bardell, Paul H. |
author_variant | p h b ph phb w h m wh whm j s js |
building | Verbundindex |
bvnumber | BV021888338 |
callnumber-first | T - Technology |
callnumber-label | TK7874 |
callnumber-raw | TK7874 |
callnumber-search | TK7874 |
callnumber-sort | TK 47874 |
callnumber-subject | TK - Electrical and Nuclear Engineering |
classification_rvk | ST 190 |
ctrlnum | (OCoLC)16580098 (DE-599)BVBBV021888338 |
dewey-full | 621.381/73 |
dewey-hundreds | 600 - Technology (Applied sciences) |
dewey-ones | 621 - Applied physics |
dewey-raw | 621.381/73 |
dewey-search | 621.381/73 |
dewey-sort | 3621.381 273 |
dewey-tens | 620 - Engineering and allied operations |
discipline | Informatik Elektrotechnik / Elektronik / Nachrichtentechnik |
discipline_str_mv | Informatik Elektrotechnik / Elektronik / Nachrichtentechnik |
edition | 1. print. |
format | Book |
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id | DE-604.BV021888338 |
illustrated | Not Illustrated |
index_date | 2024-07-02T16:04:04Z |
indexdate | 2024-07-09T20:46:44Z |
institution | BVB |
isbn | 0471624632 |
language | English |
oai_aleph_id | oai:aleph.bib-bvb.de:BVB01-015103569 |
oclc_num | 16580098 |
open_access_boolean | |
owner | DE-706 |
owner_facet | DE-706 |
physical | XIII, 354 S. |
publishDate | 1987 |
publishDateSearch | 1987 |
publishDateSort | 1987 |
publisher | Wiley |
record_format | marc |
series2 | A Wiley-Interscience publication |
spelling | Bardell, Paul H. Verfasser aut Built-in test for VLSI pseudorandom techniques 1. print. New York [u.a.] Wiley 1987 XIII, 354 S. txt rdacontent n rdamedia nc rdacarrier A Wiley-Interscience publication Electronic equipment - Very large scale integrated circuits - Testing Circuits intégrés à très grande échelle - Essais Prüftechnik swd VLSI swd Integrated circuits Very large scale integration Testing VLSI (DE-588)4117388-0 gnd rswk-swf Prüftechnik (DE-588)4047610-8 gnd rswk-swf VLSI (DE-588)4117388-0 s Prüftechnik (DE-588)4047610-8 s 1\p DE-604 MacAnney, William H. Verfasser aut Savir, Jacob Verfasser aut 1\p cgwrk 20201028 DE-101 https://d-nb.info/provenance/plan#cgwrk |
spellingShingle | Bardell, Paul H. MacAnney, William H. Savir, Jacob Built-in test for VLSI pseudorandom techniques Electronic equipment - Very large scale integrated circuits - Testing Circuits intégrés à très grande échelle - Essais Prüftechnik swd VLSI swd Integrated circuits Very large scale integration Testing VLSI (DE-588)4117388-0 gnd Prüftechnik (DE-588)4047610-8 gnd |
subject_GND | (DE-588)4117388-0 (DE-588)4047610-8 |
title | Built-in test for VLSI pseudorandom techniques |
title_auth | Built-in test for VLSI pseudorandom techniques |
title_exact_search | Built-in test for VLSI pseudorandom techniques |
title_exact_search_txtP | Built-in test for VLSI pseudorandom techniques |
title_full | Built-in test for VLSI pseudorandom techniques |
title_fullStr | Built-in test for VLSI pseudorandom techniques |
title_full_unstemmed | Built-in test for VLSI pseudorandom techniques |
title_short | Built-in test for VLSI |
title_sort | built in test for vlsi pseudorandom techniques |
title_sub | pseudorandom techniques |
topic | Electronic equipment - Very large scale integrated circuits - Testing Circuits intégrés à très grande échelle - Essais Prüftechnik swd VLSI swd Integrated circuits Very large scale integration Testing VLSI (DE-588)4117388-0 gnd Prüftechnik (DE-588)4047610-8 gnd |
topic_facet | Electronic equipment - Very large scale integrated circuits - Testing Circuits intégrés à très grande échelle - Essais Prüftechnik VLSI Integrated circuits Very large scale integration Testing |
work_keys_str_mv | AT bardellpaulh builtintestforvlsipseudorandomtechniques AT macanneywilliamh builtintestforvlsipseudorandomtechniques AT savirjacob builtintestforvlsipseudorandomtechniques |