Multiple-processor implementations of message-passing systems:
The goal of this thesis is to develop a methodology for building networks of small computers capable of the same tasks now performed by single larger computers. Such networks promise to be both easier to scale and more economical in many instances. The mu calculus, a simple syntactic formalism for r...
Gespeichert in:
1. Verfasser: | |
---|---|
Format: | Buch |
Sprache: | English |
Veröffentlicht: |
Cambridge, Mass.
Mass. Inst. of Technology, Laboratory for Computer Science
1978
|
Schlagworte: | |
Zusammenfassung: | The goal of this thesis is to develop a methodology for building networks of small computers capable of the same tasks now performed by single larger computers. Such networks promise to be both easier to scale and more economical in many instances. The mu calculus, a simple syntactic formalism for representing message-passing computations, is presented and augmented to serve as the semantic basis for programs running on the network. The augmented version includes cells, tokens, and semaphores, as well as primitives for side-effect-free computation. Tokens, a novel construct, allow certain simple communication and synchronization tasks without involving fully general side effects. The network implementation presented supports object references, keeping track of them by using a new concept, the reference tree. A reference tree is a group of neighboring processors in the network that share knowledge of a common object. Also discussed are mechanisms for handling side effects on objects and strategy issues involved in allocating computations to processors. (Author). |
Beschreibung: | Zugl.: Cambridge, Mass., Mass. Inst. of Techn., Diss., 1978 |
Beschreibung: | 172 S. |
Internformat
MARC
LEADER | 00000nam a2200000zc 4500 | ||
---|---|---|---|
001 | BV021879862 | ||
003 | DE-604 | ||
005 | 20040229000000.0 | ||
007 | t | ||
008 | 880811s1978 |||| 00||| eng d | ||
035 | |a (OCoLC)227494232 | ||
035 | |a (DE-599)BVBBV021879862 | ||
040 | |a DE-604 |b ger | ||
041 | 0 | |a eng | |
049 | |a DE-706 |a DE-83 | ||
088 | |a MIT/LCS/TR-198 | ||
100 | 1 | |a Halstead, Robert H. |e Verfasser |4 aut | |
245 | 1 | 0 | |a Multiple-processor implementations of message-passing systems |c by Robert Hunter Halstead |
264 | 1 | |a Cambridge, Mass. |b Mass. Inst. of Technology, Laboratory for Computer Science |c 1978 | |
300 | |a 172 S. | ||
336 | |b txt |2 rdacontent | ||
337 | |b n |2 rdamedia | ||
338 | |b nc |2 rdacarrier | ||
500 | |a Zugl.: Cambridge, Mass., Mass. Inst. of Techn., Diss., 1978 | ||
520 | 3 | |a The goal of this thesis is to develop a methodology for building networks of small computers capable of the same tasks now performed by single larger computers. Such networks promise to be both easier to scale and more economical in many instances. The mu calculus, a simple syntactic formalism for representing message-passing computations, is presented and augmented to serve as the semantic basis for programs running on the network. The augmented version includes cells, tokens, and semaphores, as well as primitives for side-effect-free computation. Tokens, a novel construct, allow certain simple communication and synchronization tasks without involving fully general side effects. The network implementation presented supports object references, keeping track of them by using a new concept, the reference tree. A reference tree is a group of neighboring processors in the network that share knowledge of a common object. Also discussed are mechanisms for handling side effects on objects and strategy issues involved in allocating computations to processors. (Author). | |
650 | 7 | |a Computer Hardware |2 scgdst | |
650 | 7 | |a Computer Systems |2 scgdst | |
650 | 7 | |a Message processing |2 dtict | |
650 | 7 | |a Multiprocessors |2 dtict | |
650 | 7 | |a Networks |2 dtict | |
650 | 7 | |a Non-radio Communications |2 scgdst | |
650 | 7 | |a Synchronization(electronics) |2 dtict | |
650 | 0 | 7 | |a Datenfluss |0 (DE-588)4191571-9 |2 gnd |9 rswk-swf |
650 | 0 | 7 | |a Rechnernetz |0 (DE-588)4070085-9 |2 gnd |9 rswk-swf |
689 | 0 | 0 | |a Rechnernetz |0 (DE-588)4070085-9 |D s |
689 | 0 | |5 DE-604 | |
689 | 1 | 0 | |a Datenfluss |0 (DE-588)4191571-9 |D s |
689 | 1 | |5 DE-604 | |
940 | 1 | |q TUB-nb | |
999 | |a oai:aleph.bib-bvb.de:BVB01-015095320 |
Datensatz im Suchindex
_version_ | 1804135820069699584 |
---|---|
adam_txt | |
any_adam_object | |
any_adam_object_boolean | |
author | Halstead, Robert H. |
author_facet | Halstead, Robert H. |
author_role | aut |
author_sort | Halstead, Robert H. |
author_variant | r h h rh rhh |
building | Verbundindex |
bvnumber | BV021879862 |
ctrlnum | (OCoLC)227494232 (DE-599)BVBBV021879862 |
format | Book |
fullrecord | <?xml version="1.0" encoding="UTF-8"?><collection xmlns="http://www.loc.gov/MARC21/slim"><record><leader>02527nam a2200445zc 4500</leader><controlfield tag="001">BV021879862</controlfield><controlfield tag="003">DE-604</controlfield><controlfield tag="005">20040229000000.0</controlfield><controlfield tag="007">t</controlfield><controlfield tag="008">880811s1978 |||| 00||| eng d</controlfield><datafield tag="035" ind1=" " ind2=" "><subfield code="a">(OCoLC)227494232</subfield></datafield><datafield tag="035" ind1=" " ind2=" "><subfield code="a">(DE-599)BVBBV021879862</subfield></datafield><datafield tag="040" ind1=" " ind2=" "><subfield code="a">DE-604</subfield><subfield code="b">ger</subfield></datafield><datafield tag="041" ind1="0" ind2=" "><subfield code="a">eng</subfield></datafield><datafield tag="049" ind1=" " ind2=" "><subfield code="a">DE-706</subfield><subfield code="a">DE-83</subfield></datafield><datafield tag="088" ind1=" " ind2=" "><subfield code="a">MIT/LCS/TR-198</subfield></datafield><datafield tag="100" ind1="1" ind2=" "><subfield code="a">Halstead, Robert H.</subfield><subfield code="e">Verfasser</subfield><subfield code="4">aut</subfield></datafield><datafield tag="245" ind1="1" ind2="0"><subfield code="a">Multiple-processor implementations of message-passing systems</subfield><subfield code="c">by Robert Hunter Halstead</subfield></datafield><datafield tag="264" ind1=" " ind2="1"><subfield code="a">Cambridge, Mass.</subfield><subfield code="b">Mass. Inst. of Technology, Laboratory for Computer Science</subfield><subfield code="c">1978</subfield></datafield><datafield tag="300" ind1=" " ind2=" "><subfield code="a">172 S.</subfield></datafield><datafield tag="336" ind1=" " ind2=" "><subfield code="b">txt</subfield><subfield code="2">rdacontent</subfield></datafield><datafield tag="337" ind1=" " ind2=" "><subfield code="b">n</subfield><subfield code="2">rdamedia</subfield></datafield><datafield tag="338" ind1=" " ind2=" "><subfield code="b">nc</subfield><subfield code="2">rdacarrier</subfield></datafield><datafield tag="500" ind1=" " ind2=" "><subfield code="a">Zugl.: Cambridge, Mass., Mass. Inst. of Techn., Diss., 1978</subfield></datafield><datafield tag="520" ind1="3" ind2=" "><subfield code="a">The goal of this thesis is to develop a methodology for building networks of small computers capable of the same tasks now performed by single larger computers. Such networks promise to be both easier to scale and more economical in many instances. The mu calculus, a simple syntactic formalism for representing message-passing computations, is presented and augmented to serve as the semantic basis for programs running on the network. The augmented version includes cells, tokens, and semaphores, as well as primitives for side-effect-free computation. Tokens, a novel construct, allow certain simple communication and synchronization tasks without involving fully general side effects. The network implementation presented supports object references, keeping track of them by using a new concept, the reference tree. A reference tree is a group of neighboring processors in the network that share knowledge of a common object. Also discussed are mechanisms for handling side effects on objects and strategy issues involved in allocating computations to processors. (Author).</subfield></datafield><datafield tag="650" ind1=" " ind2="7"><subfield code="a">Computer Hardware</subfield><subfield code="2">scgdst</subfield></datafield><datafield tag="650" ind1=" " ind2="7"><subfield code="a">Computer Systems</subfield><subfield code="2">scgdst</subfield></datafield><datafield tag="650" ind1=" " ind2="7"><subfield code="a">Message processing</subfield><subfield code="2">dtict</subfield></datafield><datafield tag="650" ind1=" " ind2="7"><subfield code="a">Multiprocessors</subfield><subfield code="2">dtict</subfield></datafield><datafield tag="650" ind1=" " ind2="7"><subfield code="a">Networks</subfield><subfield code="2">dtict</subfield></datafield><datafield tag="650" ind1=" " ind2="7"><subfield code="a">Non-radio Communications</subfield><subfield code="2">scgdst</subfield></datafield><datafield tag="650" ind1=" " ind2="7"><subfield code="a">Synchronization(electronics)</subfield><subfield code="2">dtict</subfield></datafield><datafield tag="650" ind1="0" ind2="7"><subfield code="a">Datenfluss</subfield><subfield code="0">(DE-588)4191571-9</subfield><subfield code="2">gnd</subfield><subfield code="9">rswk-swf</subfield></datafield><datafield tag="650" ind1="0" ind2="7"><subfield code="a">Rechnernetz</subfield><subfield code="0">(DE-588)4070085-9</subfield><subfield code="2">gnd</subfield><subfield code="9">rswk-swf</subfield></datafield><datafield tag="689" ind1="0" ind2="0"><subfield code="a">Rechnernetz</subfield><subfield code="0">(DE-588)4070085-9</subfield><subfield code="D">s</subfield></datafield><datafield tag="689" ind1="0" ind2=" "><subfield code="5">DE-604</subfield></datafield><datafield tag="689" ind1="1" ind2="0"><subfield code="a">Datenfluss</subfield><subfield code="0">(DE-588)4191571-9</subfield><subfield code="D">s</subfield></datafield><datafield tag="689" ind1="1" ind2=" "><subfield code="5">DE-604</subfield></datafield><datafield tag="940" ind1="1" ind2=" "><subfield code="q">TUB-nb</subfield></datafield><datafield tag="999" ind1=" " ind2=" "><subfield code="a">oai:aleph.bib-bvb.de:BVB01-015095320</subfield></datafield></record></collection> |
id | DE-604.BV021879862 |
illustrated | Not Illustrated |
index_date | 2024-07-02T16:03:43Z |
indexdate | 2024-07-09T20:46:34Z |
institution | BVB |
language | English |
oai_aleph_id | oai:aleph.bib-bvb.de:BVB01-015095320 |
oclc_num | 227494232 |
open_access_boolean | |
owner | DE-706 DE-83 |
owner_facet | DE-706 DE-83 |
physical | 172 S. |
psigel | TUB-nb |
publishDate | 1978 |
publishDateSearch | 1978 |
publishDateSort | 1978 |
publisher | Mass. Inst. of Technology, Laboratory for Computer Science |
record_format | marc |
spelling | Halstead, Robert H. Verfasser aut Multiple-processor implementations of message-passing systems by Robert Hunter Halstead Cambridge, Mass. Mass. Inst. of Technology, Laboratory for Computer Science 1978 172 S. txt rdacontent n rdamedia nc rdacarrier Zugl.: Cambridge, Mass., Mass. Inst. of Techn., Diss., 1978 The goal of this thesis is to develop a methodology for building networks of small computers capable of the same tasks now performed by single larger computers. Such networks promise to be both easier to scale and more economical in many instances. The mu calculus, a simple syntactic formalism for representing message-passing computations, is presented and augmented to serve as the semantic basis for programs running on the network. The augmented version includes cells, tokens, and semaphores, as well as primitives for side-effect-free computation. Tokens, a novel construct, allow certain simple communication and synchronization tasks without involving fully general side effects. The network implementation presented supports object references, keeping track of them by using a new concept, the reference tree. A reference tree is a group of neighboring processors in the network that share knowledge of a common object. Also discussed are mechanisms for handling side effects on objects and strategy issues involved in allocating computations to processors. (Author). Computer Hardware scgdst Computer Systems scgdst Message processing dtict Multiprocessors dtict Networks dtict Non-radio Communications scgdst Synchronization(electronics) dtict Datenfluss (DE-588)4191571-9 gnd rswk-swf Rechnernetz (DE-588)4070085-9 gnd rswk-swf Rechnernetz (DE-588)4070085-9 s DE-604 Datenfluss (DE-588)4191571-9 s |
spellingShingle | Halstead, Robert H. Multiple-processor implementations of message-passing systems Computer Hardware scgdst Computer Systems scgdst Message processing dtict Multiprocessors dtict Networks dtict Non-radio Communications scgdst Synchronization(electronics) dtict Datenfluss (DE-588)4191571-9 gnd Rechnernetz (DE-588)4070085-9 gnd |
subject_GND | (DE-588)4191571-9 (DE-588)4070085-9 |
title | Multiple-processor implementations of message-passing systems |
title_auth | Multiple-processor implementations of message-passing systems |
title_exact_search | Multiple-processor implementations of message-passing systems |
title_exact_search_txtP | Multiple-processor implementations of message-passing systems |
title_full | Multiple-processor implementations of message-passing systems by Robert Hunter Halstead |
title_fullStr | Multiple-processor implementations of message-passing systems by Robert Hunter Halstead |
title_full_unstemmed | Multiple-processor implementations of message-passing systems by Robert Hunter Halstead |
title_short | Multiple-processor implementations of message-passing systems |
title_sort | multiple processor implementations of message passing systems |
topic | Computer Hardware scgdst Computer Systems scgdst Message processing dtict Multiprocessors dtict Networks dtict Non-radio Communications scgdst Synchronization(electronics) dtict Datenfluss (DE-588)4191571-9 gnd Rechnernetz (DE-588)4070085-9 gnd |
topic_facet | Computer Hardware Computer Systems Message processing Multiprocessors Networks Non-radio Communications Synchronization(electronics) Datenfluss Rechnernetz |
work_keys_str_mv | AT halsteadroberth multipleprocessorimplementationsofmessagepassingsystems |