Yield simulation for integrated circuits:
Gespeichert in:
| 1. Verfasser: | |
|---|---|
| Format: | Abschlussarbeit Buch |
| Sprache: | English |
| Veröffentlicht: |
Boston [u.a.]
Kluwer
1987
|
| Schriftenreihe: | Kluwer international series in engineering and computer science : VLSI, computer architecture and digital signal processing
|
| Schlagworte: | |
| Beschreibung: | X, 209 S. |
| ISBN: | 0898382440 |
Internformat
MARC
| LEADER | 00000nam a2200000zc 4500 | ||
|---|---|---|---|
| 001 | BV021875988 | ||
| 003 | DE-604 | ||
| 005 | 20040229000000.0 | ||
| 007 | t | ||
| 008 | 880223s1987 m||| 00||| eng d | ||
| 020 | |a 0898382440 |9 0-89838-244-0 | ||
| 035 | |a (OCoLC)16224692 | ||
| 035 | |a (DE-599)BVBBV021875988 | ||
| 040 | |a DE-604 |b ger | ||
| 041 | 0 | |a eng | |
| 049 | |a DE-706 |a DE-83 | ||
| 050 | 0 | |a TK7874 | |
| 082 | 0 | |a 621.381/73 |2 19 | |
| 084 | |a ST 190 |0 (DE-625)143607: |2 rvk | ||
| 100 | 1 | |a Walker, Duncan M. |e Verfasser |4 aut | |
| 245 | 1 | 0 | |a Yield simulation for integrated circuits |c by Duncan Moore Henry Walker |
| 264 | 1 | |a Boston [u.a.] |b Kluwer |c 1987 | |
| 300 | |a X, 209 S. | ||
| 336 | |b txt |2 rdacontent | ||
| 337 | |b n |2 rdamedia | ||
| 338 | |b nc |2 rdacarrier | ||
| 490 | 0 | |a Kluwer international series in engineering and computer science : VLSI, computer architecture and digital signal processing | |
| 502 | |a Zugl.: Pittsburgh, Pa., Univ., Diss., 1986 | ||
| 650 | 4 | |a Circuits intégrés à très grande échelle - Conception et construction - Informatique | |
| 650 | 4 | |a Circuits intégrés à très grande échelle - Conception et construction - Modèles mathématiques | |
| 650 | 7 | |a Circuits intégrés à très grande échelle - Conception et construction |2 ram | |
| 650 | 4 | |a Circuits intégrés à très grande échelle - Défauts - Informatique | |
| 650 | 4 | |a Circuits intégrés à très grande échelle - Défauts - Modèles mathématiques | |
| 650 | 4 | |a Monte-Carlo, Méthode de | |
| 650 | 7 | |a Simulation, Méthodes de |2 ram | |
| 650 | 4 | |a Datenverarbeitung | |
| 650 | 4 | |a Mathematisches Modell | |
| 650 | 4 | |a Integrated circuits |x Very large scale integration |x Defects |x Data processing | |
| 650 | 4 | |a Integrated circuits |x Very large scale integration |x Defects |x Mathematical models | |
| 650 | 4 | |a Integrated circuits |x Very large scale integration |x Design and construction |x Data processing | |
| 650 | 4 | |a Integrated circuits |x Very large scale integration |x Design and construction |x Mathematical models | |
| 650 | 4 | |a Monte Carlo method | |
| 650 | 0 | 7 | |a VLSI |0 (DE-588)4117388-0 |2 gnd |9 rswk-swf |
| 650 | 0 | 7 | |a Integrierte Schaltung |0 (DE-588)4027242-4 |2 gnd |9 rswk-swf |
| 650 | 0 | 7 | |a Simulation |0 (DE-588)4055072-2 |2 gnd |9 rswk-swf |
| 650 | 0 | 7 | |a Technologie |0 (DE-588)4059276-5 |2 gnd |9 rswk-swf |
| 650 | 0 | 7 | |a Zuverlässigkeit |0 (DE-588)4059245-5 |2 gnd |9 rswk-swf |
| 650 | 0 | 7 | |a Ausbeute |0 (DE-588)4208661-9 |2 gnd |9 rswk-swf |
| 655 | 7 | |0 (DE-588)4113937-9 |a Hochschulschrift |2 gnd-content | |
| 689 | 0 | 0 | |a Integrierte Schaltung |0 (DE-588)4027242-4 |D s |
| 689 | 0 | 1 | |a Technologie |0 (DE-588)4059276-5 |D s |
| 689 | 0 | 2 | |a Ausbeute |0 (DE-588)4208661-9 |D s |
| 689 | 0 | 3 | |a Simulation |0 (DE-588)4055072-2 |D s |
| 689 | 0 | |8 1\p |5 DE-604 | |
| 689 | 1 | 0 | |a VLSI |0 (DE-588)4117388-0 |D s |
| 689 | 1 | 1 | |a Zuverlässigkeit |0 (DE-588)4059245-5 |D s |
| 689 | 1 | |8 2\p |5 DE-604 | |
| 999 | |a oai:aleph.bib-bvb.de:BVB01-015091627 | ||
| 883 | 1 | |8 1\p |a cgwrk |d 20201028 |q DE-101 |u https://d-nb.info/provenance/plan#cgwrk | |
| 883 | 1 | |8 2\p |a cgwrk |d 20201028 |q DE-101 |u https://d-nb.info/provenance/plan#cgwrk | |
Datensatz im Suchindex
| _version_ | 1804135815394099200 |
|---|---|
| adam_txt | |
| any_adam_object | |
| any_adam_object_boolean | |
| author | Walker, Duncan M. |
| author_facet | Walker, Duncan M. |
| author_role | aut |
| author_sort | Walker, Duncan M. |
| author_variant | d m w dm dmw |
| building | Verbundindex |
| bvnumber | BV021875988 |
| callnumber-first | T - Technology |
| callnumber-label | TK7874 |
| callnumber-raw | TK7874 |
| callnumber-search | TK7874 |
| callnumber-sort | TK 47874 |
| callnumber-subject | TK - Electrical and Nuclear Engineering |
| classification_rvk | ST 190 |
| ctrlnum | (OCoLC)16224692 (DE-599)BVBBV021875988 |
| dewey-full | 621.381/73 |
| dewey-hundreds | 600 - Technology (Applied sciences) |
| dewey-ones | 621 - Applied physics |
| dewey-raw | 621.381/73 |
| dewey-search | 621.381/73 |
| dewey-sort | 3621.381 273 |
| dewey-tens | 620 - Engineering and allied operations |
| discipline | Informatik Elektrotechnik / Elektronik / Nachrichtentechnik |
| discipline_str_mv | Informatik Elektrotechnik / Elektronik / Nachrichtentechnik |
| format | Thesis Book |
| fullrecord | <?xml version="1.0" encoding="UTF-8"?><collection xmlns="http://www.loc.gov/MARC21/slim"><record><leader>03081nam a2200685zc 4500</leader><controlfield tag="001">BV021875988</controlfield><controlfield tag="003">DE-604</controlfield><controlfield tag="005">20040229000000.0</controlfield><controlfield tag="007">t</controlfield><controlfield tag="008">880223s1987 m||| 00||| eng d</controlfield><datafield tag="020" ind1=" " ind2=" "><subfield code="a">0898382440</subfield><subfield code="9">0-89838-244-0</subfield></datafield><datafield tag="035" ind1=" " ind2=" "><subfield code="a">(OCoLC)16224692</subfield></datafield><datafield tag="035" ind1=" " ind2=" "><subfield code="a">(DE-599)BVBBV021875988</subfield></datafield><datafield tag="040" ind1=" " ind2=" "><subfield code="a">DE-604</subfield><subfield code="b">ger</subfield></datafield><datafield tag="041" ind1="0" ind2=" "><subfield code="a">eng</subfield></datafield><datafield tag="049" ind1=" " ind2=" "><subfield code="a">DE-706</subfield><subfield code="a">DE-83</subfield></datafield><datafield tag="050" ind1=" " ind2="0"><subfield code="a">TK7874</subfield></datafield><datafield tag="082" ind1="0" ind2=" "><subfield code="a">621.381/73</subfield><subfield code="2">19</subfield></datafield><datafield tag="084" ind1=" " ind2=" "><subfield code="a">ST 190</subfield><subfield code="0">(DE-625)143607:</subfield><subfield code="2">rvk</subfield></datafield><datafield tag="100" ind1="1" ind2=" "><subfield code="a">Walker, Duncan M.</subfield><subfield code="e">Verfasser</subfield><subfield code="4">aut</subfield></datafield><datafield tag="245" ind1="1" ind2="0"><subfield code="a">Yield simulation for integrated circuits</subfield><subfield code="c">by Duncan Moore Henry Walker</subfield></datafield><datafield tag="264" ind1=" " ind2="1"><subfield code="a">Boston [u.a.]</subfield><subfield code="b">Kluwer</subfield><subfield code="c">1987</subfield></datafield><datafield tag="300" ind1=" " ind2=" "><subfield code="a">X, 209 S.</subfield></datafield><datafield tag="336" ind1=" " ind2=" "><subfield code="b">txt</subfield><subfield code="2">rdacontent</subfield></datafield><datafield tag="337" ind1=" " ind2=" "><subfield code="b">n</subfield><subfield code="2">rdamedia</subfield></datafield><datafield tag="338" ind1=" " ind2=" "><subfield code="b">nc</subfield><subfield code="2">rdacarrier</subfield></datafield><datafield tag="490" ind1="0" ind2=" "><subfield code="a">Kluwer international series in engineering and computer science : VLSI, computer architecture and digital signal processing</subfield></datafield><datafield tag="502" ind1=" " ind2=" "><subfield code="a">Zugl.: Pittsburgh, Pa., Univ., Diss., 1986</subfield></datafield><datafield tag="650" ind1=" " ind2="4"><subfield code="a">Circuits intégrés à très grande échelle - Conception et construction - Informatique</subfield></datafield><datafield tag="650" ind1=" " ind2="4"><subfield code="a">Circuits intégrés à très grande échelle - Conception et construction - Modèles mathématiques</subfield></datafield><datafield tag="650" ind1=" " ind2="7"><subfield code="a">Circuits intégrés à très grande échelle - Conception et construction</subfield><subfield code="2">ram</subfield></datafield><datafield tag="650" ind1=" " ind2="4"><subfield code="a">Circuits intégrés à très grande échelle - Défauts - Informatique</subfield></datafield><datafield tag="650" ind1=" " ind2="4"><subfield code="a">Circuits intégrés à très grande échelle - Défauts - Modèles mathématiques</subfield></datafield><datafield tag="650" ind1=" " ind2="4"><subfield code="a">Monte-Carlo, Méthode de</subfield></datafield><datafield tag="650" ind1=" " ind2="7"><subfield code="a">Simulation, Méthodes de</subfield><subfield code="2">ram</subfield></datafield><datafield tag="650" ind1=" " ind2="4"><subfield code="a">Datenverarbeitung</subfield></datafield><datafield tag="650" ind1=" " ind2="4"><subfield code="a">Mathematisches Modell</subfield></datafield><datafield tag="650" ind1=" " ind2="4"><subfield code="a">Integrated circuits</subfield><subfield code="x">Very large scale integration</subfield><subfield code="x">Defects</subfield><subfield code="x">Data processing</subfield></datafield><datafield tag="650" ind1=" " ind2="4"><subfield code="a">Integrated circuits</subfield><subfield code="x">Very large scale integration</subfield><subfield code="x">Defects</subfield><subfield code="x">Mathematical models</subfield></datafield><datafield tag="650" ind1=" " ind2="4"><subfield code="a">Integrated circuits</subfield><subfield code="x">Very large scale integration</subfield><subfield code="x">Design and construction</subfield><subfield code="x">Data processing</subfield></datafield><datafield tag="650" ind1=" " ind2="4"><subfield code="a">Integrated circuits</subfield><subfield code="x">Very large scale integration</subfield><subfield code="x">Design and construction</subfield><subfield code="x">Mathematical models</subfield></datafield><datafield tag="650" ind1=" " ind2="4"><subfield code="a">Monte Carlo method</subfield></datafield><datafield tag="650" ind1="0" ind2="7"><subfield code="a">VLSI</subfield><subfield code="0">(DE-588)4117388-0</subfield><subfield code="2">gnd</subfield><subfield code="9">rswk-swf</subfield></datafield><datafield tag="650" ind1="0" ind2="7"><subfield code="a">Integrierte Schaltung</subfield><subfield code="0">(DE-588)4027242-4</subfield><subfield code="2">gnd</subfield><subfield code="9">rswk-swf</subfield></datafield><datafield tag="650" ind1="0" ind2="7"><subfield code="a">Simulation</subfield><subfield code="0">(DE-588)4055072-2</subfield><subfield code="2">gnd</subfield><subfield code="9">rswk-swf</subfield></datafield><datafield tag="650" ind1="0" ind2="7"><subfield code="a">Technologie</subfield><subfield code="0">(DE-588)4059276-5</subfield><subfield code="2">gnd</subfield><subfield code="9">rswk-swf</subfield></datafield><datafield tag="650" ind1="0" ind2="7"><subfield code="a">Zuverlässigkeit</subfield><subfield code="0">(DE-588)4059245-5</subfield><subfield code="2">gnd</subfield><subfield code="9">rswk-swf</subfield></datafield><datafield tag="650" ind1="0" ind2="7"><subfield code="a">Ausbeute</subfield><subfield code="0">(DE-588)4208661-9</subfield><subfield code="2">gnd</subfield><subfield code="9">rswk-swf</subfield></datafield><datafield tag="655" ind1=" " ind2="7"><subfield code="0">(DE-588)4113937-9</subfield><subfield code="a">Hochschulschrift</subfield><subfield code="2">gnd-content</subfield></datafield><datafield tag="689" ind1="0" ind2="0"><subfield code="a">Integrierte Schaltung</subfield><subfield code="0">(DE-588)4027242-4</subfield><subfield code="D">s</subfield></datafield><datafield tag="689" ind1="0" ind2="1"><subfield code="a">Technologie</subfield><subfield code="0">(DE-588)4059276-5</subfield><subfield code="D">s</subfield></datafield><datafield tag="689" ind1="0" ind2="2"><subfield code="a">Ausbeute</subfield><subfield code="0">(DE-588)4208661-9</subfield><subfield code="D">s</subfield></datafield><datafield tag="689" ind1="0" ind2="3"><subfield code="a">Simulation</subfield><subfield code="0">(DE-588)4055072-2</subfield><subfield code="D">s</subfield></datafield><datafield tag="689" ind1="0" ind2=" "><subfield code="8">1\p</subfield><subfield code="5">DE-604</subfield></datafield><datafield tag="689" ind1="1" ind2="0"><subfield code="a">VLSI</subfield><subfield code="0">(DE-588)4117388-0</subfield><subfield code="D">s</subfield></datafield><datafield tag="689" ind1="1" ind2="1"><subfield code="a">Zuverlässigkeit</subfield><subfield code="0">(DE-588)4059245-5</subfield><subfield code="D">s</subfield></datafield><datafield tag="689" ind1="1" ind2=" "><subfield code="8">2\p</subfield><subfield code="5">DE-604</subfield></datafield><datafield tag="999" ind1=" " ind2=" "><subfield code="a">oai:aleph.bib-bvb.de:BVB01-015091627</subfield></datafield><datafield tag="883" ind1="1" ind2=" "><subfield code="8">1\p</subfield><subfield code="a">cgwrk</subfield><subfield code="d">20201028</subfield><subfield code="q">DE-101</subfield><subfield code="u">https://d-nb.info/provenance/plan#cgwrk</subfield></datafield><datafield tag="883" ind1="1" ind2=" "><subfield code="8">2\p</subfield><subfield code="a">cgwrk</subfield><subfield code="d">20201028</subfield><subfield code="q">DE-101</subfield><subfield code="u">https://d-nb.info/provenance/plan#cgwrk</subfield></datafield></record></collection> |
| genre | (DE-588)4113937-9 Hochschulschrift gnd-content |
| genre_facet | Hochschulschrift |
| id | DE-604.BV021875988 |
| illustrated | Not Illustrated |
| index_date | 2024-07-02T16:03:35Z |
| indexdate | 2024-07-09T20:46:30Z |
| institution | BVB |
| isbn | 0898382440 |
| language | English |
| oai_aleph_id | oai:aleph.bib-bvb.de:BVB01-015091627 |
| oclc_num | 16224692 |
| open_access_boolean | |
| owner | DE-706 DE-83 |
| owner_facet | DE-706 DE-83 |
| physical | X, 209 S. |
| publishDate | 1987 |
| publishDateSearch | 1987 |
| publishDateSort | 1987 |
| publisher | Kluwer |
| record_format | marc |
| series2 | Kluwer international series in engineering and computer science : VLSI, computer architecture and digital signal processing |
| spelling | Walker, Duncan M. Verfasser aut Yield simulation for integrated circuits by Duncan Moore Henry Walker Boston [u.a.] Kluwer 1987 X, 209 S. txt rdacontent n rdamedia nc rdacarrier Kluwer international series in engineering and computer science : VLSI, computer architecture and digital signal processing Zugl.: Pittsburgh, Pa., Univ., Diss., 1986 Circuits intégrés à très grande échelle - Conception et construction - Informatique Circuits intégrés à très grande échelle - Conception et construction - Modèles mathématiques Circuits intégrés à très grande échelle - Conception et construction ram Circuits intégrés à très grande échelle - Défauts - Informatique Circuits intégrés à très grande échelle - Défauts - Modèles mathématiques Monte-Carlo, Méthode de Simulation, Méthodes de ram Datenverarbeitung Mathematisches Modell Integrated circuits Very large scale integration Defects Data processing Integrated circuits Very large scale integration Defects Mathematical models Integrated circuits Very large scale integration Design and construction Data processing Integrated circuits Very large scale integration Design and construction Mathematical models Monte Carlo method VLSI (DE-588)4117388-0 gnd rswk-swf Integrierte Schaltung (DE-588)4027242-4 gnd rswk-swf Simulation (DE-588)4055072-2 gnd rswk-swf Technologie (DE-588)4059276-5 gnd rswk-swf Zuverlässigkeit (DE-588)4059245-5 gnd rswk-swf Ausbeute (DE-588)4208661-9 gnd rswk-swf (DE-588)4113937-9 Hochschulschrift gnd-content Integrierte Schaltung (DE-588)4027242-4 s Technologie (DE-588)4059276-5 s Ausbeute (DE-588)4208661-9 s Simulation (DE-588)4055072-2 s 1\p DE-604 VLSI (DE-588)4117388-0 s Zuverlässigkeit (DE-588)4059245-5 s 2\p DE-604 1\p cgwrk 20201028 DE-101 https://d-nb.info/provenance/plan#cgwrk 2\p cgwrk 20201028 DE-101 https://d-nb.info/provenance/plan#cgwrk |
| spellingShingle | Walker, Duncan M. Yield simulation for integrated circuits Circuits intégrés à très grande échelle - Conception et construction - Informatique Circuits intégrés à très grande échelle - Conception et construction - Modèles mathématiques Circuits intégrés à très grande échelle - Conception et construction ram Circuits intégrés à très grande échelle - Défauts - Informatique Circuits intégrés à très grande échelle - Défauts - Modèles mathématiques Monte-Carlo, Méthode de Simulation, Méthodes de ram Datenverarbeitung Mathematisches Modell Integrated circuits Very large scale integration Defects Data processing Integrated circuits Very large scale integration Defects Mathematical models Integrated circuits Very large scale integration Design and construction Data processing Integrated circuits Very large scale integration Design and construction Mathematical models Monte Carlo method VLSI (DE-588)4117388-0 gnd Integrierte Schaltung (DE-588)4027242-4 gnd Simulation (DE-588)4055072-2 gnd Technologie (DE-588)4059276-5 gnd Zuverlässigkeit (DE-588)4059245-5 gnd Ausbeute (DE-588)4208661-9 gnd |
| subject_GND | (DE-588)4117388-0 (DE-588)4027242-4 (DE-588)4055072-2 (DE-588)4059276-5 (DE-588)4059245-5 (DE-588)4208661-9 (DE-588)4113937-9 |
| title | Yield simulation for integrated circuits |
| title_auth | Yield simulation for integrated circuits |
| title_exact_search | Yield simulation for integrated circuits |
| title_exact_search_txtP | Yield simulation for integrated circuits |
| title_full | Yield simulation for integrated circuits by Duncan Moore Henry Walker |
| title_fullStr | Yield simulation for integrated circuits by Duncan Moore Henry Walker |
| title_full_unstemmed | Yield simulation for integrated circuits by Duncan Moore Henry Walker |
| title_short | Yield simulation for integrated circuits |
| title_sort | yield simulation for integrated circuits |
| topic | Circuits intégrés à très grande échelle - Conception et construction - Informatique Circuits intégrés à très grande échelle - Conception et construction - Modèles mathématiques Circuits intégrés à très grande échelle - Conception et construction ram Circuits intégrés à très grande échelle - Défauts - Informatique Circuits intégrés à très grande échelle - Défauts - Modèles mathématiques Monte-Carlo, Méthode de Simulation, Méthodes de ram Datenverarbeitung Mathematisches Modell Integrated circuits Very large scale integration Defects Data processing Integrated circuits Very large scale integration Defects Mathematical models Integrated circuits Very large scale integration Design and construction Data processing Integrated circuits Very large scale integration Design and construction Mathematical models Monte Carlo method VLSI (DE-588)4117388-0 gnd Integrierte Schaltung (DE-588)4027242-4 gnd Simulation (DE-588)4055072-2 gnd Technologie (DE-588)4059276-5 gnd Zuverlässigkeit (DE-588)4059245-5 gnd Ausbeute (DE-588)4208661-9 gnd |
| topic_facet | Circuits intégrés à très grande échelle - Conception et construction - Informatique Circuits intégrés à très grande échelle - Conception et construction - Modèles mathématiques Circuits intégrés à très grande échelle - Conception et construction Circuits intégrés à très grande échelle - Défauts - Informatique Circuits intégrés à très grande échelle - Défauts - Modèles mathématiques Monte-Carlo, Méthode de Simulation, Méthodes de Datenverarbeitung Mathematisches Modell Integrated circuits Very large scale integration Defects Data processing Integrated circuits Very large scale integration Defects Mathematical models Integrated circuits Very large scale integration Design and construction Data processing Integrated circuits Very large scale integration Design and construction Mathematical models Monte Carlo method VLSI Integrierte Schaltung Simulation Technologie Zuverlässigkeit Ausbeute Hochschulschrift |
| work_keys_str_mv | AT walkerduncanm yieldsimulationforintegratedcircuits |