SystemVerilog for design: a guide to using SystemVerilog for hardware design and modeling
Saved in:
| Main Authors: | , , |
|---|---|
| Format: | Book |
| Language: | English |
| Published: |
New York
Springer
2006
|
| Edition: | second edition |
| Subjects: | |
| Item Description: | Includes bibliographical references and index |
| Physical Description: | xxx, 418 p. ill. 25 cm |
| ISBN: | 0387333991 |
Staff View
MARC
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| 245 | 1 | 0 | |a SystemVerilog for design |b a guide to using SystemVerilog for hardware design and modeling |c by Stuart Sutherland ; Simon Davidmann ; Peter Flak. Foreword by Phil Moorby |
| 250 | |a second edition | ||
| 264 | 1 | |a New York |b Springer |c 2006 | |
| 300 | |a xxx, 418 p. |b ill. |c 25 cm | ||
| 336 | |b txt |2 rdacontent | ||
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| 500 | |a Includes bibliographical references and index | ||
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| 650 | 4 | |a Electronic digital computers |x Design and construction | |
| 650 | 4 | |a Computer simulation | |
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| id | DE-604.BV021802786 |
| illustrated | Illustrated |
| index_date | 2024-07-02T15:48:24Z |
| indexdate | 2024-07-09T20:44:58Z |
| institution | BVB |
| isbn | 0387333991 |
| language | English |
| oai_aleph_id | oai:aleph.bib-bvb.de:BVB01-015015257 |
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| physical | xxx, 418 p. ill. 25 cm |
| publishDate | 2006 |
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| publishDateSort | 2006 |
| publisher | Springer |
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| spelling | Sutherland, Stuart Verfasser aut SystemVerilog for design a guide to using SystemVerilog for hardware design and modeling by Stuart Sutherland ; Simon Davidmann ; Peter Flak. Foreword by Phil Moorby second edition New York Springer 2006 xxx, 418 p. ill. 25 cm txt rdacontent n rdamedia nc rdacarrier Includes bibliographical references and index Verilog (Computer hardware description language) Electronic digital computers Design and construction Computer simulation VERILOG (DE-588)4268385-3 gnd rswk-swf VERILOG (DE-588)4268385-3 s DE-604 Davidmann, Simon Verfasser aut Flake, Peter Verfasser aut |
| spellingShingle | Sutherland, Stuart Davidmann, Simon Flake, Peter SystemVerilog for design a guide to using SystemVerilog for hardware design and modeling Verilog (Computer hardware description language) Electronic digital computers Design and construction Computer simulation VERILOG (DE-588)4268385-3 gnd |
| subject_GND | (DE-588)4268385-3 |
| title | SystemVerilog for design a guide to using SystemVerilog for hardware design and modeling |
| title_auth | SystemVerilog for design a guide to using SystemVerilog for hardware design and modeling |
| title_exact_search | SystemVerilog for design a guide to using SystemVerilog for hardware design and modeling |
| title_exact_search_txtP | SystemVerilog for design a guide to using SystemVerilog for hardware design and modeling |
| title_full | SystemVerilog for design a guide to using SystemVerilog for hardware design and modeling by Stuart Sutherland ; Simon Davidmann ; Peter Flak. Foreword by Phil Moorby |
| title_fullStr | SystemVerilog for design a guide to using SystemVerilog for hardware design and modeling by Stuart Sutherland ; Simon Davidmann ; Peter Flak. Foreword by Phil Moorby |
| title_full_unstemmed | SystemVerilog for design a guide to using SystemVerilog for hardware design and modeling by Stuart Sutherland ; Simon Davidmann ; Peter Flak. Foreword by Phil Moorby |
| title_short | SystemVerilog for design |
| title_sort | systemverilog for design a guide to using systemverilog for hardware design and modeling |
| title_sub | a guide to using SystemVerilog for hardware design and modeling |
| topic | Verilog (Computer hardware description language) Electronic digital computers Design and construction Computer simulation VERILOG (DE-588)4268385-3 gnd |
| topic_facet | Verilog (Computer hardware description language) Electronic digital computers Design and construction Computer simulation VERILOG |
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