SystemVerilog for design: a guide to using SystemVerilog for hardware design and modeling
Gespeichert in:
| Hauptverfasser: | , , |
|---|---|
| Format: | Buch |
| Sprache: | English |
| Veröffentlicht: |
New York
Springer
2006
|
| Ausgabe: | second edition |
| Schlagworte: | |
| Beschreibung: | Includes bibliographical references and index |
| Beschreibung: | xxx, 418 p. ill. 25 cm |
| ISBN: | 0387333991 |
Internformat
MARC
| LEADER | 00000nam a2200000 c 4500 | ||
|---|---|---|---|
| 001 | BV021802786 | ||
| 003 | DE-604 | ||
| 005 | 20110615 | ||
| 007 | t | ||
| 008 | 061109s2006 xxua||| |||| 00||| eng d | ||
| 020 | |a 0387333991 |c hd.bd. |9 0-387-33399-1 | ||
| 035 | |a (OCoLC)255372743 | ||
| 035 | |a (DE-599)BVBBV021802786 | ||
| 040 | |a DE-604 |b ger |e aacr | ||
| 041 | 0 | |a eng | |
| 044 | |a xxu |c US | ||
| 049 | |a DE-29T |a DE-91 | ||
| 050 | 0 | |a TK7885.7 | |
| 084 | |a ST 250 |0 (DE-625)143626: |2 rvk | ||
| 084 | |a DAT 190f |2 stub | ||
| 100 | 1 | |a Sutherland, Stuart |e Verfasser |4 aut | |
| 245 | 1 | 0 | |a SystemVerilog for design |b a guide to using SystemVerilog for hardware design and modeling |c by Stuart Sutherland ; Simon Davidmann ; Peter Flak. Foreword by Phil Moorby |
| 250 | |a second edition | ||
| 264 | 1 | |a New York |b Springer |c 2006 | |
| 300 | |a xxx, 418 p. |b ill. |c 25 cm | ||
| 336 | |b txt |2 rdacontent | ||
| 337 | |b n |2 rdamedia | ||
| 338 | |b nc |2 rdacarrier | ||
| 500 | |a Includes bibliographical references and index | ||
| 650 | 4 | |a Verilog (Computer hardware description language) | |
| 650 | 4 | |a Electronic digital computers |x Design and construction | |
| 650 | 4 | |a Computer simulation | |
| 650 | 0 | 7 | |a VERILOG |0 (DE-588)4268385-3 |2 gnd |9 rswk-swf |
| 689 | 0 | 0 | |a VERILOG |0 (DE-588)4268385-3 |D s |
| 689 | 0 | |5 DE-604 | |
| 700 | 1 | |a Davidmann, Simon |e Verfasser |4 aut | |
| 700 | 1 | |a Flake, Peter |e Verfasser |4 aut | |
| 999 | |a oai:aleph.bib-bvb.de:BVB01-015015257 | ||
Datensatz im Suchindex
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|---|---|
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| any_adam_object | |
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| author | Sutherland, Stuart Davidmann, Simon Flake, Peter |
| author_facet | Sutherland, Stuart Davidmann, Simon Flake, Peter |
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| author_sort | Sutherland, Stuart |
| author_variant | s s ss s d sd p f pf |
| building | Verbundindex |
| bvnumber | BV021802786 |
| callnumber-first | T - Technology |
| callnumber-label | TK7885 |
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| callnumber-search | TK7885.7 |
| callnumber-sort | TK 47885.7 |
| callnumber-subject | TK - Electrical and Nuclear Engineering |
| classification_rvk | ST 250 |
| classification_tum | DAT 190f |
| ctrlnum | (OCoLC)255372743 (DE-599)BVBBV021802786 |
| discipline | Informatik |
| discipline_str_mv | Informatik |
| edition | second edition |
| format | Book |
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| id | DE-604.BV021802786 |
| illustrated | Illustrated |
| index_date | 2024-07-02T15:48:24Z |
| indexdate | 2024-07-09T20:44:58Z |
| institution | BVB |
| isbn | 0387333991 |
| language | English |
| oai_aleph_id | oai:aleph.bib-bvb.de:BVB01-015015257 |
| oclc_num | 255372743 |
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| owner_facet | DE-29T DE-91 DE-BY-TUM |
| physical | xxx, 418 p. ill. 25 cm |
| publishDate | 2006 |
| publishDateSearch | 2006 |
| publishDateSort | 2006 |
| publisher | Springer |
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| spelling | Sutherland, Stuart Verfasser aut SystemVerilog for design a guide to using SystemVerilog for hardware design and modeling by Stuart Sutherland ; Simon Davidmann ; Peter Flak. Foreword by Phil Moorby second edition New York Springer 2006 xxx, 418 p. ill. 25 cm txt rdacontent n rdamedia nc rdacarrier Includes bibliographical references and index Verilog (Computer hardware description language) Electronic digital computers Design and construction Computer simulation VERILOG (DE-588)4268385-3 gnd rswk-swf VERILOG (DE-588)4268385-3 s DE-604 Davidmann, Simon Verfasser aut Flake, Peter Verfasser aut |
| spellingShingle | Sutherland, Stuart Davidmann, Simon Flake, Peter SystemVerilog for design a guide to using SystemVerilog for hardware design and modeling Verilog (Computer hardware description language) Electronic digital computers Design and construction Computer simulation VERILOG (DE-588)4268385-3 gnd |
| subject_GND | (DE-588)4268385-3 |
| title | SystemVerilog for design a guide to using SystemVerilog for hardware design and modeling |
| title_auth | SystemVerilog for design a guide to using SystemVerilog for hardware design and modeling |
| title_exact_search | SystemVerilog for design a guide to using SystemVerilog for hardware design and modeling |
| title_exact_search_txtP | SystemVerilog for design a guide to using SystemVerilog for hardware design and modeling |
| title_full | SystemVerilog for design a guide to using SystemVerilog for hardware design and modeling by Stuart Sutherland ; Simon Davidmann ; Peter Flak. Foreword by Phil Moorby |
| title_fullStr | SystemVerilog for design a guide to using SystemVerilog for hardware design and modeling by Stuart Sutherland ; Simon Davidmann ; Peter Flak. Foreword by Phil Moorby |
| title_full_unstemmed | SystemVerilog for design a guide to using SystemVerilog for hardware design and modeling by Stuart Sutherland ; Simon Davidmann ; Peter Flak. Foreword by Phil Moorby |
| title_short | SystemVerilog for design |
| title_sort | systemverilog for design a guide to using systemverilog for hardware design and modeling |
| title_sub | a guide to using SystemVerilog for hardware design and modeling |
| topic | Verilog (Computer hardware description language) Electronic digital computers Design and construction Computer simulation VERILOG (DE-588)4268385-3 gnd |
| topic_facet | Verilog (Computer hardware description language) Electronic digital computers Design and construction Computer simulation VERILOG |
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