Writing testbenches using SystemVerilog:
Gespeichert in:
| 1. Verfasser: | |
|---|---|
| Format: | Buch |
| Sprache: | English |
| Veröffentlicht: |
New York
Springer
2006
|
| Schlagworte: | |
| Beschreibung: | Includes bibliographical references and index |
| Beschreibung: | XXVI, 412 S. 25 cm |
| ISBN: | 9780387292212 9780387312750 0387312757 0387292217 |
Internformat
MARC
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|---|---|---|---|
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| 020 | |a 0387312757 |9 0-387-31275-7 | ||
| 020 | |a 0387292217 |9 0-387-29221-7 | ||
| 035 | |a (OCoLC)318299663 | ||
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| 040 | |a DE-604 |b ger |e aacr | ||
| 041 | 0 | |a eng | |
| 044 | |a xxu |c US | ||
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| 100 | 1 | |a Bergeron, Janick |e Verfasser |4 aut | |
| 245 | 1 | 0 | |a Writing testbenches using SystemVerilog |c Janick Bergeron |
| 264 | 1 | |a New York |b Springer |c 2006 | |
| 300 | |a XXVI, 412 S. |c 25 cm | ||
| 336 | |b txt |2 rdacontent | ||
| 337 | |b n |2 rdamedia | ||
| 338 | |b nc |2 rdacarrier | ||
| 500 | |a Includes bibliographical references and index | ||
| 650 | 4 | |a Computer hardware description languages | |
| 650 | 4 | |a Integrated circuits |x Verification | |
| 650 | 0 | 7 | |a VERILOG |0 (DE-588)4268385-3 |2 gnd |9 rswk-swf |
| 689 | 0 | 0 | |a VERILOG |0 (DE-588)4268385-3 |D s |
| 689 | 0 | |5 DE-604 | |
| 999 | |a oai:aleph.bib-bvb.de:BVB01-014993746 | ||
Datensatz im Suchindex
| _version_ | 1804135653781274624 |
|---|---|
| adam_txt | |
| any_adam_object | |
| any_adam_object_boolean | |
| author | Bergeron, Janick |
| author_facet | Bergeron, Janick |
| author_role | aut |
| author_sort | Bergeron, Janick |
| author_variant | j b jb |
| building | Verbundindex |
| bvnumber | BV021780976 |
| classification_rvk | ZN 4030 |
| ctrlnum | (OCoLC)318299663 (DE-599)BVBBV021780976 |
| dewey-full | 620 |
| dewey-hundreds | 600 - Technology (Applied sciences) |
| dewey-ones | 620 - Engineering and allied operations |
| dewey-raw | 620 |
| dewey-search | 620 |
| dewey-sort | 3620 |
| dewey-tens | 620 - Engineering and allied operations |
| discipline | Maschinenbau / Maschinenwesen Elektrotechnik / Elektronik / Nachrichtentechnik |
| discipline_str_mv | Maschinenbau / Maschinenwesen Elektrotechnik / Elektronik / Nachrichtentechnik |
| format | Book |
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| id | DE-604.BV021780976 |
| illustrated | Not Illustrated |
| index_date | 2024-07-02T15:41:32Z |
| indexdate | 2024-07-09T20:43:56Z |
| institution | BVB |
| isbn | 9780387292212 9780387312750 0387312757 0387292217 |
| language | English |
| lccn | 2005938214 |
| oai_aleph_id | oai:aleph.bib-bvb.de:BVB01-014993746 |
| oclc_num | 318299663 |
| open_access_boolean | |
| owner | DE-1043 DE-92 |
| owner_facet | DE-1043 DE-92 |
| physical | XXVI, 412 S. 25 cm |
| publishDate | 2006 |
| publishDateSearch | 2006 |
| publishDateSort | 2006 |
| publisher | Springer |
| record_format | marc |
| spelling | Bergeron, Janick Verfasser aut Writing testbenches using SystemVerilog Janick Bergeron New York Springer 2006 XXVI, 412 S. 25 cm txt rdacontent n rdamedia nc rdacarrier Includes bibliographical references and index Computer hardware description languages Integrated circuits Verification VERILOG (DE-588)4268385-3 gnd rswk-swf VERILOG (DE-588)4268385-3 s DE-604 |
| spellingShingle | Bergeron, Janick Writing testbenches using SystemVerilog Computer hardware description languages Integrated circuits Verification VERILOG (DE-588)4268385-3 gnd |
| subject_GND | (DE-588)4268385-3 |
| title | Writing testbenches using SystemVerilog |
| title_auth | Writing testbenches using SystemVerilog |
| title_exact_search | Writing testbenches using SystemVerilog |
| title_exact_search_txtP | Writing testbenches using SystemVerilog |
| title_full | Writing testbenches using SystemVerilog Janick Bergeron |
| title_fullStr | Writing testbenches using SystemVerilog Janick Bergeron |
| title_full_unstemmed | Writing testbenches using SystemVerilog Janick Bergeron |
| title_short | Writing testbenches using SystemVerilog |
| title_sort | writing testbenches using systemverilog |
| topic | Computer hardware description languages Integrated circuits Verification VERILOG (DE-588)4268385-3 gnd |
| topic_facet | Computer hardware description languages Integrated circuits Verification VERILOG |
| work_keys_str_mv | AT bergeronjanick writingtestbenchesusingsystemverilog |