Advances in computer systems architecture: 10th Asia-Pacific conference, ACSAC 2005, Singapore, October 24 - 26, 2005 ; proceedings
Gespeichert in:
| Format: | Tagungsbericht Buch |
|---|---|
| Sprache: | English |
| Veröffentlicht: |
Berlin [u.a.]
Springer
2005
|
| Schriftenreihe: | Lecture notes in computer science
3740 |
| Schlagworte: | |
| Online-Zugang: | Inhaltsverzeichnis |
| Beschreibung: | Literaturangaben |
| Beschreibung: | XVII, 833 S. Ill., graph. Darst. |
| ISBN: | 9783540296430 3540296433 |
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| 245 | 1 | 0 | |a Advances in computer systems architecture |b 10th Asia-Pacific conference, ACSAC 2005, Singapore, October 24 - 26, 2005 ; proceedings |c Thambipillai Srikanthan ... (eds.) |
| 264 | 1 | |a Berlin [u.a.] |b Springer |c 2005 | |
| 300 | |a XVII, 833 S. |b Ill., graph. Darst. | ||
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| 490 | 1 | |a Lecture notes in computer science |v 3740 | |
| 500 | |a Literaturangaben | ||
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Datensatz im Suchindex
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Table of Contents
Keynote Address I
Processor Architecture for Trustworthy Computers
Ruby B. Lee
Session 1A: Energy Efficient and Power Aware
Techniques
Efficient Voltage Scheduling and Energy-Aware Co-synthesis for
Real-Time
Amjad Mohsen, Richard
Energy-Effective Instruction Fetch Unit for Wide Issue Processors
Juan L.
Rule-Based Power-Balanced VLIW Instruction Scheduling with
Uncertainty
Shu Xiao, Edmund M.-K. Lai,
An Innovative Instruction Cache for Embedded Processors
Cheol Hong Kim, Sung Woo Chung,
Dynamic Voltage Scaling for Power Aware Fast Fourier Transform
(FFT) Processor
David
Session IB: Methodologies and Architectures for
Application-Specific Systems
Design of an Efficient Multiplier-Less Architecture for Multi-dimensional
Convolution
Ming Z. Zhang,
A Pipelined Hardware Architecture for Motion Estimation of
H.264/AVC
Su-
Embedded Intelligent Imaging On-Board Small Satellites
Siti
XII Table of Contents
Architectural Enhancements for Color Image and Video Processing on
Embedded Systems
Jongmyon Kim, D. Scott Wills, Linda M. Wills
A Portable Doppler Device Based on a DSP with High- Performance
Spectral Estimation and Output
Yufeng Zhang, Yi Zhou, Jianhua Chen, Xinling Shi,
Zhenyu Guo
Session 2A: Processor Architectures and
Microarchitectures
A Power-Efficient Processor Core for Reactive Embedded
Applications
Lei Yang,
A Stream Architecture Supporting Multiple Stream Execution Models
Nan Wu,
The Challenges of Massive On-Chip Concurrency
Kostas Bousias, Chris Jesshope
FMRPU: Design of Pine-Grain Multi-context
Unit
Jih-Ching
Session 2B: High-Reliability and Fault-Tolerant
Architectures
Modularized Redundant Parallel Virtual Pile System
Sheng-Kai Hung, Yarsun Hsu
Resource-Driven Optimizations for Transient-Fault Detecting
SuperScalar Microarchitectures
Jie S. Hu, CM. Link, Johnsy K. John, Shuai Wang,
Sotirios G. Ziavras
A Fault-Tolerant Routing Strategy for Fibonacci-Class Cubes
Xinhua Zhang, Peter K.K.
Embedding of Cycles in the Faulty Hypercube
Sun-Yuan Hsieh
Table of Contents XIII
Session 3A: Compiler and OS for Emerging
Architectures
Improving the Performance of GCC by Exploiting IA-64 Architectural
Features
Canqun Yang, Xuejun Yang, Jingling Xue
An Integrated Partitioning and Scheduling Based Branch
Decoupling
Pramod Ramarao, Akhilesh Tyagi
A Register Allocation Framework for Banked Register Files with Access
Constraints
Feng Zhou, Junchao Zhang, Chengyong Wu,
Zhaoqing Zhang
Designing a Concurrent Hardware Garbage Collector for Small
Embedded Systems
Flavius
Irregular
Chang Wu Yu, Ching-Hsien Hsu, Kun-Ming Yu, C.-K. Liang,
Chun-I Chen
Session 3B: Data Value Predictions
Making Power-Efficient Data Value Predictions
Yong Xiao, Xingming Zhou, Kun Deng
Speculative Issue Logic
You-Jan Tsai, Jong-Jiann Shieh
Using Decision Trees to Improve Program-Based and Profile-Based
Static Branch Prediction
Veerle Desmet,
Arithmetic Data Value Speculation
Daniel R. Kelly, Braden J. Phillips
Exploiting Thread-Level Speculative Parallelism with Software Value
Prediction
Xiao-Feng Li, Chen
XIV Table of Contents
Keynote Address II
Challenges and Opportunities on Multi-core Microprocessor
Jesse Fang
Session 4A:
Polymorphic Architectures
Software-Oriented System-Level Simulation for Design Space
Exploration of Reconflgurable Architectures
K.S. Tham, D.L. Maskell
A Switch Wrapper Design for SNA On-Chip-Network
Jiho Chang, Jongsu Yi, JunSeong Kim
A Configuration System Architecture Supporting Bit-Stream
Compression for FPGAs
Marco Delia Torre, Usama Malik, Oliver Diessel
Biological Sequence Analysis with Hidden Markov Models on an
FPGA
Jacop
Douglas L. Maskell
FPGAs for Improved Energy Efficiency in Processor Based Systems
P.C.
Morphable Structures for Reconfigurable Instruction Set Processors
Siew-Kei Lam, Deng Yun, Thambipillai Srikanthan
Session 4B: Interconnect Networks and Network
Interfaces
Implementation of a Hybrid TCP/IP Offload Engine Prototype
Hankook Jang, Sang-Hwa Chung, Soo-Cheol Oh
Matrix-Star Graphs: A New Interconnection Network Based on Matrix
Operations
Hyeong-OkLee, Jong-SeokKim, Kyoung-WookPark, Jeonghyun
Eunseuk Oh
The Channel Assignment Algorithm on RP(k) Networks
Fang'ai Liu, Xinhua Wang, Liancheng Xu
Table of Contents XV
Extending Address Space of IP Networks with Hierarchical
Addressing
Tingrong
Yongtian Yang
The Star-Pyramid Graph: An Attractive Alternative to the Pyramid
N. Imani, H. Sarbazi-Azad
Building a Terabit Router with XD Networks
Huaxi Gu, Zengji Liu, Jungang Yang, Zhiliang Qiu,
Guochang Kang
Session 5A:
Models
A Real Coded Genetic Algorithm for Data Partitioning and Scheduling
in Networks with Arbitrary Processor Release Time
S. Suresh, V.
D3DPR: A Direct3D-Based Large-Scale Display Parallel Rendering
System Architecture for Clusters
Zhen Liu, Jiaoying Shi, Haoyu Peng,
Determining Optimal Grain Size for Efficient Vector Processing on
SIMD Image Processing Architectures
Jongmyon Kim, D. Scott Wills, Linda M. Wills
A Technique to Reduce Preemption Overhead in
Multiprocessor Task Scheduling
Kyong Jo Jung, Chanik Park
Session 5B: Hardware-Software Partitioning,
Verification, and Testing of Complex Architectures
Minimizing Power in Hardware/Software Partitioning
Wu, Thambipillai SHkanthan, Chengbin Yan
Exploring Design Space Using Transaction Level Models
Youhui Zhang, Dong Liu, Yu Gu, Dongsheng Wang
Increasing Embedding Probabilities of RPRPs in RIN Based BIST
Dong-Sup Song, Sungho Kang
XVI Table of Contents
A Practical Test Scheduling Using Network-Based TAM in Network on
Chip Architecture
Jin-Ho Ahn, Byung
Session 6A: Architectures for Secured Computing
DBIL- A Flexible Architecture for Blowfish Encryption Using Dynamic
Reconfiguration, Replication, Inner-Loop Pipelining, Loop Folding
Techniques
T.S.B. Sudarshan, Rahil Abbas Mir, S. Vijayalakshmi
Efficient Architectural Support for Secure Bus-Based Shared Memory
Multiprocessor
Khaled Z. Ibrahim
Covert Channel Analysis of the Password-Capability System
Dan Mossop, Ronald Pose
Session 6B: Simulation and Performance Evaluation
Comparing Low-Level Behavior of SPEC CPU and Java Workloads
Georges, Lieven Eechhout,
Application of
Real-Time Computer Control
Jong-Sun Kim, Ji- Yoon Yoo
VLSI Performance Evaluation and Analysis of Systolic and Semisystolic
Finite Field Multipliers
Ravi Kumar Satzoda, Chip-Hong Chang
Session
and Applications I
Analysis of Real-Time Communication System with Queuing Priority
Yunbo Wu, Zhishu Li, Yunhai Wu, Zhihua Chen, Tun
Li Wang, Jianjun Hu
FPGA Implementation and Analyses of Cluster Maintenance
Algorithms in Mobile Ad-Hoc Networks
Sai Ganesh
Table of
A Study on the Performance Evaluation of Forward Link in CDMA
Mobile Communication Systems
Sun-Kuk Noh
Session
Management
Cache Leakage Management for Multi-programming Workloads
Chun-Yang Chen, ChiorLin Yang, Shih-Hao Hung
A Memory Bandwidth Effective Cache Store Miss Policy
Hou
Application-Specific Hardware-Driven Prefetching to Improve Data
Cache Performance
Mehdi Modarressi, Maxiar Goudarzi, Shaahin Hessabi
Targeted Data Prefetching
Weng-Fai Wong
Session
and Applications II
Area-Time Efficient Systolic Architecture for the DCT
Pramod Kumar Meher
Efficient VLSI Architectures for Convolution and Lifting Based 2-D
Discrete Wavelet Transform
Gab Cheon Jung, Seong Mo Park, Jung Hyoun Kim
A Novel Reversible TSG Gate and Its Application for Designing
Reversible Carry Look-Ahead and Other Adder Architectures
Himanshu Thapliyal, M.B. Srinivas
Implementation and Analysis of TCP/IP Offload Engine and RDMA
Transfer Mechanisms on an Embedded System
In-Su Yoon, Sang-Hwa Chung
Author Index |
| adam_txt |
Table of Contents
Keynote Address I
Processor Architecture for Trustworthy Computers
Ruby B. Lee
Session 1A: Energy Efficient and Power Aware
Techniques
Efficient Voltage Scheduling and Energy-Aware Co-synthesis for
Real-Time
Amjad Mohsen, Richard
Energy-Effective Instruction Fetch Unit for Wide Issue Processors
Juan L.
Rule-Based Power-Balanced VLIW Instruction Scheduling with
Uncertainty
Shu Xiao, Edmund M.-K. Lai,
An Innovative Instruction Cache for Embedded Processors
Cheol Hong Kim, Sung Woo Chung,
Dynamic Voltage Scaling for Power Aware Fast Fourier Transform
(FFT) Processor
David
Session IB: Methodologies and Architectures for
Application-Specific Systems
Design of an Efficient Multiplier-Less Architecture for Multi-dimensional
Convolution
Ming Z. Zhang,
A Pipelined Hardware Architecture for Motion Estimation of
H.264/AVC
Su-
Embedded Intelligent Imaging On-Board Small Satellites
Siti
XII Table of Contents
Architectural Enhancements for Color Image and Video Processing on
Embedded Systems
Jongmyon Kim, D. Scott Wills, Linda M. Wills
A Portable Doppler Device Based on a DSP with High- Performance
Spectral Estimation and Output
Yufeng Zhang, Yi Zhou, Jianhua Chen, Xinling Shi,
Zhenyu Guo
Session 2A: Processor Architectures and
Microarchitectures
A Power-Efficient Processor Core for Reactive Embedded
Applications
Lei Yang,
A Stream Architecture Supporting Multiple Stream Execution Models
Nan Wu,
The Challenges of Massive On-Chip Concurrency
Kostas Bousias, Chris Jesshope
FMRPU: Design of Pine-Grain Multi-context
Unit
Jih-Ching
Session 2B: High-Reliability and Fault-Tolerant
Architectures
Modularized Redundant Parallel Virtual Pile System
Sheng-Kai Hung, Yarsun Hsu
Resource-Driven Optimizations for Transient-Fault Detecting
SuperScalar Microarchitectures
Jie S. Hu, CM. Link, Johnsy K. John, Shuai Wang,
Sotirios G. Ziavras
A Fault-Tolerant Routing Strategy for Fibonacci-Class Cubes
Xinhua Zhang, Peter K.K.
Embedding of Cycles in the Faulty Hypercube
Sun-Yuan Hsieh
Table of Contents XIII
Session 3A: Compiler and OS for Emerging
Architectures
Improving the Performance of GCC by Exploiting IA-64 Architectural
Features
Canqun Yang, Xuejun Yang, Jingling Xue
An Integrated Partitioning and Scheduling Based Branch
Decoupling
Pramod Ramarao, Akhilesh Tyagi
A Register Allocation Framework for Banked Register Files with Access
Constraints
Feng Zhou, Junchao Zhang, Chengyong Wu,
Zhaoqing Zhang
Designing a Concurrent Hardware Garbage Collector for Small
Embedded Systems
Flavius
Irregular
Chang Wu Yu, Ching-Hsien Hsu, Kun-Ming Yu, C.-K. Liang,
Chun-I Chen
Session 3B: Data Value Predictions
Making Power-Efficient Data Value Predictions
Yong Xiao, Xingming Zhou, Kun Deng
Speculative Issue Logic
You-Jan Tsai, Jong-Jiann Shieh
Using Decision Trees to Improve Program-Based and Profile-Based
Static Branch Prediction
Veerle Desmet,
Arithmetic Data Value Speculation
Daniel R. Kelly, Braden J. Phillips
Exploiting Thread-Level Speculative Parallelism with Software Value
Prediction
Xiao-Feng Li, Chen
XIV Table of Contents
Keynote Address II
Challenges and Opportunities on Multi-core Microprocessor
Jesse Fang
Session 4A:
Polymorphic Architectures
Software-Oriented System-Level Simulation for Design Space
Exploration of Reconflgurable Architectures
K.S. Tham, D.L. Maskell
A Switch Wrapper Design for SNA On-Chip-Network
Jiho Chang, Jongsu Yi, JunSeong Kim
A Configuration System Architecture Supporting Bit-Stream
Compression for FPGAs
Marco Delia Torre, Usama Malik, Oliver Diessel
Biological Sequence Analysis with Hidden Markov Models on an
FPGA
Jacop
Douglas L. Maskell
FPGAs for Improved Energy Efficiency in Processor Based Systems
P.C.
Morphable Structures for Reconfigurable Instruction Set Processors
Siew-Kei Lam, Deng Yun, Thambipillai Srikanthan
Session 4B: Interconnect Networks and Network
Interfaces
Implementation of a Hybrid TCP/IP Offload Engine Prototype
Hankook Jang, Sang-Hwa Chung, Soo-Cheol Oh
Matrix-Star Graphs: A New Interconnection Network Based on Matrix
Operations
Hyeong-OkLee, Jong-SeokKim, Kyoung-WookPark, Jeonghyun
Eunseuk Oh
The Channel Assignment Algorithm on RP(k) Networks
Fang'ai Liu, Xinhua Wang, Liancheng Xu
Table of Contents XV
Extending Address Space of IP Networks with Hierarchical
Addressing
Tingrong
Yongtian Yang
The Star-Pyramid Graph: An Attractive Alternative to the Pyramid
N. Imani, H. Sarbazi-Azad
Building a Terabit Router with XD Networks
Huaxi Gu, Zengji Liu, Jungang Yang, Zhiliang Qiu,
Guochang Kang
Session 5A:
Models
A Real Coded Genetic Algorithm for Data Partitioning and Scheduling
in Networks with Arbitrary Processor Release Time
S. Suresh, V.
D3DPR: A Direct3D-Based Large-Scale Display Parallel Rendering
System Architecture for Clusters
Zhen Liu, Jiaoying Shi, Haoyu Peng,
Determining Optimal Grain Size for Efficient Vector Processing on
SIMD Image Processing Architectures
Jongmyon Kim, D. Scott Wills, Linda M. Wills
A Technique to Reduce Preemption Overhead in
Multiprocessor Task Scheduling
Kyong Jo Jung, Chanik Park
Session 5B: Hardware-Software Partitioning,
Verification, and Testing of Complex Architectures
Minimizing Power in Hardware/Software Partitioning
Wu, Thambipillai SHkanthan, Chengbin Yan
Exploring Design Space Using Transaction Level Models
Youhui Zhang, Dong Liu, Yu Gu, Dongsheng Wang
Increasing Embedding Probabilities of RPRPs in RIN Based BIST
Dong-Sup Song, Sungho Kang
XVI Table of Contents
A Practical Test Scheduling Using Network-Based TAM in Network on
Chip Architecture
Jin-Ho Ahn, Byung
Session 6A: Architectures for Secured Computing
DBIL- A Flexible Architecture for Blowfish Encryption Using Dynamic
Reconfiguration, Replication, Inner-Loop Pipelining, Loop Folding
Techniques
T.S.B. Sudarshan, Rahil Abbas Mir, S. Vijayalakshmi
Efficient Architectural Support for Secure Bus-Based Shared Memory
Multiprocessor
Khaled Z. Ibrahim
Covert Channel Analysis of the Password-Capability System
Dan Mossop, Ronald Pose
Session 6B: Simulation and Performance Evaluation
Comparing Low-Level Behavior of SPEC CPU and Java Workloads
Georges, Lieven Eechhout,
Application of
Real-Time Computer Control
Jong-Sun Kim, Ji- Yoon Yoo
VLSI Performance Evaluation and Analysis of Systolic and Semisystolic
Finite Field Multipliers
Ravi Kumar Satzoda, Chip-Hong Chang
Session
and Applications I
Analysis of Real-Time Communication System with Queuing Priority
Yunbo Wu, Zhishu Li, Yunhai Wu, Zhihua Chen, Tun
Li Wang, Jianjun Hu
FPGA Implementation and Analyses of Cluster Maintenance
Algorithms in Mobile Ad-Hoc Networks
Sai Ganesh
Table of
A Study on the Performance Evaluation of Forward Link in CDMA
Mobile Communication Systems
Sun-Kuk Noh
Session
Management
Cache Leakage Management for Multi-programming Workloads
Chun-Yang Chen, ChiorLin Yang, Shih-Hao Hung
A Memory Bandwidth Effective Cache Store Miss Policy
Hou
Application-Specific Hardware-Driven Prefetching to Improve Data
Cache Performance
Mehdi Modarressi, Maxiar Goudarzi, Shaahin Hessabi
Targeted Data Prefetching
Weng-Fai Wong
Session
and Applications II
Area-Time Efficient Systolic Architecture for the DCT
Pramod Kumar Meher
Efficient VLSI Architectures for Convolution and Lifting Based 2-D
Discrete Wavelet Transform
Gab Cheon Jung, Seong Mo Park, Jung Hyoun Kim
A Novel Reversible TSG Gate and Its Application for Designing
Reversible Carry Look-Ahead and Other Adder Architectures
Himanshu Thapliyal, M.B. Srinivas
Implementation and Analysis of TCP/IP Offload Engine and RDMA
Transfer Mechanisms on an Embedded System
In-Su Yoon, Sang-Hwa Chung
Author Index |
| any_adam_object | 1 |
| any_adam_object_boolean | 1 |
| author_GND | (DE-588)13045415X |
| building | Verbundindex |
| bvnumber | BV020871333 |
| callnumber-first | Q - Science |
| callnumber-label | QA76 |
| callnumber-raw | QA76.9.A73 |
| callnumber-search | QA76.9.A73 |
| callnumber-sort | QA 276.9 A73 |
| callnumber-subject | QA - Mathematics |
| classification_rvk | SS 4800 |
| classification_tum | DAT 200f |
| ctrlnum | (OCoLC)62185932 (DE-599)BVBBV020871333 |
| dewey-full | 004 |
| dewey-hundreds | 000 - Computer science, information, general works |
| dewey-ones | 004 - Computer science |
| dewey-raw | 004 |
| dewey-search | 004 |
| dewey-sort | 14 |
| dewey-tens | 000 - Computer science, information, general works |
| discipline | Informatik |
| discipline_str_mv | Informatik |
| format | Conference Proceeding Book |
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| genre | (DE-588)1071861417 Konferenzschrift 2005 Singapur gnd-content |
| genre_facet | Konferenzschrift 2005 Singapur |
| id | DE-604.BV020871333 |
| illustrated | Illustrated |
| index_date | 2024-07-02T13:26:13Z |
| indexdate | 2025-01-10T15:08:10Z |
| institution | BVB |
| institution_GND | (DE-588)10118272-7 |
| isbn | 9783540296430 3540296433 |
| language | English |
| oai_aleph_id | oai:aleph.bib-bvb.de:BVB01-014193072 |
| oclc_num | 62185932 |
| open_access_boolean | |
| owner | DE-739 DE-91G DE-BY-TUM DE-473 DE-BY-UBG DE-706 DE-83 DE-11 |
| owner_facet | DE-739 DE-91G DE-BY-TUM DE-473 DE-BY-UBG DE-706 DE-83 DE-11 |
| physical | XVII, 833 S. Ill., graph. Darst. |
| publishDate | 2005 |
| publishDateSearch | 2005 |
| publishDateSort | 2005 |
| publisher | Springer |
| record_format | marc |
| series | Lecture notes in computer science |
| series2 | Lecture notes in computer science |
| spelling | Advances in computer systems architecture 10th Asia-Pacific conference, ACSAC 2005, Singapore, October 24 - 26, 2005 ; proceedings Thambipillai Srikanthan ... (eds.) Berlin [u.a.] Springer 2005 XVII, 833 S. Ill., graph. Darst. txt rdacontent n rdamedia nc rdacarrier Lecture notes in computer science 3740 Literaturangaben Architecture informatique rasuqam Ordinateurs - Architecture - Congrès Système informatique rasuqam Computer architecture Congresses Computerarchitektur (DE-588)4048717-9 gnd rswk-swf (DE-588)1071861417 Konferenzschrift 2005 Singapur gnd-content Computerarchitektur (DE-588)4048717-9 s DE-604 Srikanthan, Thambipillai Sonstige (DE-588)13045415X oth ACSAC 10 2005 Singapur Sonstige (DE-588)10118272-7 oth Lecture notes in computer science 3740 (DE-604)BV000000607 3740 Digitalisierung UBPassau application/pdf http://bvbr.bib-bvb.de:8991/F?func=service&doc_library=BVB01&local_base=BVB01&doc_number=014193072&sequence=000001&line_number=0001&func_code=DB_RECORDS&service_type=MEDIA Inhaltsverzeichnis |
| spellingShingle | Advances in computer systems architecture 10th Asia-Pacific conference, ACSAC 2005, Singapore, October 24 - 26, 2005 ; proceedings Lecture notes in computer science Architecture informatique rasuqam Ordinateurs - Architecture - Congrès Système informatique rasuqam Computer architecture Congresses Computerarchitektur (DE-588)4048717-9 gnd |
| subject_GND | (DE-588)4048717-9 (DE-588)1071861417 |
| title | Advances in computer systems architecture 10th Asia-Pacific conference, ACSAC 2005, Singapore, October 24 - 26, 2005 ; proceedings |
| title_auth | Advances in computer systems architecture 10th Asia-Pacific conference, ACSAC 2005, Singapore, October 24 - 26, 2005 ; proceedings |
| title_exact_search | Advances in computer systems architecture 10th Asia-Pacific conference, ACSAC 2005, Singapore, October 24 - 26, 2005 ; proceedings |
| title_exact_search_txtP | Advances in computer systems architecture 10th Asia-Pacific conference, ACSAC 2005, Singapore, October 24 - 26, 2005 ; proceedings |
| title_full | Advances in computer systems architecture 10th Asia-Pacific conference, ACSAC 2005, Singapore, October 24 - 26, 2005 ; proceedings Thambipillai Srikanthan ... (eds.) |
| title_fullStr | Advances in computer systems architecture 10th Asia-Pacific conference, ACSAC 2005, Singapore, October 24 - 26, 2005 ; proceedings Thambipillai Srikanthan ... (eds.) |
| title_full_unstemmed | Advances in computer systems architecture 10th Asia-Pacific conference, ACSAC 2005, Singapore, October 24 - 26, 2005 ; proceedings Thambipillai Srikanthan ... (eds.) |
| title_short | Advances in computer systems architecture |
| title_sort | advances in computer systems architecture 10th asia pacific conference acsac 2005 singapore october 24 26 2005 proceedings |
| title_sub | 10th Asia-Pacific conference, ACSAC 2005, Singapore, October 24 - 26, 2005 ; proceedings |
| topic | Architecture informatique rasuqam Ordinateurs - Architecture - Congrès Système informatique rasuqam Computer architecture Congresses Computerarchitektur (DE-588)4048717-9 gnd |
| topic_facet | Architecture informatique Ordinateurs - Architecture - Congrès Système informatique Computer architecture Congresses Computerarchitektur Konferenzschrift 2005 Singapur |
| url | http://bvbr.bib-bvb.de:8991/F?func=service&doc_library=BVB01&local_base=BVB01&doc_number=014193072&sequence=000001&line_number=0001&func_code=DB_RECORDS&service_type=MEDIA |
| volume_link | (DE-604)BV000000607 |
| work_keys_str_mv | AT srikanthanthambipillai advancesincomputersystemsarchitecture10thasiapacificconferenceacsac2005singaporeoctober24262005proceedings AT acsacsingapur advancesincomputersystemsarchitecture10thasiapacificconferenceacsac2005singaporeoctober24262005proceedings |