Correct hardware design and verification methods: 13th IFIP WG 10.5 Advanced Research, Working Conference, CHARME 2005, Saarbrücken, Germany, October 3 - 6, 2005 ; proceedings
Saved in:
| Format: | Conference Proceeding Book |
|---|---|
| Language: | English |
| Published: |
Berlin [u.a.]
Springer
2005
|
| Series: | Lecture Notes in Computer Science
3725 |
| Subjects: | |
| Physical Description: | XII, 412 S. Ill., graph. Darst. |
| ISBN: | 9783540291053 3540291059 |
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MARC
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| spelling | Correct hardware design and verification methods 13th IFIP WG 10.5 Advanced Research, Working Conference, CHARME 2005, Saarbrücken, Germany, October 3 - 6, 2005 ; proceedings Dominique Borrione ... (eds.) Berlin [u.a.] Springer 2005 XII, 412 S. Ill., graph. Darst. txt rdacontent n rdamedia nc rdacarrier Lecture Notes in Computer Science 3725 Circuit intégré à très grande échelle rasuqam Circuit intégré rasuqam Circuits intégrés - Vérification - Congrès Circuits intégrés à très grande échelle - Conception assistée par ordinateur - Congrès Conception assistée par ordinateur rasuqam Essai technique rasuqam Model-checking (Informatique) rasuqam Vérification formelle rasuqam Integrated circuits Verification Congresses Integrated circuits Very large scale integration Computer-aided design Congresses Schaltungsentwurf (DE-588)4179389-4 gnd rswk-swf Formale Methode (DE-588)4333722-3 gnd rswk-swf System-on-Chip (DE-588)4740357-3 gnd rswk-swf Entwurfssprache (DE-588)4295335-2 gnd rswk-swf Hardwareentwurf (DE-588)4159103-3 gnd rswk-swf Entwurfsautomation (DE-588)4312536-0 gnd rswk-swf Hardwareverifikation (DE-588)4214982-4 gnd rswk-swf Model Checking (DE-588)4434799-6 gnd rswk-swf (DE-588)1071861417 Konferenzschrift 2005 Saarbrücken gnd-content Hardwareentwurf (DE-588)4159103-3 s Formale Methode (DE-588)4333722-3 s DE-604 Hardwareverifikation (DE-588)4214982-4 s Model Checking (DE-588)4434799-6 s System-on-Chip (DE-588)4740357-3 s Entwurfsautomation (DE-588)4312536-0 s Entwurfssprache (DE-588)4295335-2 s Schaltungsentwurf (DE-588)4179389-4 s 1\p DE-604 Borrione, Dominique Sonstige oth CHARME 13 2005 Saarbrücken Sonstige (DE-588)10115824-5 oth Lecture Notes in Computer Science 3725 (DE-604)BV000000607 3725 1\p cgwrk 20201028 DE-101 https://d-nb.info/provenance/plan#cgwrk |
| spellingShingle | Correct hardware design and verification methods 13th IFIP WG 10.5 Advanced Research, Working Conference, CHARME 2005, Saarbrücken, Germany, October 3 - 6, 2005 ; proceedings Lecture Notes in Computer Science Circuit intégré à très grande échelle rasuqam Circuit intégré rasuqam Circuits intégrés - Vérification - Congrès Circuits intégrés à très grande échelle - Conception assistée par ordinateur - Congrès Conception assistée par ordinateur rasuqam Essai technique rasuqam Model-checking (Informatique) rasuqam Vérification formelle rasuqam Integrated circuits Verification Congresses Integrated circuits Very large scale integration Computer-aided design Congresses Schaltungsentwurf (DE-588)4179389-4 gnd Formale Methode (DE-588)4333722-3 gnd System-on-Chip (DE-588)4740357-3 gnd Entwurfssprache (DE-588)4295335-2 gnd Hardwareentwurf (DE-588)4159103-3 gnd Entwurfsautomation (DE-588)4312536-0 gnd Hardwareverifikation (DE-588)4214982-4 gnd Model Checking (DE-588)4434799-6 gnd |
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| title | Correct hardware design and verification methods 13th IFIP WG 10.5 Advanced Research, Working Conference, CHARME 2005, Saarbrücken, Germany, October 3 - 6, 2005 ; proceedings |
| title_auth | Correct hardware design and verification methods 13th IFIP WG 10.5 Advanced Research, Working Conference, CHARME 2005, Saarbrücken, Germany, October 3 - 6, 2005 ; proceedings |
| title_exact_search | Correct hardware design and verification methods 13th IFIP WG 10.5 Advanced Research, Working Conference, CHARME 2005, Saarbrücken, Germany, October 3 - 6, 2005 ; proceedings |
| title_full | Correct hardware design and verification methods 13th IFIP WG 10.5 Advanced Research, Working Conference, CHARME 2005, Saarbrücken, Germany, October 3 - 6, 2005 ; proceedings Dominique Borrione ... (eds.) |
| title_fullStr | Correct hardware design and verification methods 13th IFIP WG 10.5 Advanced Research, Working Conference, CHARME 2005, Saarbrücken, Germany, October 3 - 6, 2005 ; proceedings Dominique Borrione ... (eds.) |
| title_full_unstemmed | Correct hardware design and verification methods 13th IFIP WG 10.5 Advanced Research, Working Conference, CHARME 2005, Saarbrücken, Germany, October 3 - 6, 2005 ; proceedings Dominique Borrione ... (eds.) |
| title_short | Correct hardware design and verification methods |
| title_sort | correct hardware design and verification methods 13th ifip wg 10 5 advanced research working conference charme 2005 saarbrucken germany october 3 6 2005 proceedings |
| title_sub | 13th IFIP WG 10.5 Advanced Research, Working Conference, CHARME 2005, Saarbrücken, Germany, October 3 - 6, 2005 ; proceedings |
| topic | Circuit intégré à très grande échelle rasuqam Circuit intégré rasuqam Circuits intégrés - Vérification - Congrès Circuits intégrés à très grande échelle - Conception assistée par ordinateur - Congrès Conception assistée par ordinateur rasuqam Essai technique rasuqam Model-checking (Informatique) rasuqam Vérification formelle rasuqam Integrated circuits Verification Congresses Integrated circuits Very large scale integration Computer-aided design Congresses Schaltungsentwurf (DE-588)4179389-4 gnd Formale Methode (DE-588)4333722-3 gnd System-on-Chip (DE-588)4740357-3 gnd Entwurfssprache (DE-588)4295335-2 gnd Hardwareentwurf (DE-588)4159103-3 gnd Entwurfsautomation (DE-588)4312536-0 gnd Hardwareverifikation (DE-588)4214982-4 gnd Model Checking (DE-588)4434799-6 gnd |
| topic_facet | Circuit intégré à très grande échelle Circuit intégré Circuits intégrés - Vérification - Congrès Circuits intégrés à très grande échelle - Conception assistée par ordinateur - Congrès Conception assistée par ordinateur Essai technique Model-checking (Informatique) Vérification formelle Integrated circuits Verification Congresses Integrated circuits Very large scale integration Computer-aided design Congresses Schaltungsentwurf Formale Methode System-on-Chip Entwurfssprache Hardwareentwurf Entwurfsautomation Hardwareverifikation Model Checking Konferenzschrift 2005 Saarbrücken |
| volume_link | (DE-604)BV000000607 |
| work_keys_str_mv | AT borrionedominique correcthardwaredesignandverificationmethods13thifipwg105advancedresearchworkingconferencecharme2005saarbruckengermanyoctober362005proceedings AT charmesaarbrucken correcthardwaredesignandverificationmethods13thifipwg105advancedresearchworkingconferencecharme2005saarbruckengermanyoctober362005proceedings |