First IEEE/ACM/IFIP International Conference on Hardware/Software Codesign & System Synthesis: Newport Beach, California, USA, October 1-3, 2003
Gespeichert in:
| Körperschaft: | |
|---|---|
| Format: | Tagungsbericht Buch |
| Sprache: | English |
| Veröffentlicht: |
New York, N.Y.
Association for Computing Machinery
2003
|
| Schlagworte: | |
| Online-Zugang: | Inhaltsverzeichnis |
| Beschreibung: | XIV, 234 S. graph. Darst. |
| ISBN: | 1581137427 |
Internformat
MARC
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| 111 | 2 | |a International Conference on Hardware Software Codesign & System Synthesis |n 1 |d 2003 |c Newport Beach, Calif. |j Verfasser |0 (DE-588)10073274-4 |4 aut | |
| 245 | 1 | 0 | |a First IEEE/ACM/IFIP International Conference on Hardware/Software Codesign & System Synthesis |b Newport Beach, California, USA, October 1-3, 2003 |
| 246 | 1 | 3 | |a Hardware/software codesign & system synthesis |
| 246 | 1 | 3 | |a Hardware/software codesign and system synthesis |
| 246 | 1 | 3 | |a CODES+ISSS 2003 |
| 246 | 1 | 3 | |a CODES+ISSS '03 |
| 264 | 1 | |a New York, N.Y. |b Association for Computing Machinery |c 2003 | |
| 300 | |a XIV, 234 S. |b graph. Darst. | ||
| 336 | |b txt |2 rdacontent | ||
| 337 | |b n |2 rdamedia | ||
| 338 | |b nc |2 rdacarrier | ||
| 650 | 4 | |a System design |v Congresses | |
| 650 | 4 | |a Systems software |v Congresses | |
| 650 | 4 | |a Embedded computer systems |v Congresses | |
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Datensatz im Suchindex
| _version_ | 1804133773642563584 |
|---|---|
| adam_text | Table
of
Contents
Conference Organization
.....................................................................................................................................ix
Additional Reviewers
...........................................................................................................................................xiii
Session 1A: Architectural Exploration and System Simulations
Chairs: W. Najjar (University of California, Riverside), Y. Nakamura (Kyoto University)
•
Virtual Synchronization Technique with OS Modeling for Fast
and Time-accurate Cosimulation
.........................................................................................................................1
Y. Yi, D. Kim, S. Ha (Seoul National
Universit}-)
•
A Modular Simulation Framework for Architectural Exploration
of On-Chip Interconnection Networks
................................................................................................................7
T.
Kogel,
M.
Doerper, A. Wieferink, R. Leupers, G. Ascheid, H. Meyr (Aachen University of Technology).
S. Goossens (CoWare)
•
An Efficient Retargetable Framework for Instruction-Set Simulation
.....................................................13
M. Reshadi,
N.
Bansal, P. Mishra,
N.
Dutt (University of California, ¡nine)
Session 1B: Advances in System Modeling
Chairs: H. Yasuura (Kyushu University·), F. Brewer (University of California. Santa Barbara)
•
Invited Talk: Transaction Level Modeling: An Overview
.............................................................................19
L.
Cai, D.
Gajski
(University of California, Irvine)
•
Extending the SystemC Synthesis Subset by Object-Oriented Features
..............................................25
E.
Grimpe,
F. Oppenheimer (OFFIS
Research Institute)
•
RTOS Scheduling in Transaction Level Models
............................................................................................31
H. Yu, A.
Gerstlauer, D.
Gajski (University of California, ¡nine)
Session 2A: Support for Real Time
&
OS Services in Embedded Systems
Chairs: K.-J. Lin (University of California, Irvine), P.
Eles
(Linköping
University)
•
Synthesizing Operating System Based Device Drivers in Embedded Systems
..................................37
S. Wang, S. Malik (Princeton University)
•
Hardware Support for Real-time Operating Systems
...................................................................................45
P.
Kohout
(EVI
Technology),
В.
Ganesh,
В.
Jacob (University of Mankind, College Park)
•
Invited Talk: Programming Embedded Networked Sensor Systems
52
F. Zhao. J. Liu, J. Reich,
M. Chu,
J.
Liu (Palo Alto Research Center)
Session 2B: Case Studies in Embedded System
Chairs: W. Wolf (Princeton University). K. Wakabayashi (NEC Multimedia Research Laboratory)
•
Design Space Exploration of a Hardware-Software Co-designed GF(2m) Galois Field
Processor for Forward Error Correction and Cryptography
.....................................................................53
W.-M.
Lim,
M.
Benaissa /UniversityojSheffield)
•
A Fast Parallel Reed-Solomon Decoder on
a Reconfigurable
Architecture
59
A. Koohi,
N.
Bagherzadeh,
С
Pan /University of California, ¡nine)
•
The Analysis and Design of Architecture Systems for Speech Recognition
on Modern Handheld-Computing Devices
......................................................................................................65
A. Hagen,
D.
A. Connors.
B. L. Peliom
/University of
Colorado
at Boulder)
Keynote Talk
Chair: R. Gupta (University of
California, San
Diego)
•
The Evolution of CDMA Wireless Devices Based on Advanced Chip Sets and BREW
....................71
Ι. Μ
Jacobs (Qualcomm)
Invited Session A: Industry Best Practices and Upcoming Challenges
in Embedded Software and Hardware
Chair: R. Camposano (Synopsys)
•
Embedded Software Development for Wireless Handsets:
Field
Lessions in
Extreme Programming
........................................................................................................73
M. Underseth (SlTeclmologies)
•
Parametric Superscalar Microprocessors
.......................................................................................................73
F. Karim (STMicroelectronics)
Invited Session B: Challenges and New Directions in On-Chip Communication
Chairs: S. Hu (University of Notre Dame), J.
Henkel
(NEC)
•
Architectural versus Physical Solutions for On-Chip Communication Challenges
...........................74
D. Burger (University of Texas at Austin)
•
On-Chip Communication Design: Roadblocks and Avenues
...................................................................75
L. P.
Cartoni,
A. L. Sangiovanni-Vincentelli (University of California, Berkeley)
•
Architecture and Synthesis for Multi-Cycle On-Chip Communication
...................................................77
J. Cong, Y. Fan, G. Han, X. Yang, Z. Zhang (University of California, Los Angeles)
Panel
1
Organizers: R.
Bergamaschi
(IBM T. J. Watson Research Center), G. Martin /Cadence Berkeley Labs)
•
System-Level Design Tools: Who Needs Them, Who Has Them,
and How Much Should They Cost?
...................................................................................................................79
Moderator: G. Martin (Cadence Berkeley Labs)
Panelists: G. Smith (Gartner-
Dataquest).
P.
Paulin (ST
Microelectronics).
R.
Fordham (Motorola. Global Software Group). P. Hardee (CoWare). B. Bailey (Mentor Graphics)
Invited Talk
Chair: D. Gajski
ι
University of California. Inine)
•
Driving Forces Behind
SOC
Development
......................................................................................................81
M. C
Chiari (Miiidspeed
Technologies)
Panel
2
Organizer:
N.
Dutt (University of California. Inine)
•
Driving Agenda for Systems Research
............................................................................................................82
Moderator:
N.
Dutt IUniversity of California, [nine)
Panelists: J. Sztipanovits (ACMSIGBED
&
Vanderbilt University), M. Hirata (STARC),
S. Basu
(XSFi. D. J. Radack iDARPA)
Session
ЗА:
System Modeling
Chairs: L. Lavagno
(Politecnico di
Torino).
R. Marculescu
(Carnegie Mellon University)
•
Design Optimization of Mixed Time/Event-Triggered Distributed Embedded Systems
....................83
T. Pop. P.
Eles.
Z.
Peng
(Linköping
University)
•
Deriving Process Networks from Weakly Dynamic Applications in System-Level Design
.............90
T. Štefanov. E. Deprertere
(Leiden University)
Session
ЗВ:
Case Studies
Chairs: P.
Paulin
(STMicroelectronks), M. Sarrafzadeh (University of California. Los Angeles)
•
A Low-Cost and Low-Power Multi-Standard Video Encoder
.....................................................................97
R. P. Llopis, R. Sethuraman,
С
A. Pinto, H. Peters, S. Maul, M. Oosterhuis (Philips Research Laboratories)
•
A Case Study of Mapping a Software-Defined Radio (SDR) Application
on
a Reconfigurable DSP
Core
.........................................................................................................................103
B. Mohebbi,
E. C
Filho.
R.
Maestre,
M. Davies (Morpho Technologies
Inc.).
F.
J.
Kurdahi
(University of California, Irvine)
•
A Codesigned On-Chip Logic Minimizer
........................................................................................................109
R. Lysecky, F. Vahid (University of California. Riverside)
Session 4A: Advances in Embedded Software Scheduling Techniques
Chairs: R. Ernst (Technical
Universit}
of Braunschweig), B. Walker (Kent State
Universit}-)
•
Synthesis of Real-Time Embedded Software with Local and Global Deadlines
...............................114
P.-A. Hsiung, C.-Y. Lin (National Chung Cheng University)
•
Pareto-Optimization-Based Run-Time Task Scheduling for Embedded Systems
............................120
P. Yang, F. Catthoor (K. U. Leuven-ESA T)
•
A Low Power Scheduler Using Game Theory
..............................................................................................126
N.
Ranganathan, A. K. Murugavel
(Universit}-
of South Florida)
Session 4B: Architectural Design for Embedded Systems
Chairs: A. Parker (University of Souther California). F. Karim (STMicroelectronics)
•
VL-CDRAM: Variable Line Sized Cached
DRAMs.......................................................................................132
A. Hegde,
N.
Vijaykrishnan,
M. Kandemir. M. J.
Irwin
(The Pennsylvania State
Universit})
•
A Low-cost Memory Architecture with
NAND XIP
for Mobile Embedded Systems
..........................138
C. Park, J.
Seo,
S.
Вае,
H.
Kim,
S.
Kim.
В.
Kim (Samsung Electronics)
•
Design Space Minimization with Timing and Code Size Optimization for Embedded DSP
...........144
Q. Zhuge, Z. Shao, B. Xiao, E. H.-M.
Sha
(Universit}-
of Texas at Dallas)
Session 5A: Work-in-Progress Session on Innovative Topics
Chairs: F. Kurdahi
(Universit}
of California, Irvine). A. Wu (National
Tsínghua Universit}-.
Taiwan)
•
SEAS: A System for Early Analysis of SoCs
................................................................................................150
R. A. Bergamaschi, Y. Shin tIBMT. J. Watson Research Center),
N.
Dhanwada (IBM EDA Laborutoiyi.
S. Bhattacharya (IBMT. J. Watson Research Center), W. E. Dougherty (IBMEDA Laboratory).
I. Nair, J.
Darringer
(IBM T. J. Watson Research Center). S. Paliwal (IBMEDA Laboratory)
•
Programmers Views of SoCs
...........................................................................................................................156
J. M. Paul (Carnegie Mellon
Universit} )
•
Security Wrappers and Power Analysis for SoC Technologies
.............................................................162
С
H. Gebotys. Y.
Zhang
(Universit}1
of
Waterloo)
•
First Results with eBlocks: Embedded Systems Building Blocks
........................................................168
S. Cotterell, F. Vahid, W. Najjar, H. Hsieh
(Universit}-
of California. Riverside)
Session 5B: Verification, Analysis of Embedded Systems
Chairs: W.
Rosenstiel
(Technical
Universit}-
of Tuebingen
).
Η.
Hsieh /University of California. Rnersidci
•
Verification of Design Decisions in ForSyDe
...............................................................................................1 6
T. Raudvere. I. Sander. A. K. Singh. A. Jantseh
/Rovai
Institute of
Technolog}-.
Sweden/
•
A Multiobjective Optimization Model for Exploring Multiprocessor Mappings
of Process Networks
............................................................................................................................................182
С
Erbas (University of Amsterdam), S. C. Erbas (Aachen University of Technology),
A. D. Pimentel (University of Amsterdam)
•
A Fault Model Notation and Error-Control Scheme for Switch-to-Switch Buses
in a Network-on-Chip
...........................................................................................................................................188
H.
Zimmer
(Darmstadt University of
Technolog)-)
,
A. Jantsch (Royal Institute of Technology, Sweden)
Invited Talk
Chair: D. Thomas (Carnegie Mellon University)
•
Design Technology Challenges for System and Chip Level
Designs in Very Deep
Submicron
Technologies
.........................................................................................194
J. Lin CSational Semiconductor)
Session 6A: Performance Estimation in System Design
Chairs: M. Aboulhamid (University of Montreal), R. Rajkumar (Carnegie Mellon University)
•
Schedule-Aware Performance Estimation of Communication Architecture
for Efficient Design Space Exploration
..........................................................................................................195
S. Kim.
C. Im, S.
Ha (Seoul National University)
•
Accurate Estimation of Cache-Related Preemption Delay
.......................................................................201
H. S.
Negi,
T.
Mitra. A. Roychoudhury
(National University of Singapore)
•
Early Estimation of the Size of VHDL Projects
.............................................................................................207
V.
Fornaciai!.
F.
Salice.
D. P. Scarpazza
(Politecnico di Milano)
Session
6В:
Compiler Optimizations for Power, Performance
Chairs: M. Miranda (IMEC), M. Jacome (University of Texas at Austin)
•
Tracking Object Life Cycle for Leakage Energy Optimization
................................................................213
Ci.
Chen.
N.
Vijayknshnan. M. Kandemir. M. J.
Irwin
(The Pennsylvania State University),
M. Wolc/ko /Sim Microsystems
)
•
Compiler Parallelization of
С
Programs for Multi-Core DSPs with Multiple Address Spaces
.......219
B. Franks. M.
r
P. (T Boyle (University of Edinburgh)
•
Architectural Analysis and Instruction-Set Optimization for Design
of Network Protocol Processors
......................................................................................................................225
!
I. ie.
!..
/hao. L.
Bhuşan
/University ot California. Riverside/
Panel
3
1
>!_:a;! ,v!v
R
Bergamaschi
IBM
T
.1.
liaison
Research Center).
G.
Martin /Cadence Berkeley Labs)
•
The Future of System-Level Design: Can We Find the Right Solutions
to the Right Problems at the Right Time?
.....................................................................................................231
Moderator: G. Martin /Cadence Laboratories)
P.mchsiv
W
.
Wolt
/Princeton
ί
iiiversityi.
R.
Ernst (Technical University of Braunschweig).
K.
Vissers
University
ut
California, Berkeley). J. Kouloheris (IBMResearch)
2004
Call for Papers
.............................................................................................................................................232
Author Index
..............................................................................................................................................................233
|
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| spelling | International Conference on Hardware Software Codesign & System Synthesis 1 2003 Newport Beach, Calif. Verfasser (DE-588)10073274-4 aut First IEEE/ACM/IFIP International Conference on Hardware/Software Codesign & System Synthesis Newport Beach, California, USA, October 1-3, 2003 Hardware/software codesign & system synthesis Hardware/software codesign and system synthesis CODES+ISSS 2003 CODES+ISSS '03 New York, N.Y. Association for Computing Machinery 2003 XIV, 234 S. graph. Darst. txt rdacontent n rdamedia nc rdacarrier System design Congresses Systems software Congresses Embedded computer systems Congresses Eingebettetes System (DE-588)4396978-1 gnd rswk-swf Systementwurf (DE-588)4261480-6 gnd rswk-swf (DE-588)1071861417 Konferenzschrift 2003 newport Beach Calif. gnd-content Systementwurf (DE-588)4261480-6 s Eingebettetes System (DE-588)4396978-1 s DE-604 Digitalisierung TU Muenchen application/pdf http://bvbr.bib-bvb.de:8991/F?func=service&doc_library=BVB01&local_base=BVB01&doc_number=013525925&sequence=000002&line_number=0001&func_code=DB_RECORDS&service_type=MEDIA Inhaltsverzeichnis |
| spellingShingle | First IEEE/ACM/IFIP International Conference on Hardware/Software Codesign & System Synthesis Newport Beach, California, USA, October 1-3, 2003 System design Congresses Systems software Congresses Embedded computer systems Congresses Eingebettetes System (DE-588)4396978-1 gnd Systementwurf (DE-588)4261480-6 gnd |
| subject_GND | (DE-588)4396978-1 (DE-588)4261480-6 (DE-588)1071861417 |
| title | First IEEE/ACM/IFIP International Conference on Hardware/Software Codesign & System Synthesis Newport Beach, California, USA, October 1-3, 2003 |
| title_alt | Hardware/software codesign & system synthesis Hardware/software codesign and system synthesis CODES+ISSS 2003 CODES+ISSS '03 |
| title_auth | First IEEE/ACM/IFIP International Conference on Hardware/Software Codesign & System Synthesis Newport Beach, California, USA, October 1-3, 2003 |
| title_exact_search | First IEEE/ACM/IFIP International Conference on Hardware/Software Codesign & System Synthesis Newport Beach, California, USA, October 1-3, 2003 |
| title_full | First IEEE/ACM/IFIP International Conference on Hardware/Software Codesign & System Synthesis Newport Beach, California, USA, October 1-3, 2003 |
| title_fullStr | First IEEE/ACM/IFIP International Conference on Hardware/Software Codesign & System Synthesis Newport Beach, California, USA, October 1-3, 2003 |
| title_full_unstemmed | First IEEE/ACM/IFIP International Conference on Hardware/Software Codesign & System Synthesis Newport Beach, California, USA, October 1-3, 2003 |
| title_short | First IEEE/ACM/IFIP International Conference on Hardware/Software Codesign & System Synthesis |
| title_sort | first ieee acm ifip international conference on hardware software codesign system synthesis newport beach california usa october 1 3 2003 |
| title_sub | Newport Beach, California, USA, October 1-3, 2003 |
| topic | System design Congresses Systems software Congresses Embedded computer systems Congresses Eingebettetes System (DE-588)4396978-1 gnd Systementwurf (DE-588)4261480-6 gnd |
| topic_facet | System design Congresses Systems software Congresses Embedded computer systems Congresses Eingebettetes System Systementwurf Konferenzschrift 2003 newport Beach Calif. |
| url | http://bvbr.bib-bvb.de:8991/F?func=service&doc_library=BVB01&local_base=BVB01&doc_number=013525925&sequence=000002&line_number=0001&func_code=DB_RECORDS&service_type=MEDIA |
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