Designing digital computer systems with Verilog:
Gespeichert in:
| Hauptverfasser: | , |
|---|---|
| Format: | Buch |
| Sprache: | English |
| Veröffentlicht: |
New York
Cambridge University Press
2005
|
| Ausgabe: | 1. publ. |
| Schlagworte: | |
| Beschreibung: | IX, 160 S. graph. Darst. |
| ISBN: | 052182866X |
Internformat
MARC
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|---|---|---|---|
| 001 | BV019760732 | ||
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| 008 | 050406s2005 xxud||| |||| 00||| eng d | ||
| 010 | |a 2004054515 | ||
| 020 | |a 052182866X |c alk. paper |9 0-521-82866-X | ||
| 035 | |a (OCoLC)55878009 | ||
| 035 | |a (DE-599)BVBBV019760732 | ||
| 040 | |a DE-604 |b ger |e aacr | ||
| 041 | 0 | |a eng | |
| 044 | |a xxu |c US | ||
| 049 | |a DE-703 | ||
| 050 | 0 | |a TK7885.7 | |
| 082 | 0 | |a 621.39/2 |2 22 | |
| 084 | |a ST 150 |0 (DE-625)143594: |2 rvk | ||
| 100 | 1 | |a Lilja, David J. |e Verfasser |4 aut | |
| 245 | 1 | 0 | |a Designing digital computer systems with Verilog |c David J. Lilja and Sachin S. Sapatnekar |
| 250 | |a 1. publ. | ||
| 264 | 1 | |a New York |b Cambridge University Press |c 2005 | |
| 300 | |a IX, 160 S. |b graph. Darst. | ||
| 336 | |b txt |2 rdacontent | ||
| 337 | |b n |2 rdamedia | ||
| 338 | |b nc |2 rdacarrier | ||
| 650 | 4 | |a Verilog (Computer hardware description language) | |
| 650 | 4 | |a Electronic digital computers |x Design and construction | |
| 650 | 0 | 7 | |a VERILOG |0 (DE-588)4268385-3 |2 gnd |9 rswk-swf |
| 689 | 0 | 0 | |a VERILOG |0 (DE-588)4268385-3 |D s |
| 689 | 0 | |5 DE-604 | |
| 700 | 1 | |a Sapatnekar, Sachin S. |e Verfasser |4 aut | |
| 999 | |a oai:aleph.bib-bvb.de:BVB01-013087094 | ||
Datensatz im Suchindex
| _version_ | 1804133236776894464 |
|---|---|
| any_adam_object | |
| author | Lilja, David J. Sapatnekar, Sachin S. |
| author_facet | Lilja, David J. Sapatnekar, Sachin S. |
| author_role | aut aut |
| author_sort | Lilja, David J. |
| author_variant | d j l dj djl s s s ss sss |
| building | Verbundindex |
| bvnumber | BV019760732 |
| callnumber-first | T - Technology |
| callnumber-label | TK7885 |
| callnumber-raw | TK7885.7 |
| callnumber-search | TK7885.7 |
| callnumber-sort | TK 47885.7 |
| callnumber-subject | TK - Electrical and Nuclear Engineering |
| classification_rvk | ST 150 |
| ctrlnum | (OCoLC)55878009 (DE-599)BVBBV019760732 |
| dewey-full | 621.39/2 |
| dewey-hundreds | 600 - Technology (Applied sciences) |
| dewey-ones | 621 - Applied physics |
| dewey-raw | 621.39/2 |
| dewey-search | 621.39/2 |
| dewey-sort | 3621.39 12 |
| dewey-tens | 620 - Engineering and allied operations |
| discipline | Informatik Elektrotechnik / Elektronik / Nachrichtentechnik |
| edition | 1. publ. |
| format | Book |
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| id | DE-604.BV019760732 |
| illustrated | Illustrated |
| indexdate | 2024-07-09T20:05:31Z |
| institution | BVB |
| isbn | 052182866X |
| language | English |
| lccn | 2004054515 |
| oai_aleph_id | oai:aleph.bib-bvb.de:BVB01-013087094 |
| oclc_num | 55878009 |
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| owner | DE-703 |
| owner_facet | DE-703 |
| physical | IX, 160 S. graph. Darst. |
| publishDate | 2005 |
| publishDateSearch | 2005 |
| publishDateSort | 2005 |
| publisher | Cambridge University Press |
| record_format | marc |
| spelling | Lilja, David J. Verfasser aut Designing digital computer systems with Verilog David J. Lilja and Sachin S. Sapatnekar 1. publ. New York Cambridge University Press 2005 IX, 160 S. graph. Darst. txt rdacontent n rdamedia nc rdacarrier Verilog (Computer hardware description language) Electronic digital computers Design and construction VERILOG (DE-588)4268385-3 gnd rswk-swf VERILOG (DE-588)4268385-3 s DE-604 Sapatnekar, Sachin S. Verfasser aut |
| spellingShingle | Lilja, David J. Sapatnekar, Sachin S. Designing digital computer systems with Verilog Verilog (Computer hardware description language) Electronic digital computers Design and construction VERILOG (DE-588)4268385-3 gnd |
| subject_GND | (DE-588)4268385-3 |
| title | Designing digital computer systems with Verilog |
| title_auth | Designing digital computer systems with Verilog |
| title_exact_search | Designing digital computer systems with Verilog |
| title_full | Designing digital computer systems with Verilog David J. Lilja and Sachin S. Sapatnekar |
| title_fullStr | Designing digital computer systems with Verilog David J. Lilja and Sachin S. Sapatnekar |
| title_full_unstemmed | Designing digital computer systems with Verilog David J. Lilja and Sachin S. Sapatnekar |
| title_short | Designing digital computer systems with Verilog |
| title_sort | designing digital computer systems with verilog |
| topic | Verilog (Computer hardware description language) Electronic digital computers Design and construction VERILOG (DE-588)4268385-3 gnd |
| topic_facet | Verilog (Computer hardware description language) Electronic digital computers Design and construction VERILOG |
| work_keys_str_mv | AT liljadavidj designingdigitalcomputersystemswithverilog AT sapatnekarsachins designingdigitalcomputersystemswithverilog |