Programmable logic fundamentals using Xilinx ISE and CPLDs:
Gespeichert in:
1. Verfasser: | |
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Format: | Buch |
Sprache: | English |
Veröffentlicht: |
Upper Saddle River, NJ [u.a.]
Pearson Prentice Hall
2005
|
Schlagworte: | |
Beschreibung: | XII, 203 S. Ill., graph. Darst. |
ISBN: | 0131186574 |
Internformat
MARC
LEADER | 00000nam a2200000 c 4500 | ||
---|---|---|---|
001 | BV019727318 | ||
003 | DE-604 | ||
005 | 20050412 | ||
007 | t | ||
008 | 050308s2005 ad|| |||| 00||| eng d | ||
020 | |a 0131186574 |9 0-13-118657-4 | ||
035 | |a (OCoLC)61689075 | ||
035 | |a (DE-599)BVBBV019727318 | ||
040 | |a DE-604 |b ger |e rakwb | ||
041 | 0 | |a eng | |
049 | |a DE-20 |a DE-91 | ||
050 | 0 | |a TK7868.L6 | |
082 | 0 | |a 621.39/5 |2 22 | |
084 | |a ZN 4940 |0 (DE-625)157423: |2 rvk | ||
100 | 1 | |a Dailey, Denton J. |e Verfasser |4 aut | |
245 | 1 | 0 | |a Programmable logic fundamentals using Xilinx ISE and CPLDs |c Denton J. Dailex |
264 | 1 | |a Upper Saddle River, NJ [u.a.] |b Pearson Prentice Hall |c 2005 | |
300 | |a XII, 203 S. |b Ill., graph. Darst. | ||
336 | |b txt |2 rdacontent | ||
337 | |b n |2 rdamedia | ||
338 | |b nc |2 rdacarrier | ||
650 | 4 | |a Computer-aided design | |
650 | 4 | |a Digital electronics | |
650 | 4 | |a Logic circuits |x Computer-aided design | |
650 | 4 | |a Logic circuits |x Design and construction | |
650 | 4 | |a Logic design |x Computer programs | |
650 | 4 | |a Programmable logic devices | |
650 | 0 | 7 | |a Entwurf |0 (DE-588)4121208-3 |2 gnd |9 rswk-swf |
650 | 0 | 7 | |a Digitale integrierte Schaltung |0 (DE-588)4113313-4 |2 gnd |9 rswk-swf |
650 | 0 | 7 | |a Schaltungsentwurf |0 (DE-588)4179389-4 |2 gnd |9 rswk-swf |
650 | 0 | 7 | |a Programmierbare logische Anordnung |0 (DE-588)4076369-9 |2 gnd |9 rswk-swf |
689 | 0 | 0 | |a Programmierbare logische Anordnung |0 (DE-588)4076369-9 |D s |
689 | 0 | 1 | |a Schaltungsentwurf |0 (DE-588)4179389-4 |D s |
689 | 0 | |5 DE-604 | |
689 | 1 | 0 | |a Digitale integrierte Schaltung |0 (DE-588)4113313-4 |D s |
689 | 1 | 1 | |a Entwurf |0 (DE-588)4121208-3 |D s |
689 | 1 | |5 DE-604 | |
999 | |a oai:aleph.bib-bvb.de:BVB01-013054308 |
Datensatz im Suchindex
_version_ | 1804133187682566144 |
---|---|
any_adam_object | |
author | Dailey, Denton J. |
author_facet | Dailey, Denton J. |
author_role | aut |
author_sort | Dailey, Denton J. |
author_variant | d j d dj djd |
building | Verbundindex |
bvnumber | BV019727318 |
callnumber-first | T - Technology |
callnumber-label | TK7868 |
callnumber-raw | TK7868.L6 |
callnumber-search | TK7868.L6 |
callnumber-sort | TK 47868 L6 |
callnumber-subject | TK - Electrical and Nuclear Engineering |
classification_rvk | ZN 4940 |
ctrlnum | (OCoLC)61689075 (DE-599)BVBBV019727318 |
dewey-full | 621.39/5 |
dewey-hundreds | 600 - Technology (Applied sciences) |
dewey-ones | 621 - Applied physics |
dewey-raw | 621.39/5 |
dewey-search | 621.39/5 |
dewey-sort | 3621.39 15 |
dewey-tens | 620 - Engineering and allied operations |
discipline | Elektrotechnik / Elektronik / Nachrichtentechnik |
format | Book |
fullrecord | <?xml version="1.0" encoding="UTF-8"?><collection xmlns="http://www.loc.gov/MARC21/slim"><record><leader>01731nam a2200481 c 4500</leader><controlfield tag="001">BV019727318</controlfield><controlfield tag="003">DE-604</controlfield><controlfield tag="005">20050412 </controlfield><controlfield tag="007">t</controlfield><controlfield tag="008">050308s2005 ad|| |||| 00||| eng d</controlfield><datafield tag="020" ind1=" " ind2=" "><subfield code="a">0131186574</subfield><subfield code="9">0-13-118657-4</subfield></datafield><datafield tag="035" ind1=" " ind2=" "><subfield code="a">(OCoLC)61689075</subfield></datafield><datafield tag="035" ind1=" " ind2=" "><subfield code="a">(DE-599)BVBBV019727318</subfield></datafield><datafield tag="040" ind1=" " ind2=" "><subfield code="a">DE-604</subfield><subfield code="b">ger</subfield><subfield code="e">rakwb</subfield></datafield><datafield tag="041" ind1="0" ind2=" "><subfield code="a">eng</subfield></datafield><datafield tag="049" ind1=" " ind2=" "><subfield code="a">DE-20</subfield><subfield code="a">DE-91</subfield></datafield><datafield tag="050" ind1=" " ind2="0"><subfield code="a">TK7868.L6</subfield></datafield><datafield tag="082" ind1="0" ind2=" "><subfield code="a">621.39/5</subfield><subfield code="2">22</subfield></datafield><datafield tag="084" ind1=" " ind2=" "><subfield code="a">ZN 4940</subfield><subfield code="0">(DE-625)157423:</subfield><subfield code="2">rvk</subfield></datafield><datafield tag="100" ind1="1" ind2=" "><subfield code="a">Dailey, Denton J.</subfield><subfield code="e">Verfasser</subfield><subfield code="4">aut</subfield></datafield><datafield tag="245" ind1="1" ind2="0"><subfield code="a">Programmable logic fundamentals using Xilinx ISE and CPLDs</subfield><subfield code="c">Denton J. Dailex</subfield></datafield><datafield tag="264" ind1=" " ind2="1"><subfield code="a">Upper Saddle River, NJ [u.a.]</subfield><subfield code="b">Pearson Prentice Hall</subfield><subfield code="c">2005</subfield></datafield><datafield tag="300" ind1=" " ind2=" "><subfield code="a">XII, 203 S.</subfield><subfield code="b">Ill., graph. Darst.</subfield></datafield><datafield tag="336" ind1=" " ind2=" "><subfield code="b">txt</subfield><subfield code="2">rdacontent</subfield></datafield><datafield tag="337" ind1=" " ind2=" "><subfield code="b">n</subfield><subfield code="2">rdamedia</subfield></datafield><datafield tag="338" ind1=" " ind2=" "><subfield code="b">nc</subfield><subfield code="2">rdacarrier</subfield></datafield><datafield tag="650" ind1=" " ind2="4"><subfield code="a">Computer-aided design</subfield></datafield><datafield tag="650" ind1=" " ind2="4"><subfield code="a">Digital electronics</subfield></datafield><datafield tag="650" ind1=" " ind2="4"><subfield code="a">Logic circuits</subfield><subfield code="x">Computer-aided design</subfield></datafield><datafield tag="650" ind1=" " ind2="4"><subfield code="a">Logic circuits</subfield><subfield code="x">Design and construction</subfield></datafield><datafield tag="650" ind1=" " ind2="4"><subfield code="a">Logic design</subfield><subfield code="x">Computer programs</subfield></datafield><datafield tag="650" ind1=" " ind2="4"><subfield code="a">Programmable logic devices</subfield></datafield><datafield tag="650" ind1="0" ind2="7"><subfield code="a">Entwurf</subfield><subfield code="0">(DE-588)4121208-3</subfield><subfield code="2">gnd</subfield><subfield code="9">rswk-swf</subfield></datafield><datafield tag="650" ind1="0" ind2="7"><subfield code="a">Digitale integrierte Schaltung</subfield><subfield code="0">(DE-588)4113313-4</subfield><subfield code="2">gnd</subfield><subfield code="9">rswk-swf</subfield></datafield><datafield tag="650" ind1="0" ind2="7"><subfield code="a">Schaltungsentwurf</subfield><subfield code="0">(DE-588)4179389-4</subfield><subfield code="2">gnd</subfield><subfield code="9">rswk-swf</subfield></datafield><datafield tag="650" ind1="0" ind2="7"><subfield code="a">Programmierbare logische Anordnung</subfield><subfield code="0">(DE-588)4076369-9</subfield><subfield code="2">gnd</subfield><subfield code="9">rswk-swf</subfield></datafield><datafield tag="689" ind1="0" ind2="0"><subfield code="a">Programmierbare logische Anordnung</subfield><subfield code="0">(DE-588)4076369-9</subfield><subfield code="D">s</subfield></datafield><datafield tag="689" ind1="0" ind2="1"><subfield code="a">Schaltungsentwurf</subfield><subfield code="0">(DE-588)4179389-4</subfield><subfield code="D">s</subfield></datafield><datafield tag="689" ind1="0" ind2=" "><subfield code="5">DE-604</subfield></datafield><datafield tag="689" ind1="1" ind2="0"><subfield code="a">Digitale integrierte Schaltung</subfield><subfield code="0">(DE-588)4113313-4</subfield><subfield code="D">s</subfield></datafield><datafield tag="689" ind1="1" ind2="1"><subfield code="a">Entwurf</subfield><subfield code="0">(DE-588)4121208-3</subfield><subfield code="D">s</subfield></datafield><datafield tag="689" ind1="1" ind2=" "><subfield code="5">DE-604</subfield></datafield><datafield tag="999" ind1=" " ind2=" "><subfield code="a">oai:aleph.bib-bvb.de:BVB01-013054308</subfield></datafield></record></collection> |
id | DE-604.BV019727318 |
illustrated | Illustrated |
indexdate | 2024-07-09T20:04:44Z |
institution | BVB |
isbn | 0131186574 |
language | English |
oai_aleph_id | oai:aleph.bib-bvb.de:BVB01-013054308 |
oclc_num | 61689075 |
open_access_boolean | |
owner | DE-20 DE-91 DE-BY-TUM |
owner_facet | DE-20 DE-91 DE-BY-TUM |
physical | XII, 203 S. Ill., graph. Darst. |
publishDate | 2005 |
publishDateSearch | 2005 |
publishDateSort | 2005 |
publisher | Pearson Prentice Hall |
record_format | marc |
spelling | Dailey, Denton J. Verfasser aut Programmable logic fundamentals using Xilinx ISE and CPLDs Denton J. Dailex Upper Saddle River, NJ [u.a.] Pearson Prentice Hall 2005 XII, 203 S. Ill., graph. Darst. txt rdacontent n rdamedia nc rdacarrier Computer-aided design Digital electronics Logic circuits Computer-aided design Logic circuits Design and construction Logic design Computer programs Programmable logic devices Entwurf (DE-588)4121208-3 gnd rswk-swf Digitale integrierte Schaltung (DE-588)4113313-4 gnd rswk-swf Schaltungsentwurf (DE-588)4179389-4 gnd rswk-swf Programmierbare logische Anordnung (DE-588)4076369-9 gnd rswk-swf Programmierbare logische Anordnung (DE-588)4076369-9 s Schaltungsentwurf (DE-588)4179389-4 s DE-604 Digitale integrierte Schaltung (DE-588)4113313-4 s Entwurf (DE-588)4121208-3 s |
spellingShingle | Dailey, Denton J. Programmable logic fundamentals using Xilinx ISE and CPLDs Computer-aided design Digital electronics Logic circuits Computer-aided design Logic circuits Design and construction Logic design Computer programs Programmable logic devices Entwurf (DE-588)4121208-3 gnd Digitale integrierte Schaltung (DE-588)4113313-4 gnd Schaltungsentwurf (DE-588)4179389-4 gnd Programmierbare logische Anordnung (DE-588)4076369-9 gnd |
subject_GND | (DE-588)4121208-3 (DE-588)4113313-4 (DE-588)4179389-4 (DE-588)4076369-9 |
title | Programmable logic fundamentals using Xilinx ISE and CPLDs |
title_auth | Programmable logic fundamentals using Xilinx ISE and CPLDs |
title_exact_search | Programmable logic fundamentals using Xilinx ISE and CPLDs |
title_full | Programmable logic fundamentals using Xilinx ISE and CPLDs Denton J. Dailex |
title_fullStr | Programmable logic fundamentals using Xilinx ISE and CPLDs Denton J. Dailex |
title_full_unstemmed | Programmable logic fundamentals using Xilinx ISE and CPLDs Denton J. Dailex |
title_short | Programmable logic fundamentals using Xilinx ISE and CPLDs |
title_sort | programmable logic fundamentals using xilinx ise and cplds |
topic | Computer-aided design Digital electronics Logic circuits Computer-aided design Logic circuits Design and construction Logic design Computer programs Programmable logic devices Entwurf (DE-588)4121208-3 gnd Digitale integrierte Schaltung (DE-588)4113313-4 gnd Schaltungsentwurf (DE-588)4179389-4 gnd Programmierbare logische Anordnung (DE-588)4076369-9 gnd |
topic_facet | Computer-aided design Digital electronics Logic circuits Computer-aided design Logic circuits Design and construction Logic design Computer programs Programmable logic devices Entwurf Digitale integrierte Schaltung Schaltungsentwurf Programmierbare logische Anordnung |
work_keys_str_mv | AT daileydentonj programmablelogicfundamentalsusingxilinxiseandcplds |