Logic synthesis and verification algorithms:
Gespeichert in:
| Hauptverfasser: | , |
|---|---|
| Format: | Buch |
| Sprache: | English |
| Veröffentlicht: |
Boston [u.a.]
Kluwer
2003
|
| Ausgabe: | 7. print. |
| Schlagworte: | |
| Beschreibung: | XXXII, 564 S. graph. Darst. |
| ISBN: | 0792397460 |
Internformat
MARC
| LEADER | 00000nam a2200000 c 4500 | ||
|---|---|---|---|
| 001 | BV019652335 | ||
| 003 | DE-604 | ||
| 005 | 00000000000000.0 | ||
| 007 | t | ||
| 008 | 050110s2003 d||| |||| 00||| eng d | ||
| 020 | |a 0792397460 |9 0-7923-9746-0 | ||
| 035 | |a (OCoLC)255207803 | ||
| 035 | |a (DE-599)BVBBV019652335 | ||
| 040 | |a DE-604 |b ger |e rakwb | ||
| 041 | 0 | |a eng | |
| 049 | |a DE-91 | ||
| 082 | 0 | |a 621.39/5 | |
| 084 | |a ELT 273f |2 stub | ||
| 100 | 1 | |a Hachtel, Gary D. |e Verfasser |4 aut | |
| 245 | 1 | 0 | |a Logic synthesis and verification algorithms |c by Gary D. Hachtel ; Fabio Somenzi |
| 250 | |a 7. print. | ||
| 264 | 1 | |a Boston [u.a.] |b Kluwer |c 2003 | |
| 300 | |a XXXII, 564 S. |b graph. Darst. | ||
| 336 | |b txt |2 rdacontent | ||
| 337 | |b n |2 rdamedia | ||
| 338 | |b nc |2 rdacarrier | ||
| 650 | 0 | 7 | |a Logiksynthese |0 (DE-588)4348178-4 |2 gnd |9 rswk-swf |
| 650 | 0 | 7 | |a Logischer Entwurf |0 (DE-588)4168051-0 |2 gnd |9 rswk-swf |
| 689 | 0 | 0 | |a Logischer Entwurf |0 (DE-588)4168051-0 |D s |
| 689 | 0 | |5 DE-604 | |
| 689 | 1 | 0 | |a Logiksynthese |0 (DE-588)4348178-4 |D s |
| 689 | 1 | |5 DE-604 | |
| 700 | 1 | |a Somenzi, Fabio |e Verfasser |4 aut | |
| 999 | |a oai:aleph.bib-bvb.de:BVB01-012980946 | ||
Datensatz im Suchindex
| _version_ | 1804133028378705920 |
|---|---|
| any_adam_object | |
| author | Hachtel, Gary D. Somenzi, Fabio |
| author_facet | Hachtel, Gary D. Somenzi, Fabio |
| author_role | aut aut |
| author_sort | Hachtel, Gary D. |
| author_variant | g d h gd gdh f s fs |
| building | Verbundindex |
| bvnumber | BV019652335 |
| classification_tum | ELT 273f |
| ctrlnum | (OCoLC)255207803 (DE-599)BVBBV019652335 |
| dewey-full | 621.39/5 |
| dewey-hundreds | 600 - Technology (Applied sciences) |
| dewey-ones | 621 - Applied physics |
| dewey-raw | 621.39/5 |
| dewey-search | 621.39/5 |
| dewey-sort | 3621.39 15 |
| dewey-tens | 620 - Engineering and allied operations |
| discipline | Elektrotechnik Elektrotechnik / Elektronik / Nachrichtentechnik |
| edition | 7. print. |
| format | Book |
| fullrecord | <?xml version="1.0" encoding="UTF-8"?><collection xmlns="http://www.loc.gov/MARC21/slim"><record><leader>01149nam a2200373 c 4500</leader><controlfield tag="001">BV019652335</controlfield><controlfield tag="003">DE-604</controlfield><controlfield tag="005">00000000000000.0</controlfield><controlfield tag="007">t</controlfield><controlfield tag="008">050110s2003 d||| |||| 00||| eng d</controlfield><datafield tag="020" ind1=" " ind2=" "><subfield code="a">0792397460</subfield><subfield code="9">0-7923-9746-0</subfield></datafield><datafield tag="035" ind1=" " ind2=" "><subfield code="a">(OCoLC)255207803</subfield></datafield><datafield tag="035" ind1=" " ind2=" "><subfield code="a">(DE-599)BVBBV019652335</subfield></datafield><datafield tag="040" ind1=" " ind2=" "><subfield code="a">DE-604</subfield><subfield code="b">ger</subfield><subfield code="e">rakwb</subfield></datafield><datafield tag="041" ind1="0" ind2=" "><subfield code="a">eng</subfield></datafield><datafield tag="049" ind1=" " ind2=" "><subfield code="a">DE-91</subfield></datafield><datafield tag="082" ind1="0" ind2=" "><subfield code="a">621.39/5</subfield></datafield><datafield tag="084" ind1=" " ind2=" "><subfield code="a">ELT 273f</subfield><subfield code="2">stub</subfield></datafield><datafield tag="100" ind1="1" ind2=" "><subfield code="a">Hachtel, Gary D.</subfield><subfield code="e">Verfasser</subfield><subfield code="4">aut</subfield></datafield><datafield tag="245" ind1="1" ind2="0"><subfield code="a">Logic synthesis and verification algorithms</subfield><subfield code="c">by Gary D. Hachtel ; Fabio Somenzi</subfield></datafield><datafield tag="250" ind1=" " ind2=" "><subfield code="a">7. print.</subfield></datafield><datafield tag="264" ind1=" " ind2="1"><subfield code="a">Boston [u.a.]</subfield><subfield code="b">Kluwer</subfield><subfield code="c">2003</subfield></datafield><datafield tag="300" ind1=" " ind2=" "><subfield code="a">XXXII, 564 S.</subfield><subfield code="b">graph. Darst.</subfield></datafield><datafield tag="336" ind1=" " ind2=" "><subfield code="b">txt</subfield><subfield code="2">rdacontent</subfield></datafield><datafield tag="337" ind1=" " ind2=" "><subfield code="b">n</subfield><subfield code="2">rdamedia</subfield></datafield><datafield tag="338" ind1=" " ind2=" "><subfield code="b">nc</subfield><subfield code="2">rdacarrier</subfield></datafield><datafield tag="650" ind1="0" ind2="7"><subfield code="a">Logiksynthese</subfield><subfield code="0">(DE-588)4348178-4</subfield><subfield code="2">gnd</subfield><subfield code="9">rswk-swf</subfield></datafield><datafield tag="650" ind1="0" ind2="7"><subfield code="a">Logischer Entwurf</subfield><subfield code="0">(DE-588)4168051-0</subfield><subfield code="2">gnd</subfield><subfield code="9">rswk-swf</subfield></datafield><datafield tag="689" ind1="0" ind2="0"><subfield code="a">Logischer Entwurf</subfield><subfield code="0">(DE-588)4168051-0</subfield><subfield code="D">s</subfield></datafield><datafield tag="689" ind1="0" ind2=" "><subfield code="5">DE-604</subfield></datafield><datafield tag="689" ind1="1" ind2="0"><subfield code="a">Logiksynthese</subfield><subfield code="0">(DE-588)4348178-4</subfield><subfield code="D">s</subfield></datafield><datafield tag="689" ind1="1" ind2=" "><subfield code="5">DE-604</subfield></datafield><datafield tag="700" ind1="1" ind2=" "><subfield code="a">Somenzi, Fabio</subfield><subfield code="e">Verfasser</subfield><subfield code="4">aut</subfield></datafield><datafield tag="999" ind1=" " ind2=" "><subfield code="a">oai:aleph.bib-bvb.de:BVB01-012980946</subfield></datafield></record></collection> |
| id | DE-604.BV019652335 |
| illustrated | Illustrated |
| indexdate | 2024-07-09T20:02:12Z |
| institution | BVB |
| isbn | 0792397460 |
| language | English |
| oai_aleph_id | oai:aleph.bib-bvb.de:BVB01-012980946 |
| oclc_num | 255207803 |
| open_access_boolean | |
| owner | DE-91 DE-BY-TUM |
| owner_facet | DE-91 DE-BY-TUM |
| physical | XXXII, 564 S. graph. Darst. |
| publishDate | 2003 |
| publishDateSearch | 2003 |
| publishDateSort | 2003 |
| publisher | Kluwer |
| record_format | marc |
| spelling | Hachtel, Gary D. Verfasser aut Logic synthesis and verification algorithms by Gary D. Hachtel ; Fabio Somenzi 7. print. Boston [u.a.] Kluwer 2003 XXXII, 564 S. graph. Darst. txt rdacontent n rdamedia nc rdacarrier Logiksynthese (DE-588)4348178-4 gnd rswk-swf Logischer Entwurf (DE-588)4168051-0 gnd rswk-swf Logischer Entwurf (DE-588)4168051-0 s DE-604 Logiksynthese (DE-588)4348178-4 s Somenzi, Fabio Verfasser aut |
| spellingShingle | Hachtel, Gary D. Somenzi, Fabio Logic synthesis and verification algorithms Logiksynthese (DE-588)4348178-4 gnd Logischer Entwurf (DE-588)4168051-0 gnd |
| subject_GND | (DE-588)4348178-4 (DE-588)4168051-0 |
| title | Logic synthesis and verification algorithms |
| title_auth | Logic synthesis and verification algorithms |
| title_exact_search | Logic synthesis and verification algorithms |
| title_full | Logic synthesis and verification algorithms by Gary D. Hachtel ; Fabio Somenzi |
| title_fullStr | Logic synthesis and verification algorithms by Gary D. Hachtel ; Fabio Somenzi |
| title_full_unstemmed | Logic synthesis and verification algorithms by Gary D. Hachtel ; Fabio Somenzi |
| title_short | Logic synthesis and verification algorithms |
| title_sort | logic synthesis and verification algorithms |
| topic | Logiksynthese (DE-588)4348178-4 gnd Logischer Entwurf (DE-588)4168051-0 gnd |
| topic_facet | Logiksynthese Logischer Entwurf |
| work_keys_str_mv | AT hachtelgaryd logicsynthesisandverificationalgorithms AT somenzifabio logicsynthesisandverificationalgorithms |