CMOS logic circuit design:
Gespeichert in:
1. Verfasser: | |
---|---|
Format: | Buch |
Sprache: | English |
Veröffentlicht: |
Boston [u.a.]
Kluwer
2003
|
Ausgabe: | 4. printing |
Schlagworte: | |
Beschreibung: | XVIII, 528 S. graph. Darst. |
ISBN: | 0792384520 |
Internformat
MARC
LEADER | 00000nam a2200000 c 4500 | ||
---|---|---|---|
001 | BV017164571 | ||
003 | DE-604 | ||
005 | 20060206 | ||
007 | t | ||
008 | 030526s2003 d||| |||| 00||| eng d | ||
020 | |a 0792384520 |9 0-7923-8452-0 | ||
035 | |a (OCoLC)249382312 | ||
035 | |a (DE-599)BVBBV017164571 | ||
040 | |a DE-604 |b ger |e rakwb | ||
041 | 0 | |a eng | |
049 | |a DE-29T |a DE-91 | ||
050 | 0 | |a TK7871.99.M44 | |
082 | 0 | |a 621.39/732 | |
084 | |a ZN 4960 |0 (DE-625)157426: |2 rvk | ||
084 | |a ELT 358f |2 stub | ||
084 | |a ELT 272f |2 stub | ||
084 | |a ELT 456f |2 stub | ||
100 | 1 | |a Uyemura, John P. |e Verfasser |4 aut | |
245 | 1 | 0 | |a CMOS logic circuit design |c John P. Uyemura |
250 | |a 4. printing | ||
264 | 1 | |a Boston [u.a.] |b Kluwer |c 2003 | |
300 | |a XVIII, 528 S. |b graph. Darst. | ||
336 | |b txt |2 rdacontent | ||
337 | |b n |2 rdamedia | ||
338 | |b nc |2 rdacarrier | ||
650 | 0 | 7 | |a CMOS |0 (DE-588)4010319-5 |2 gnd |9 rswk-swf |
650 | 0 | 7 | |a Logische Schaltung |0 (DE-588)4131023-8 |2 gnd |9 rswk-swf |
650 | 0 | 7 | |a CMOS-Schaltung |0 (DE-588)4148111-2 |2 gnd |9 rswk-swf |
650 | 0 | 7 | |a Entwurf |0 (DE-588)4121208-3 |2 gnd |9 rswk-swf |
650 | 0 | 7 | |a Schaltungsentwurf |0 (DE-588)4179389-4 |2 gnd |9 rswk-swf |
650 | 0 | 7 | |a VLSI |0 (DE-588)4117388-0 |2 gnd |9 rswk-swf |
650 | 0 | 7 | |a Digitale integrierte Schaltung |0 (DE-588)4113313-4 |2 gnd |9 rswk-swf |
689 | 0 | 0 | |a CMOS-Schaltung |0 (DE-588)4148111-2 |D s |
689 | 0 | 1 | |a VLSI |0 (DE-588)4117388-0 |D s |
689 | 0 | 2 | |a Schaltungsentwurf |0 (DE-588)4179389-4 |D s |
689 | 0 | |5 DE-604 | |
689 | 1 | 0 | |a Logische Schaltung |0 (DE-588)4131023-8 |D s |
689 | 1 | 1 | |a Entwurf |0 (DE-588)4121208-3 |D s |
689 | 1 | 2 | |a CMOS |0 (DE-588)4010319-5 |D s |
689 | 1 | |8 1\p |5 DE-604 | |
689 | 2 | 0 | |a CMOS |0 (DE-588)4010319-5 |D s |
689 | 2 | 1 | |a Digitale integrierte Schaltung |0 (DE-588)4113313-4 |D s |
689 | 2 | |8 2\p |5 DE-604 | |
999 | |a oai:aleph.bib-bvb.de:BVB01-010347879 | ||
883 | 1 | |8 1\p |a cgwrk |d 20201028 |q DE-101 |u https://d-nb.info/provenance/plan#cgwrk | |
883 | 1 | |8 2\p |a cgwrk |d 20201028 |q DE-101 |u https://d-nb.info/provenance/plan#cgwrk |
Datensatz im Suchindex
_version_ | 1804130028499238912 |
---|---|
any_adam_object | |
author | Uyemura, John P. |
author_facet | Uyemura, John P. |
author_role | aut |
author_sort | Uyemura, John P. |
author_variant | j p u jp jpu |
building | Verbundindex |
bvnumber | BV017164571 |
callnumber-first | T - Technology |
callnumber-label | TK7871 |
callnumber-raw | TK7871.99.M44 |
callnumber-search | TK7871.99.M44 |
callnumber-sort | TK 47871.99 M44 |
callnumber-subject | TK - Electrical and Nuclear Engineering |
classification_rvk | ZN 4960 |
classification_tum | ELT 358f ELT 272f ELT 456f |
ctrlnum | (OCoLC)249382312 (DE-599)BVBBV017164571 |
dewey-full | 621.39/732 |
dewey-hundreds | 600 - Technology (Applied sciences) |
dewey-ones | 621 - Applied physics |
dewey-raw | 621.39/732 |
dewey-search | 621.39/732 |
dewey-sort | 3621.39 3732 |
dewey-tens | 620 - Engineering and allied operations |
discipline | Elektrotechnik Elektrotechnik / Elektronik / Nachrichtentechnik |
edition | 4. printing |
format | Book |
fullrecord | <?xml version="1.0" encoding="UTF-8"?><collection xmlns="http://www.loc.gov/MARC21/slim"><record><leader>02041nam a2200577 c 4500</leader><controlfield tag="001">BV017164571</controlfield><controlfield tag="003">DE-604</controlfield><controlfield tag="005">20060206 </controlfield><controlfield tag="007">t</controlfield><controlfield tag="008">030526s2003 d||| |||| 00||| eng d</controlfield><datafield tag="020" ind1=" " ind2=" "><subfield code="a">0792384520</subfield><subfield code="9">0-7923-8452-0</subfield></datafield><datafield tag="035" ind1=" " ind2=" "><subfield code="a">(OCoLC)249382312</subfield></datafield><datafield tag="035" ind1=" " ind2=" "><subfield code="a">(DE-599)BVBBV017164571</subfield></datafield><datafield tag="040" ind1=" " ind2=" "><subfield code="a">DE-604</subfield><subfield code="b">ger</subfield><subfield code="e">rakwb</subfield></datafield><datafield tag="041" ind1="0" ind2=" "><subfield code="a">eng</subfield></datafield><datafield tag="049" ind1=" " ind2=" "><subfield code="a">DE-29T</subfield><subfield code="a">DE-91</subfield></datafield><datafield tag="050" ind1=" " ind2="0"><subfield code="a">TK7871.99.M44</subfield></datafield><datafield tag="082" ind1="0" ind2=" "><subfield code="a">621.39/732</subfield></datafield><datafield tag="084" ind1=" " ind2=" "><subfield code="a">ZN 4960</subfield><subfield code="0">(DE-625)157426:</subfield><subfield code="2">rvk</subfield></datafield><datafield tag="084" ind1=" " ind2=" "><subfield code="a">ELT 358f</subfield><subfield code="2">stub</subfield></datafield><datafield tag="084" ind1=" " ind2=" "><subfield code="a">ELT 272f</subfield><subfield code="2">stub</subfield></datafield><datafield tag="084" ind1=" " ind2=" "><subfield code="a">ELT 456f</subfield><subfield code="2">stub</subfield></datafield><datafield tag="100" ind1="1" ind2=" "><subfield code="a">Uyemura, John P.</subfield><subfield code="e">Verfasser</subfield><subfield code="4">aut</subfield></datafield><datafield tag="245" ind1="1" ind2="0"><subfield code="a">CMOS logic circuit design</subfield><subfield code="c">John P. Uyemura</subfield></datafield><datafield tag="250" ind1=" " ind2=" "><subfield code="a">4. printing</subfield></datafield><datafield tag="264" ind1=" " ind2="1"><subfield code="a">Boston [u.a.]</subfield><subfield code="b">Kluwer</subfield><subfield code="c">2003</subfield></datafield><datafield tag="300" ind1=" " ind2=" "><subfield code="a">XVIII, 528 S.</subfield><subfield code="b">graph. Darst.</subfield></datafield><datafield tag="336" ind1=" " ind2=" "><subfield code="b">txt</subfield><subfield code="2">rdacontent</subfield></datafield><datafield tag="337" ind1=" " ind2=" "><subfield code="b">n</subfield><subfield code="2">rdamedia</subfield></datafield><datafield tag="338" ind1=" " ind2=" "><subfield code="b">nc</subfield><subfield code="2">rdacarrier</subfield></datafield><datafield tag="650" ind1="0" ind2="7"><subfield code="a">CMOS</subfield><subfield code="0">(DE-588)4010319-5</subfield><subfield code="2">gnd</subfield><subfield code="9">rswk-swf</subfield></datafield><datafield tag="650" ind1="0" ind2="7"><subfield code="a">Logische Schaltung</subfield><subfield code="0">(DE-588)4131023-8</subfield><subfield code="2">gnd</subfield><subfield code="9">rswk-swf</subfield></datafield><datafield tag="650" ind1="0" ind2="7"><subfield code="a">CMOS-Schaltung</subfield><subfield code="0">(DE-588)4148111-2</subfield><subfield code="2">gnd</subfield><subfield code="9">rswk-swf</subfield></datafield><datafield tag="650" ind1="0" ind2="7"><subfield code="a">Entwurf</subfield><subfield code="0">(DE-588)4121208-3</subfield><subfield code="2">gnd</subfield><subfield code="9">rswk-swf</subfield></datafield><datafield tag="650" ind1="0" ind2="7"><subfield code="a">Schaltungsentwurf</subfield><subfield code="0">(DE-588)4179389-4</subfield><subfield code="2">gnd</subfield><subfield code="9">rswk-swf</subfield></datafield><datafield tag="650" ind1="0" ind2="7"><subfield code="a">VLSI</subfield><subfield code="0">(DE-588)4117388-0</subfield><subfield code="2">gnd</subfield><subfield code="9">rswk-swf</subfield></datafield><datafield tag="650" ind1="0" ind2="7"><subfield code="a">Digitale integrierte Schaltung</subfield><subfield code="0">(DE-588)4113313-4</subfield><subfield code="2">gnd</subfield><subfield code="9">rswk-swf</subfield></datafield><datafield tag="689" ind1="0" ind2="0"><subfield code="a">CMOS-Schaltung</subfield><subfield code="0">(DE-588)4148111-2</subfield><subfield code="D">s</subfield></datafield><datafield tag="689" ind1="0" ind2="1"><subfield code="a">VLSI</subfield><subfield code="0">(DE-588)4117388-0</subfield><subfield code="D">s</subfield></datafield><datafield tag="689" ind1="0" ind2="2"><subfield code="a">Schaltungsentwurf</subfield><subfield code="0">(DE-588)4179389-4</subfield><subfield code="D">s</subfield></datafield><datafield tag="689" ind1="0" ind2=" "><subfield code="5">DE-604</subfield></datafield><datafield tag="689" ind1="1" ind2="0"><subfield code="a">Logische Schaltung</subfield><subfield code="0">(DE-588)4131023-8</subfield><subfield code="D">s</subfield></datafield><datafield tag="689" ind1="1" ind2="1"><subfield code="a">Entwurf</subfield><subfield code="0">(DE-588)4121208-3</subfield><subfield code="D">s</subfield></datafield><datafield tag="689" ind1="1" ind2="2"><subfield code="a">CMOS</subfield><subfield code="0">(DE-588)4010319-5</subfield><subfield code="D">s</subfield></datafield><datafield tag="689" ind1="1" ind2=" "><subfield code="8">1\p</subfield><subfield code="5">DE-604</subfield></datafield><datafield tag="689" ind1="2" ind2="0"><subfield code="a">CMOS</subfield><subfield code="0">(DE-588)4010319-5</subfield><subfield code="D">s</subfield></datafield><datafield tag="689" ind1="2" ind2="1"><subfield code="a">Digitale integrierte Schaltung</subfield><subfield code="0">(DE-588)4113313-4</subfield><subfield code="D">s</subfield></datafield><datafield tag="689" ind1="2" ind2=" "><subfield code="8">2\p</subfield><subfield code="5">DE-604</subfield></datafield><datafield tag="999" ind1=" " ind2=" "><subfield code="a">oai:aleph.bib-bvb.de:BVB01-010347879</subfield></datafield><datafield tag="883" ind1="1" ind2=" "><subfield code="8">1\p</subfield><subfield code="a">cgwrk</subfield><subfield code="d">20201028</subfield><subfield code="q">DE-101</subfield><subfield code="u">https://d-nb.info/provenance/plan#cgwrk</subfield></datafield><datafield tag="883" ind1="1" ind2=" "><subfield code="8">2\p</subfield><subfield code="a">cgwrk</subfield><subfield code="d">20201028</subfield><subfield code="q">DE-101</subfield><subfield code="u">https://d-nb.info/provenance/plan#cgwrk</subfield></datafield></record></collection> |
id | DE-604.BV017164571 |
illustrated | Illustrated |
indexdate | 2024-07-09T19:14:31Z |
institution | BVB |
isbn | 0792384520 |
language | English |
oai_aleph_id | oai:aleph.bib-bvb.de:BVB01-010347879 |
oclc_num | 249382312 |
open_access_boolean | |
owner | DE-29T DE-91 DE-BY-TUM |
owner_facet | DE-29T DE-91 DE-BY-TUM |
physical | XVIII, 528 S. graph. Darst. |
publishDate | 2003 |
publishDateSearch | 2003 |
publishDateSort | 2003 |
publisher | Kluwer |
record_format | marc |
spelling | Uyemura, John P. Verfasser aut CMOS logic circuit design John P. Uyemura 4. printing Boston [u.a.] Kluwer 2003 XVIII, 528 S. graph. Darst. txt rdacontent n rdamedia nc rdacarrier CMOS (DE-588)4010319-5 gnd rswk-swf Logische Schaltung (DE-588)4131023-8 gnd rswk-swf CMOS-Schaltung (DE-588)4148111-2 gnd rswk-swf Entwurf (DE-588)4121208-3 gnd rswk-swf Schaltungsentwurf (DE-588)4179389-4 gnd rswk-swf VLSI (DE-588)4117388-0 gnd rswk-swf Digitale integrierte Schaltung (DE-588)4113313-4 gnd rswk-swf CMOS-Schaltung (DE-588)4148111-2 s VLSI (DE-588)4117388-0 s Schaltungsentwurf (DE-588)4179389-4 s DE-604 Logische Schaltung (DE-588)4131023-8 s Entwurf (DE-588)4121208-3 s CMOS (DE-588)4010319-5 s 1\p DE-604 Digitale integrierte Schaltung (DE-588)4113313-4 s 2\p DE-604 1\p cgwrk 20201028 DE-101 https://d-nb.info/provenance/plan#cgwrk 2\p cgwrk 20201028 DE-101 https://d-nb.info/provenance/plan#cgwrk |
spellingShingle | Uyemura, John P. CMOS logic circuit design CMOS (DE-588)4010319-5 gnd Logische Schaltung (DE-588)4131023-8 gnd CMOS-Schaltung (DE-588)4148111-2 gnd Entwurf (DE-588)4121208-3 gnd Schaltungsentwurf (DE-588)4179389-4 gnd VLSI (DE-588)4117388-0 gnd Digitale integrierte Schaltung (DE-588)4113313-4 gnd |
subject_GND | (DE-588)4010319-5 (DE-588)4131023-8 (DE-588)4148111-2 (DE-588)4121208-3 (DE-588)4179389-4 (DE-588)4117388-0 (DE-588)4113313-4 |
title | CMOS logic circuit design |
title_auth | CMOS logic circuit design |
title_exact_search | CMOS logic circuit design |
title_full | CMOS logic circuit design John P. Uyemura |
title_fullStr | CMOS logic circuit design John P. Uyemura |
title_full_unstemmed | CMOS logic circuit design John P. Uyemura |
title_short | CMOS logic circuit design |
title_sort | cmos logic circuit design |
topic | CMOS (DE-588)4010319-5 gnd Logische Schaltung (DE-588)4131023-8 gnd CMOS-Schaltung (DE-588)4148111-2 gnd Entwurf (DE-588)4121208-3 gnd Schaltungsentwurf (DE-588)4179389-4 gnd VLSI (DE-588)4117388-0 gnd Digitale integrierte Schaltung (DE-588)4113313-4 gnd |
topic_facet | CMOS Logische Schaltung CMOS-Schaltung Entwurf Schaltungsentwurf VLSI Digitale integrierte Schaltung |
work_keys_str_mv | AT uyemurajohnp cmoslogiccircuitdesign |