Phase lock loops and frequency synthesis:
Gespeichert in:
| 1. Verfasser: | |
|---|---|
| Format: | Buch |
| Sprache: | English |
| Veröffentlicht: |
Chichester [u.a.]
Wiley
2003
|
| Schlagworte: | |
| Online-Zugang: | Inhaltsverzeichnis |
| Beschreibung: | Includes bibliographical references and index |
| Beschreibung: | XII, 320 S. graph. Darst. |
| ISBN: | 0470848669 |
Internformat
MARC
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| 100 | 1 | |a Kroupa, Věnceslav F. |e Verfasser |4 aut | |
| 245 | 1 | 0 | |a Phase lock loops and frequency synthesis |c Věnceslav F. Kroupa |
| 264 | 1 | |a Chichester [u.a.] |b Wiley |c 2003 | |
| 300 | |a XII, 320 S. |b graph. Darst. | ||
| 336 | |b txt |2 rdacontent | ||
| 337 | |b n |2 rdamedia | ||
| 338 | |b nc |2 rdacarrier | ||
| 500 | |a Includes bibliographical references and index | ||
| 650 | 4 | |a Frequency synthesizers | |
| 650 | 4 | |a Phase-locked loops | |
| 650 | 0 | 7 | |a Phasenregelkreis |0 (DE-588)4174166-3 |2 gnd |9 rswk-swf |
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| 999 | |a oai:aleph.bib-bvb.de:BVB01-010294327 | ||
Datensatz im Suchindex
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|---|---|
| adam_text | PHASE LOCK LOOPS AND FREQUENCY SYNTHESIS VENCESLAV F. KROUPA ACADEMY OF
SCIENCES OF THE CZECH REPUBLIC, PRAGUE WILEY CONTENTS PREFACE XIII 1
BASIC EQUATIONS OF THE PLLS 1 1.1 INTRODUCTION 1 1.2 BASIC EQUATIONS OF
THE PLLS 1 1.3 SOLUTION OF THE BASIC PLL EQUATION IN THE TIME DOMAIN 4
1.3.1 SOLUTION IN THE CLOSED FORM 4 1.3.2 LINEARIZED SOLUTION 5 1.4
SOLUTION OF BASIC PLL EQUATIONS IN THE FREQUENCY DOMAIN 6 1.5 ORDER AND
TYPE OF PLLS 7 1.5.1 ORDER OF PLLS 8 1.5.2 TYPE OF PLLS 9 1.5.3 STEADY
STATE ERRORS 9 1.6 BLOCK DIAGRAM ALGEBRA 10 REFERENCES 12 2 PLLS OF THE
FIRST AND SECOND ORDER 13 2.1 PLLS OF THE FIRST ORDER 13 2.2 PLLS OF THE
SECOND ORDER 15 2.2.1 A SIMPLE RC FILTER 15 2.2.2 PHASE LAG-LEAD RRC OR
RCC FILTER 17 2.3 PLLS OF THE SECOND ORDER OF TYPE 2 20 2.3.1 PLLS OF
THE SECOND ORDER OF TYPE 2 WITH VOLTAGE OUTPUT PD 21 2.3.2 PLLS OF THE
SECOND ORDER OF TYPE 2 WITH CURRENT OUTPUT PHASE DETECTOR 23 2.4
SECOND-ORDER PLLS WITH FREQUENCY DIVIDERS IN THE FEEDBACK PATH 26
REFERENCES 27 3 PLLS OF THE THIRD AND HIGHER ORDERS 29 3.1 GENERAL
OPEN-LOOP TRANSFER FUNCTION G(S) 30 3.1.1 ADDITIONAL RC SECTION 30 3.1.2
TWO RC SECTIONS 30 VIII CONTENTS 3.1.3 ACTIVE SECOND-ORDER LOW-PASS
FILTER 32 3.1.4 TWIN-T RC FILTER 33 3.1.5 PLLS WITH A SELECTIVE FILTER
IN THE FEEDBACK PATH 35 3.1.6 TIME DELAYS IN PLLS 38 3.2 HIGHER-ORDER
TYPE 2 PLLS 41 3.2.1 THIRD-ORDER LOOPS: LAG-LEAD FILTER WITH ADDITIONAL
RC SECTION 41 3.2.2 THIRD-ORDER LOOP: SECOND-ORDER LAG FILTER PLUS RC
SECTION 43 3.2.3 FOURTH-ORDER LOOPS 46 3.2.4 FIFTH-ORDER LOOPS 49 3.3
PLLS WITH TRANSMISSION BLOCKS IN THE FEEDBACK PATH 55 3.3.1 DIVIDER IN
THE FEEDBACK PATH 55 3.3.2 IF FILTER IN THE FEEDBACK PATH 56 3.3.3 IF
FILTER AND DIVIDER IN THE FEEDBACK PATH 56 3.4 SAMPLED HIGHER-ORDER
LOOPS 56 3.4.1 THIRD-ORDER LOOPS WITH THE CURRENT OUTPUT PHASE DETECTOR
56 3.5 HIGHER-ORDER LOOPS OF TYPE 3 59 3.6 COMPUTER DESIGN OF A
HIGHER-ORDER PLL 60 REFERENCES 63 4 STABILITY OF THE PLL SYSTEMS 65 4.1
HURWITZ CRITERION OF STABILITY 66 4.2 COMPUTATION OF THE ROOTS OF THE
POLYNOMIAL P(S) 68 4.3 EXPANSION OF THE FUNCTION 1/[1 + G(S)] INTO A SUM
OF SIMPLE FRACTIONS 69 4.3.1 POLYNOMIAL S(S) CONTAINS SIMPLE ROOTS ONLY
69 4.3.2 POLYNOMIAL S(S) CONTAINS A PAIR OF COMPLEX ROOTS 69 4.3.3
POLYNOMIAL S(S) CONTAINS MULTIPLE-ORDER ROOTS 70 4.4 THE ROOT-LOCUS
METHOD 70 4.5 FREQUENCY ANALYSIS OF THE TRANSFER FUNCTIONS - BODE PLOTS
73 4.5.1 BODE PLOTS 74 4.5.2 POLAR DIAGRAMS 81 4.6 NYQUIST CRITERION OF
STABILITY - 83 4.7 THE EFFECTIVE DAMPING FACTOR - 88 4.8 APPENDIX , 91
REFERENCES 92 5 TRACKING 93 5.1 TRANSIENTS IN PLLS 93 5.1.1 TRANSIENTS
IN FIRST-ORDER PLLS 94 5.1.2 TRANSIENTS IN SECOND-ORDER PLLS 94 5.1.3
TRANSIENTS IN HIGHER-ORDER LOOPS 101 5.2 PERIODIC CHANGES 101 5.2.1
PHASE MODULATION OF THE INPUT SIGNAL 104 5.2.2 FREQUENCY MODULATION OF
THE INPUT SIGNAL 104 CONTENTS IX 5.3 DISCRETE SPURIOUS SIGNALS 105 5.3.1
SMALL DISCRETE SPURIOUS SIGNALS AT THE INPUT 105 5.3.2 SMALL SPURIOUS
SIGNALS AT THE OUTPUT OF THE PHASE DETECTOR 107 5.3.3 SMALL SPURIOUS
SIGNALS AT THE OUTPUT OF THE PLLS 109 REFERENCES 110 6 WORKING RANGES OF
PLLS 111 6.1 HOLD-IN RANGE 111 6.1.1 PHASE DETECTOR WITH THE SINE WAVE
OUTPUT 112 6.1.2 THE PD WITH TRIANGULAR OUTPUT 112 6.1.3 THE PD WITH A
SAWTOOTH WAVE OUTPUT 112 6.1.4 SEQUENTIAL PHASE FREQUENCY DETECTORS 113
6.2 THE PULL-IN RANGE 113 6.2.1 PLLS OF THE FIRST ORDER 117 6.2.2 PLLS
OF THE SECOND ORDER 118 6.3 LOCK-IN RANGE 125 6.3.1 PLLS OF THE FIRST
ORDER 127 6.3.2 PLLS OF THE SECOND ORDER 128 6.4 PULL-OUT FREQUENCY 130
6.5 HIGHER-ORDER PLLS AND DIFFICULTIES WITH LOCKING 132 6.5.1 FALSE
LOCKING 133 6.5.2 LOCKING ON SIDEBANDS 134 6.5.3 LOCKING ON HARMONICS
134 6.5.4 LOCKING ON MIRROR FREQUENCIES 135 REFERENCES 136 7 ACQUISITION
OF PLLS 137 7.1 THE PULL-IN TIME 137 7.1.1 THE PULL-IN TIME OF A PLL
WITH SINE WAVE PD 138 7.1.2 THE PULL-IN TIME OF A PLL WITH SAWTOOTH WAVE
PD 140 7.1.3 THE PULL-IN TIME OF A PLL WITH TRIANGULAR WAVE PD 141 7.2
THE LOCK-IN TIME 141 7.3 AIDED ACQUISITION 142 7.3.1 PRETUNING OF THE
VCO 142 7.3.2 FORCED TUNING OF THE VCO 142 7.3.3 ASSISTANCE OF THE
FREQUENCY DISCRIMINATOR 143 7.3.4 INCREASING THE PLL BANDWIDTH 145 7.4
TIME TO UNLOCK 148 REFERENCES 148 8 BASIC BLOCKS OF PLLS 149 8.1 FILTERS
WITH OPERATIONAL AMPLIFIERS 149 X CONTENTS 8.2 INTEGRATORS 152 8.2.1
ACTIVE INTEGRATORS WITH OPERATION AMPLIFIERS 152 8.2.2 PASSIVE
INTEGRATORS 152 8.3 MIXERS 152 8.3.1 MULTIPLICATIVE MIXERS 153 8.3.2
SWITCHING MIXERS 155 8.3.3 RING MODULATORS 156 8.4 PHASE DETECTORS 158
8.4.1 A SIMPLE SWITCH 158 8.4.2 RING MODULATORS 158 8.4.3 SAMPLING PHASE
DETECTORS 160 8.4.4 DIGITAL PHASE DETECTORS 164 8.5 FREQUENCY DIVIDERS
172 8.5.1 REGENERATIVE FREQUENCY DIVIDERS 172 8.5.2 DIGITAL FREQUENCY
DIVIDERS 173 8.6 DIGITAL CIRCUITS 180 8.6.1 GATES - THE LOGIC LEVELS AND
SYMBOLS 181 8.6.2 FLIP-FLOPS 183 REFERENCES 187 9 NOISE AND TIME JITTER
189 9.1 INTRODUCTION 189 9.2 TYPES OF NOISE * 189 9.2.1 WHITE NOISE
190 9.2.2 FLICKER OR 1// NOISE 194 9.2.3 NOISE I// 2 195 9.2.4
PIECE-WISE APPROXIMATIONS OF NOISE CHARACTERISTICS 196 9.3 MATHEMATICAL
THEORY OF NOISE 197 9.3.1 FREQUENCY DOMAIN 197 9.3.2 TIME DOMAIN 199
9.3.3 CONVERSION BETWEEN FREQUENCY AND TIME DOMAIN MEASURES * 199 9.3.4
PHASE AND TIME JITTER , 200 9.3.5 SMALL AND BAND-LIMITED PERTURBATIONS
OF SINUSOIDAL SIGNALS 203 9.4 COMPONENT NOISES 205 9.4.1 AMPLIFIERS 205
9.4.2 FREQUENCY DIVIDERS 206 9.4.3 PHASE DETECTORS 208 9.4.4 NOISES
ASSOCIATED WITH LOOP FILTERS 208 9.4.5 OSCILLATORS 211 9.4.6 OSCILLATOR
PROPERTIES 215 9.4.7 PHASE NOISE IN PLLS 220 9.4.8 APPLICATION OF PLLS
FOR NOISE MEASUREMENT 223 CONTENTS XI 9.5 PLL NOISE BANDWIDTH 225 9.6
APPENDIX: PROPERTIES OF RING OSCILLATORS 225 REFERENCES 229 10 DIGITAL
PLLS (SAMPLED SYSTEMS) 231 10.1 FUNDAMENTALS OF THE Z-TRANSFORM 231 10.2
PRINCIPLES OF DIGITAL FEEDBACK SYSTEMS 239 10.3 MAJOR BUILDING BLOCKS OF
DPLLS 240 10.3.1 DIGITAL PHASE DETECTORS 240 10.3.2 DIGITAL FILTERS 244
10.3.3 DIGITAL OSCILLATORS 244 10.4 DIGITAL PHASE-LOCKED LOOPS (DPLLS)
249 10.4.1 DIGITAL PHASE-LOCKED LOOPS OF THE FIRST ORDER 249 10.4.2
DIGITAL PHASE-LOCKED LOOPS OF THE SECOND ORDER 250 10.5 TRANSIENT
RESPONSE EVALUATION FOR STEADY AND PERIODIC CHANGES OF INPUT PHASE AND
FREQUENCY 252 10.6 LOOP NOISE BANDWIDTH OF DIGITAL PLLS 253 REFERENCES
254 11 PLLS IN FREQUENCY SYNTHESIS 255 11.1 HISTORICAL INTRODUCTION 256
11.2 GEARBOXES 258 11.3 FREQUENCY SYNTHESIS » 259 11.3.1
SINGLE-FREQUENCY SYNTHESIZERS 259 11.3.2 MULTIPLE OUTPUT FREQUENCY
SYNTHESIZERS 260 11.4 MATHEMATICAL THEORY OF FREQUENCY SYNTHESIS 260
11.4.1 APPROXIMATION OF REAL NUMBERS 260 11.5 DIRECT DIGITAL FREQUENCY
SYNTHESIZERS 267 11.5.1 SPURIOUS SIGNALS IN DDFSS 268 11.5.2 PHASE AND
BACKGROUND NOISE IN DDFSS 273 REFERENCES 273 12 PLLS AND DIGITAL
FREQUENCY SYNTHESIZERS , 275 12.1 INTEGER-N PLL DIGITAL FREQUENCY
SYNTHESIZERS 275 12.1.1 SPURIOUS SIGNALS IN INTEGER-N PLL DIGITAL
FREQUENCY SYNTHESIZERS 276 12.1.2 BACKGROUND NOISE IN INTEGER-N PLL
DIGITAL FREQUENCY SYNTHESIZERS 279 12.2 FRACTIONAL-N PLL DIGITAL
FREQUENCY SYNTHESIZERS 280 12.2.1 SPURIOUS SIGNALS IN FRACTIONAL-N PLL
DIGITAL FREQUENCY SYNTHESIZERS 282 12.2.2 REDUCTION OF SPURIOUS SIGNALS
IN FRACTIONAL-N PLL-DDFSS 287 XII CONTENTS 12.3 SIGMA-DELTA FRACTIONAL-N
PLL DIGITAL FREQUENCY SYNTHESIZERS 289 12.3.1 OPERATION OF THE E-A
MODULATOR IN THE Z-TRANSFORM NOTATION 290 12.3.2 SOLUTION WITH THE
ASSISTANCE OF THE FOURIER SERIES 292 12.3.3 NOISE AND SPURIOUS SIGNALS
IN PLL FREQUENCY SYNTHESIZERS WITH SIGMA-DELTA MODULATORS (SDQ) 295
12.3.4 SPURIOUS SIGNALS IN PRACTICAL PLL SYSTEMS WITH SIGMA-DELTA
MODULATORS 298 12.4 APPENDIX 301 REFERENCES 303 APPENDIX LIST OF SYMBOLS
305 INDEX 315
|
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| illustrated | Illustrated |
| indexdate | 2024-07-09T19:13:19Z |
| institution | BVB |
| isbn | 0470848669 |
| language | English |
| lccn | 2003045088 |
| oai_aleph_id | oai:aleph.bib-bvb.de:BVB01-010294327 |
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| owner_facet | DE-29T |
| physical | XII, 320 S. graph. Darst. |
| publishDate | 2003 |
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| publisher | Wiley |
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| spelling | Kroupa, Věnceslav F. Verfasser aut Phase lock loops and frequency synthesis Věnceslav F. Kroupa Chichester [u.a.] Wiley 2003 XII, 320 S. graph. Darst. txt rdacontent n rdamedia nc rdacarrier Includes bibliographical references and index Frequency synthesizers Phase-locked loops Phasenregelkreis (DE-588)4174166-3 gnd rswk-swf Frequenzsynthese (DE-588)4155414-0 gnd rswk-swf Frequenzsynthese (DE-588)4155414-0 s Phasenregelkreis (DE-588)4174166-3 s DE-604 HEBIS Datenaustausch Darmstadt application/pdf http://bvbr.bib-bvb.de:8991/F?func=service&doc_library=BVB01&local_base=BVB01&doc_number=010294327&sequence=000001&line_number=0001&func_code=DB_RECORDS&service_type=MEDIA Inhaltsverzeichnis |
| spellingShingle | Kroupa, Věnceslav F. Phase lock loops and frequency synthesis Frequency synthesizers Phase-locked loops Phasenregelkreis (DE-588)4174166-3 gnd Frequenzsynthese (DE-588)4155414-0 gnd |
| subject_GND | (DE-588)4174166-3 (DE-588)4155414-0 |
| title | Phase lock loops and frequency synthesis |
| title_auth | Phase lock loops and frequency synthesis |
| title_exact_search | Phase lock loops and frequency synthesis |
| title_full | Phase lock loops and frequency synthesis Věnceslav F. Kroupa |
| title_fullStr | Phase lock loops and frequency synthesis Věnceslav F. Kroupa |
| title_full_unstemmed | Phase lock loops and frequency synthesis Věnceslav F. Kroupa |
| title_short | Phase lock loops and frequency synthesis |
| title_sort | phase lock loops and frequency synthesis |
| topic | Frequency synthesizers Phase-locked loops Phasenregelkreis (DE-588)4174166-3 gnd Frequenzsynthese (DE-588)4155414-0 gnd |
| topic_facet | Frequency synthesizers Phase-locked loops Phasenregelkreis Frequenzsynthese |
| url | http://bvbr.bib-bvb.de:8991/F?func=service&doc_library=BVB01&local_base=BVB01&doc_number=010294327&sequence=000001&line_number=0001&func_code=DB_RECORDS&service_type=MEDIA |
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