CMOS logic circuit design:
Gespeichert in:
1. Verfasser: | |
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Format: | Buch |
Sprache: | English |
Veröffentlicht: |
Boston [u.a.]
Kluwer
2002
|
Ausgabe: | 2. printing |
Schlagworte: | |
Beschreibung: | XVIII, 528 S. graph. Darst. |
ISBN: | 0792384520 |
Internformat
MARC
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100 | 1 | |a Uyemura, John P. |e Verfasser |4 aut | |
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250 | |a 2. printing | ||
264 | 1 | |a Boston [u.a.] |b Kluwer |c 2002 | |
300 | |a XVIII, 528 S. |b graph. Darst. | ||
336 | |b txt |2 rdacontent | ||
337 | |b n |2 rdamedia | ||
338 | |b nc |2 rdacarrier | ||
650 | 0 | 7 | |a CMOS |0 (DE-588)4010319-5 |2 gnd |9 rswk-swf |
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650 | 0 | 7 | |a Schaltungsentwurf |0 (DE-588)4179389-4 |2 gnd |9 rswk-swf |
650 | 0 | 7 | |a Logische Schaltung |0 (DE-588)4131023-8 |2 gnd |9 rswk-swf |
650 | 0 | 7 | |a VLSI |0 (DE-588)4117388-0 |2 gnd |9 rswk-swf |
650 | 0 | 7 | |a Digitale integrierte Schaltung |0 (DE-588)4113313-4 |2 gnd |9 rswk-swf |
650 | 0 | 7 | |a Entwurf |0 (DE-588)4121208-3 |2 gnd |9 rswk-swf |
689 | 0 | 0 | |a CMOS-Schaltung |0 (DE-588)4148111-2 |D s |
689 | 0 | 1 | |a VLSI |0 (DE-588)4117388-0 |D s |
689 | 0 | 2 | |a Schaltungsentwurf |0 (DE-588)4179389-4 |D s |
689 | 0 | |5 DE-604 | |
689 | 1 | 0 | |a Logische Schaltung |0 (DE-588)4131023-8 |D s |
689 | 1 | 1 | |a Entwurf |0 (DE-588)4121208-3 |D s |
689 | 1 | 2 | |a CMOS |0 (DE-588)4010319-5 |D s |
689 | 1 | |8 1\p |5 DE-604 | |
689 | 2 | 0 | |a CMOS |0 (DE-588)4010319-5 |D s |
689 | 2 | 1 | |a Digitale integrierte Schaltung |0 (DE-588)4113313-4 |D s |
689 | 2 | |8 2\p |5 DE-604 | |
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883 | 1 | |8 2\p |a cgwrk |d 20201028 |q DE-101 |u https://d-nb.info/provenance/plan#cgwrk |
Datensatz im Suchindex
_version_ | 1804129671767392256 |
---|---|
any_adam_object | |
author | Uyemura, John P. |
author_facet | Uyemura, John P. |
author_role | aut |
author_sort | Uyemura, John P. |
author_variant | j p u jp jpu |
building | Verbundindex |
bvnumber | BV014964203 |
classification_rvk | ZN 4960 |
ctrlnum | (OCoLC)634454165 (DE-599)BVBBV014964203 |
discipline | Elektrotechnik / Elektronik / Nachrichtentechnik |
edition | 2. printing |
format | Book |
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id | DE-604.BV014964203 |
illustrated | Illustrated |
indexdate | 2024-07-09T19:08:51Z |
institution | BVB |
isbn | 0792384520 |
language | English |
oai_aleph_id | oai:aleph.bib-bvb.de:BVB01-010085852 |
oclc_num | 634454165 |
open_access_boolean | |
owner | DE-703 |
owner_facet | DE-703 |
physical | XVIII, 528 S. graph. Darst. |
publishDate | 2002 |
publishDateSearch | 2002 |
publishDateSort | 2002 |
publisher | Kluwer |
record_format | marc |
spelling | Uyemura, John P. Verfasser aut CMOS logic circuit design John P. Uyemura 2. printing Boston [u.a.] Kluwer 2002 XVIII, 528 S. graph. Darst. txt rdacontent n rdamedia nc rdacarrier CMOS (DE-588)4010319-5 gnd rswk-swf CMOS-Schaltung (DE-588)4148111-2 gnd rswk-swf Schaltungsentwurf (DE-588)4179389-4 gnd rswk-swf Logische Schaltung (DE-588)4131023-8 gnd rswk-swf VLSI (DE-588)4117388-0 gnd rswk-swf Digitale integrierte Schaltung (DE-588)4113313-4 gnd rswk-swf Entwurf (DE-588)4121208-3 gnd rswk-swf CMOS-Schaltung (DE-588)4148111-2 s VLSI (DE-588)4117388-0 s Schaltungsentwurf (DE-588)4179389-4 s DE-604 Logische Schaltung (DE-588)4131023-8 s Entwurf (DE-588)4121208-3 s CMOS (DE-588)4010319-5 s 1\p DE-604 Digitale integrierte Schaltung (DE-588)4113313-4 s 2\p DE-604 1\p cgwrk 20201028 DE-101 https://d-nb.info/provenance/plan#cgwrk 2\p cgwrk 20201028 DE-101 https://d-nb.info/provenance/plan#cgwrk |
spellingShingle | Uyemura, John P. CMOS logic circuit design CMOS (DE-588)4010319-5 gnd CMOS-Schaltung (DE-588)4148111-2 gnd Schaltungsentwurf (DE-588)4179389-4 gnd Logische Schaltung (DE-588)4131023-8 gnd VLSI (DE-588)4117388-0 gnd Digitale integrierte Schaltung (DE-588)4113313-4 gnd Entwurf (DE-588)4121208-3 gnd |
subject_GND | (DE-588)4010319-5 (DE-588)4148111-2 (DE-588)4179389-4 (DE-588)4131023-8 (DE-588)4117388-0 (DE-588)4113313-4 (DE-588)4121208-3 |
title | CMOS logic circuit design |
title_auth | CMOS logic circuit design |
title_exact_search | CMOS logic circuit design |
title_full | CMOS logic circuit design John P. Uyemura |
title_fullStr | CMOS logic circuit design John P. Uyemura |
title_full_unstemmed | CMOS logic circuit design John P. Uyemura |
title_short | CMOS logic circuit design |
title_sort | cmos logic circuit design |
topic | CMOS (DE-588)4010319-5 gnd CMOS-Schaltung (DE-588)4148111-2 gnd Schaltungsentwurf (DE-588)4179389-4 gnd Logische Schaltung (DE-588)4131023-8 gnd VLSI (DE-588)4117388-0 gnd Digitale integrierte Schaltung (DE-588)4113313-4 gnd Entwurf (DE-588)4121208-3 gnd |
topic_facet | CMOS CMOS-Schaltung Schaltungsentwurf Logische Schaltung VLSI Digitale integrierte Schaltung Entwurf |
work_keys_str_mv | AT uyemurajohnp cmoslogiccircuitdesign |