Proceedings of the tenth International Symposium on Hardware Software Codesign: CODES 2002, May 6 - 8, 2002, Estes Park, Colorado, USA
Gespeichert in:
| Körperschaft: | |
|---|---|
| Format: | Tagungsbericht Buch |
| Sprache: | English |
| Veröffentlicht: |
New York, NY
Assoc. for Computing Machinery
2002
|
| Schlagworte: | |
| Online-Zugang: | Inhaltsverzeichnis |
| Beschreibung: | VIII, 217 S. Ill., graph. Darst. |
| ISBN: | 1581135424 |
Internformat
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| 246 | 1 | 3 | |a CODES 2002 |
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Datensatz im Suchindex
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| adam_text | TABLE
OF
CONTENTS
(s)
indicates
Short
paper
CODES Ol
Committee
Listing
......................................................................................................................
vii
Additional Referees
.........................................................................................................................................
viii
Session
1:
Advances in System Specification
and System Design Frameworks
Codesign-Extended Applications
.....................................................................................................................1
Brian Grattan, Greg Stitt, and Frank Vahid
Algorithmic Transformation Techniques for Efficient Exploration
of Alternative Application Instances
...............................................................................................................7
Todor
Štefanov,
Bart Kienhuis, and Ed Deprettere
Concurrent Execution Semantics and Sequential Simulation Algorithms
for Metropolis Meta-Model
.............................................................................................................................13
Felice Balarin, Luciano Lavagno,
Claudio
Passerone,
Alberto Sangiovanni-Vincentelli,
Yosinori Watanabe, and Guang Yang
(s) The Design Context of Concurrent Computation Systems
..................................................................19
JoAnn M. Paul, Christopher M. Eatedali, and Donald E. Thomas
(s)A Language for Multiple Models of Computation
................................................................................25
Dag Björklund
and
Johan Lilius
Session
2:
System Design Methods: Analysis and Verification
FPGA Resource and Timing Estimation from
Matlab
Execution Traces
.............................................31
Per
Bjureus, Mikael
Millberg, and Axel Jantsch
Worst-Case Performance Analysis of Parallel, Communicating Software Processes
.........................37
A.
Siebenborn,
О.
Bringmann,
and
W.
Rosenstiel
Symbolic
Model
Checking of Dual Transition
Petri
Nets
.........................................................................43
Mauricio Varea,
Bashir
M.
Al-Hashimi, Luis A. Cortes,
Petru
Eles, and
Zebo
Peng
Simulation Bridge: A Framework for Multi-Processor Simulation
........................................................49
G. D. Nagendra, V.G. Prem Kumar, and B.S. Sheshadri Chakravarthy
Session
3:
Design Space Exploration and Architectural Design
of HW/SW Systems
Metrics for Design Space Exploration of Heterogeneous Multiprocessor Embedded Systems
.........55
Donatella Sciuto,
Fabio Salice, Luigi Pomante,
and William Fornaciari
Fast Processor Core Selection for WLAN Modem Using Mappability Estimation
..............................61
Juha-Pekka Soininen,
Jari
Kreku, Yang Qu, and
Martti Forsel
(s) Multi-Objective Design Space Exploration Using Genetic Algorithms
............................................67
Tony Givargis and
Maurizio Palesi
iv
(s)
Scratchpad
Memory
:
A Design Alternative for Cache On-Chip Memory
in Embedded
Systems
.......................................................................................................................................73
Rajeshwari Banakar, Stefan Steinke, Bo-Sik Lee, M. Balakrishnan, and Peter Manvedel
(s) Hardware Support for
Real-Time
Embedded Multiprocessor System-on-a-Chip
Memory
Management
..........................................................................................................................................79
Mohamed Shalan and Vincent J. Mooney
III
(s) Large Exploration for HW/SW
Partitioning ofMultirate and Aperiodic
Real-Time
Systems
.....85
Abdenour Azzedine, Jean-Philippe Diguet, and Jean-Luc Philippe
Session
4:
Co-Design Architecture
and Synthesis
Program Slicing for Codesign
........................................................................................................................91
Jeffiy T.
Russell
Compiler-Directed Customization of ASIP Cores.......................................................................................
97
T.
Vinod Kumar Gupta, Roberto E.
Ko,
and Rajeev
Ваша
A Study of CodePack: Optimizing Embedded Code Space
................................................................103
Avishay Orpaz and Shlomo Weiss
A Novel Codesign Approach Based on Distributed Virtual Machines
..................................................109
Christian
Steger,
Christian Kreiner,
Egon Teiniker,
and
Reinhold
Weiss
(s) Optimization and Synthesis for Complex Reactive Embedded Systems
by Incremental Collapsing
............................................................................................................................115
Massimiliano L.
Chiodo
Session
5:
System Partitioning and Timing Analysis
Transformation of SDL Specifications for System-Level Timing Analysis
.........................................121
Marek
Jersak,
Kai Richter,
Rafik
Henia,
Rolf
Ernst, and Frank
Słomka
A
Strongly Polynomial-Time Algorithm for Over-Constraint Resolution
............................................127
AH Dasdan
Hardware-Software Cosynthesis of Multi-mode Multi-Task Embedded Systems
with
Real-Time
Constraints
..........................................................................................................................133
Hyunok Oh and Soonhoi Ha
Design of Multi-Tasking Coprocessor Control for Eclipse
.....................................................................139
Martijn J.
Rutten, Jos T.J.
van Eijndhoven, and
Evert-Jan D.
Pol
(s) Hardware-Software Bipartitioning for Dynamically Reconfigurable Systems
.............................145
Sarma
В.К.
Vrudhula and
Daler
N.
Rakhmatov
(s) HW/SW
Partitioning and Code Generation of Embedded Control Applications
on a Reconfigurable Architecture Platform
..............................................................................................151
Massimo Baleani, Frank
Gennari,
Yunjian Jiang, Yatish
Patel,
Robert K. Brayton,
and Alberto Sangiovanni-Vincentelli
Session 6: Energy
Efficiency in
System Design
Fast System-Level Power
Profiling for Battery-Efficient
System Design............................................157
Kanishka Lahiri, Anand Raghunathan, and
Suj
it
Dey
Energy
Savings Through Compression in Embedded Java Environments
..........................................163
G. Chen, M. Kandemir,
N.
Vijaykrishnan, M. J.
Irwin,
and W. Wolf
Communication Speed Selection for Embedded Systems with Networked Voltage-Scalable
Processors
..........................................................................................................................................................169
Jinfeng Liu,
Pai
H. Chou,
and Nader Bagherzadeh
Pruning-Based Energy-Optimal Device Scheduling for Hard
Real-Time
Systems
...........................175
Vishnu Swaminathan and Krishnendu Chakrabarty
(s) Energy Frugal Tags in Reprogrammable I-Caches for Application-Specific Embedded
Processors
.........................................................................................................................................................181
Peter
Petrov
and Alex Orailoglu
Session
7:
System Design Methods: Scheduling Advances
Holistic Scheduling and Analysis of Mixed Time/Event-Triggered
Distributed Embedded Systems
.....................................................................................................................187
Traian Pop,
Petru
Eles,
and
Zebo
Peng
Locality-Conscious Process Scheduling in Embedded Systems
.............................................................193
I. Kadayif, M. Kandemir, and
I. Kolcu
Reconfigurable
SoC Design with Hierarchical FSM and Synchronous Dataflow Model
................199
Sunghyun Lee, Sungjoo Yoo, and Kiyoung Choi
Dynamic Run-Time HW/SWScheduling Techniques for
Reconfigurable
Architectures
................205
Juanjo
Noguera
and Rosa M.
Badia
(s)
Extended Quasi-Static Scheduling for Formal Synthesis and Code Generation
of Embedded Software
.........................................................................................................................211
Feng-Shi
Su
and Pao-Ann Hsiung
Author Index
.............................................................................................................................................217
vi
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| spelling | International Symposium on Hardware Software Codesign 10 2002 Estes Park, Colo. Verfasser (DE-588)10058429-9 aut Proceedings of the tenth International Symposium on Hardware Software Codesign CODES 2002, May 6 - 8, 2002, Estes Park, Colorado, USA CODES 2002 Hardware software codesign Proceedings New York, NY Assoc. for Computing Machinery 2002 VIII, 217 S. Ill., graph. Darst. txt rdacontent n rdamedia nc rdacarrier Computer-aided design Congresses System design Congresses Systems engineering Congresses Hardwareentwurf (DE-588)4159103-3 gnd rswk-swf Softwareentwicklung (DE-588)4116522-6 gnd rswk-swf (DE-588)1071861417 Konferenzschrift 2002 Estes Park Colo. gnd-content Hardwareentwurf (DE-588)4159103-3 s Softwareentwicklung (DE-588)4116522-6 s DE-604 Digitalisierung TU Muenchen application/pdf http://bvbr.bib-bvb.de:8991/F?func=service&doc_library=BVB01&local_base=BVB01&doc_number=009938452&sequence=000002&line_number=0001&func_code=DB_RECORDS&service_type=MEDIA Inhaltsverzeichnis |
| spellingShingle | Proceedings of the tenth International Symposium on Hardware Software Codesign CODES 2002, May 6 - 8, 2002, Estes Park, Colorado, USA Computer-aided design Congresses System design Congresses Systems engineering Congresses Hardwareentwurf (DE-588)4159103-3 gnd Softwareentwicklung (DE-588)4116522-6 gnd |
| subject_GND | (DE-588)4159103-3 (DE-588)4116522-6 (DE-588)1071861417 |
| title | Proceedings of the tenth International Symposium on Hardware Software Codesign CODES 2002, May 6 - 8, 2002, Estes Park, Colorado, USA |
| title_alt | CODES 2002 Hardware software codesign Proceedings |
| title_auth | Proceedings of the tenth International Symposium on Hardware Software Codesign CODES 2002, May 6 - 8, 2002, Estes Park, Colorado, USA |
| title_exact_search | Proceedings of the tenth International Symposium on Hardware Software Codesign CODES 2002, May 6 - 8, 2002, Estes Park, Colorado, USA |
| title_full | Proceedings of the tenth International Symposium on Hardware Software Codesign CODES 2002, May 6 - 8, 2002, Estes Park, Colorado, USA |
| title_fullStr | Proceedings of the tenth International Symposium on Hardware Software Codesign CODES 2002, May 6 - 8, 2002, Estes Park, Colorado, USA |
| title_full_unstemmed | Proceedings of the tenth International Symposium on Hardware Software Codesign CODES 2002, May 6 - 8, 2002, Estes Park, Colorado, USA |
| title_short | Proceedings of the tenth International Symposium on Hardware Software Codesign |
| title_sort | proceedings of the tenth international symposium on hardware software codesign codes 2002 may 6 8 2002 estes park colorado usa |
| title_sub | CODES 2002, May 6 - 8, 2002, Estes Park, Colorado, USA |
| topic | Computer-aided design Congresses System design Congresses Systems engineering Congresses Hardwareentwurf (DE-588)4159103-3 gnd Softwareentwicklung (DE-588)4116522-6 gnd |
| topic_facet | Computer-aided design Congresses System design Congresses Systems engineering Congresses Hardwareentwurf Softwareentwicklung Konferenzschrift 2002 Estes Park Colo. |
| url | http://bvbr.bib-bvb.de:8991/F?func=service&doc_library=BVB01&local_base=BVB01&doc_number=009938452&sequence=000002&line_number=0001&func_code=DB_RECORDS&service_type=MEDIA |
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