Proceedings of the 27th European Solid-State Circuits Conference: Technikum Kärnten, Carinthia Tech Institute, Villach, Austria, 18 - 20 September 2001
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Format: | Tagungsbericht Buch |
Sprache: | English |
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2001
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Beschreibung: | XII, 558 S. Ill., graph. Darst. |
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adam_text | IMAGE 1
ESSCIRC 2001
TECHNIKUM
2. EH C3
1 I*
T
*
CARINTHIA TECH INSTITUTE
MET
PROCEEDINGS OF THE
27TH EUROPEAN SOLID-STATE CIRCUITS CONFERENCE
VILLACH, AUSTRIA
18-20 SEPTEMBER 2001
EDITED BY
F. DIELACHER H. GRUNBACHER
IMAGE 2
V
INVITED PAPERS
SOC DESIGN FROM A MIXED-SIGNAL PERSPECTIVE 2 W. SANSEN KATHOLIEKE
UNIVERSITEIT LEUVCN, BELGIUM MIXED SIGNAL SERVICEAND FOUNDRY A BUSINESS
MODEL FOR THE FUTURE? 6
W.A. PRIBYL AUSTRIA MIKRO SYSTEME, UNTERPREMSTATTEN, AUSTRIA
THE POTENTIAL OF MEMS COMPONENTS FOR RE-CONFIGURABLE RF INTERFACES IN
MOBILE COMMUNICATION TERMINALS 10
A. KAISER
IEMN - ISEN, LILLE, FRANCE MICROELECTRONICS FOR HOME ENTERTAINMENT 14 Y.
HAGIWARA
SONY CORPORATION, TOKYO, JAPAN TRENDS AND CHALLENGES IN VLSI TECHNOLOGY
SCALINGTOWARDS LOONM 23
S. RUSU
INTEL CORPORATION, SANTA CLARA, CA, UNITED STATES INTEGRATED CIRCUITS
FOR NEXT GENERATION WIRELESS SYSTEM 26
J. HAUSNER
INFINEON TECHNOLOGIES AG, MUNICH, GERMANY AUTOMATED PROCESSOR GENERATION
FOR SYSTEMON-CHIP 29
C. ROWEN, D. MAYDAN TENSILICA, SANTA CLARA, CA, UNITED STATES
COMMUNICATION BUS FOR AUTOMOTIVE
APPLICATIONS 35
S. POLEDNA, W. ETTLMAYR, M. NOVAK TTTECH COMPUTERTECHNIK AG, VIENNA,
AUSTRIA
CONTRIBUTED PAPERS
1.1: SYNTHESIZERS A 17 MW, 2.5 GHZ FRACTIONAL-N FREQUENCY SYNTHESIZER
FOR CDMA-2000 40
S.-O. LEE1, M. YOH2, J. LEE2,1. RYU2
SAMSUNG ELECTRONICS, SEOUL, KOREA (SOUTH) 2SAMSUNG ELECTRONICS, KOREA A
1.8 GHZ CMOS DELTA-SIGMA FRACTIONAL-N SYNTHESIZER 44
B. DE MUER, M. STEYAERT KATHOLIEKE UNIVERSITEIT LEUVEN, BELGIUM AN
INJECTION LOCKING SCHEME FOR PRECISION QUADRATURE GENERATION 48
R. MELVILLE1, D. LONG1, V. GOPINATHAN2, P. KINGET3
AGERE SYSTEMS,MURRAY HILL, NJ, UNITED STATES
2BROADCOM, IRVINE, CA, UNITED STATES 3CELIGHT, ISELIN, NJ, UNITED STATES
A WIDE-BAND, COMPACT, FULLY DIFFERENTIAL & HIGHLY ACCURATE INTEGRATED
PHASE QUADRATURE LOCKED LOOP ON 0.18 FIM CM OS 52
S. DEDIEU, F. PAILLARDET, I. TELLIEZ STMICROELECTRONICS, CROLLES, FRANCE
1.2: MODULATORS/DEMODULATORS A 14MA2GHZ 0.25P.M CMOS QUADRATURE
DEMODULATOR INCLUDING A LOW PHASE NOISE LOCAL OSCILLATOR 56
D. PFAFF, J. ROGIN, Q. HUANG ETH ZURICH, SWITZERLAND AN IMAGE-REJECT
DOWNCONVERTER WITH SIDEBAND SELECTION FOR DOUBLE-CONVERSION RECEIVER 60
K. STADIUS1, P. PAATSILA2, P. JARVIO1, K. HALONEN1 HELSINKI UNIVERSITY
OFTECHNOLOGY, ESPOO, FINLAND
2ATMEI FINLAND DEVELOPMENT CENTER A DIRECT-CONVERSION BICMOS MIXER 64 E.
TIILIHARJU, K, HALONEN HELSINKI UNIVERSITY OF TECHNOLOGY, ESPOO,
FINLAND
1/F-NOISE IN PASSIVE CMOS MIXERS FOR LOW
AND ZERO IF INTEGRATED RECEIVERS 68
D. LEENAERTS , W. REDMAN-WHITE2
PHILIPS RESEARCH LABORATORIES, EINDHOVEN,
THE NETHERLANDS 2PHILIPS SEMICONDUCTORS AND SOUTHAMPTON UNIV., UNITED
KINGDOM
1.3: RF/IF AMPLIFIERS IMPROVED HIGH DYNAMIC RANGE SWITCHED GAIN
LOW-NOISE AMPLIFIER FOR WIDE-BAND CDMA APPLICATIONS 72
P. GARCIA, D. BELOT STMICROELECTRONICS, CROLLES, FRANCE A 7-GHZ 1.8DB NF
CMOS LOW NOISE AMPLIFIER 76
R. FUJIMOTO , K. KOJIMA2, S. OTAKA TOSHIBA CORPORATION, KAWASAKI,
JAPAN 2TOSHIBA SEMICONDUCTORS, KAWASAKI, JAPAN VARIABLE GAIN AMPLIFIER
FOR DUAL MODE WCDMA/GSM RECEIVERS 80
M.A.I. MOSTAFA , S.H.K. EMBABI1, M. ELMALA2 TEXAS INSTRUMENTS, INC.,
RICHARDSON, UNITED STATES 2TEXAS A&M UNIVERSITY, UNITED STATES CLASS 1
BLUETOOTH POWER AMPLIFIER WITH 24 DBM OUTPUT POWER AND 48% PAE AT 2.4
GHZ IN 0.25 UM CMOS 84
V. VATHULYA , T. SOWLATI1, D. LEENAERTS2 PHILIPS RESEARCH, BRIARCLIFF
MANOR, NY, UNITED STATES
2PHILIPS RESEARCH, EINDHOVEN, THE NETHERLANDS
IMAGE 3
VI
1.4: VOLTAGE REGULATORS A CMOS VOLTAGE REFERENCE BASED ON WEIGHTED
DIFFERENCE OF GATE-SOURCE VOLTAGES BETWEEN PMOS AND NMOS TRANSISTORS FOR
LOW DROPOUT REGULATORS 88
K.-N. LEUNG, P. K.T. MOK HONG KONG UNIVERSITY OF SCIENCE AND TECHNOLOGY,
CHINA A HIGH-PRECISION LOW-DROP LINEAR REGULATOR FOR BATTERY CHARGING
APPLICATION 92
D. BERNARDON, M. MUELLAUER INFINEON TECHNOLOGIES, VILLACH, AUSTRIA A
SYNCHRONOUS, STEP-DOWN FROM 3.6V TO 1.0V, 1 MHZ PWM CMOS DCFLDC
CONVERTER 96
I. FURUKAWA, Y. SUGIMOTO
CHUO UNIVERSITY, TOKYO, JAPAN POWER EFFICIENT CHARGE PUMP IN DEEP
SUBMICRON STANDARD CMOS TECHNOLOGY 100 R. PELLICONI, D. LEZZI, A.
BARONI, M. PASOTTI,
P.L. ROLANDI
STMICROELECTRONICS, AGRATE BRIANZA, ITALY
1.5: ANALOGUE TECHNIQUES A 1-V 15UW HIGH-PRECISION TEMPERATURE SWITCH
104
D. SCHINKEL , R.-P. DE BOER1, A.-J. ANNEMA1, A.J.M.VANTUIJL2
UNIVERSITY OF TWENTE, ENSCHEDE, THE NETHERLANDS 2PHILIPS RESEARCH
LABORATORIES, EINDHOVEN, THE NETHERLANDS DESIGN AND MEASUREMENT OF A
HIGH SPEED 2.5 GBITS/SEC LASER DRIVE 108
S. VANDEWEGHE , E. ARSLAN2, Z. BARTON3, J. VANNEUVILLE
IMEC-KHBO, OOSTENDE, BELGIUM 2SIPEX,ZAVENTEM, BELGIUM 3VUT, BRNO, CZECH
REPUBLIC AN OFFSET COMPENSATED BASEBAND RECEIVE CHANNEL FOR IS-95 112
D. GUBBINS, A. CAHALANE, C. BEGHEIN, J. MORRISSEY, G. ANTONESEI
ANALOG DEVICES, LIMERICK, IRELAND INTEGRATED OFFSET TRIMMING TECHNIQUE
116 S. LAVILLE , S. PONTAROLLO , C. DUFAZA2,
D. AUVERGNE2 STMICROELECTRONICS, GRENOBLE, FRANCE 2LIRMM, MONTPELLIER,
FRANCE
1.6: CMOS IMAGER A CMOS VLSI PILOT AND SUPPORT CHIP FOR A LIQUID CRYSTAL
ON SILICON 8X8 OPTICAL CROSS CONNECT 120
A. LELAH , G. MARTEL , T. PEREZ-SEGOVIA1, P. GEOFFROY , J.-P. LAVAL , P.
JAYET , P. SENN , B. VINOUZE2, P. GRAVEY3, N. WOLFFER3, R. LEVER3, A.
TAN3 FRANCE TELECOM, MEYLAN, FRANCE 2HIGHWAVE OPTICAL TECHNOLOGIES
3ENST BRETAGNE, LANNION, FRANCE
A LKXLK HIGH DYNAMIC RANGE CMOS IMAGE SENSOR WITH ON-CHIP PROGRAMMABLE
REGION OF INTEREST READOUT 124
O. SCHREY, J. HUPPERTZ, G. FILIMONOVIC, A. BUBMANN, W. BROCKHERDE, B.J.
HOSTICKA FRAUNHOFER IMS, DUISBURG, GERMANY A CMOS LOG IMAGE SENSOR WITH
ON-CHIP FPN COMPENSATION 128
Y. NI, K. MATOU INSTITUT NATIONAL DES TELECOMMUNICATIONS,
EVRY, FRANCE 1.2 V 0.18 FIM CMOS IMAGER WITH COLUMNLEVEL OVERSAMPLING
132
J. FORTIER, N.G, TARR, A. SWAMINATHAN,
C. PLETT
CARLETON UNIVERSITY, OTTAWA, CANADA
1.7: WIRELINE SYSTEMS ON CHIP A SINGLE CHIP CONFIGURABLE NETWORK
PROCESSOR WITH BUILT IN ADSL-MODEM IN 0.18 UM CMOS 136
C. VERDONCK, D, VANDENAMEELE ALCATEL BELL HARDWARE DESIGN CENTRE,
ANTWERP, BELGIUM AN ADSL-RT FULL-RATE ANALOG FRONTEUD IC WITH INTEGRATED
LINE DRIVER 140
H. WEINBERGER, A. WIESBAUER, C. FLEISCHHACKER, J. HAUPTMANN, T. FERIANZ,
M. STABER, D. STRAUFLNIGG, B. SEGER INFINEON TECHNOLOGIES, DESIGN CENTER
VILLACH, AUSTRIA
A FOUR CHANNEL INTEGRATED VOICE AND ADSL FULL-RATE ANALOG FRONT-END 144
P. PESSL, C. SCHRANZ, A. DI GIANDOMENICO, S. WALTER
INFINEON TECHNOLOGIES MDCA, VILLACH, AUSTRIA
1.8: SYSTEMS ON CHIP A LOW JITTER, LOW POWER, CMOS 1.25-3.125GBPS
TRANSCEIVER 148
A. YOUNIS, C. BOECKER, K. HOSSAIN, F. ABUGHAZALEH, B, DAS, Y. CHEN, M.
ROBINSON, S. IRWIN, B. GRUNG ROCKETCHIPS, AXILINX COMPANY, MINNEAPOLIS,
MN, UNITED STATES A LOMW 2-CHANNEI FULLY INTEGRATED SYSTEMON-CHIP FOR
EDDY-CURRENT POSITION SENSING 152
M. OBERLE, R. REUTEMANN, J. HCRTLE, Q. HUANG ETH ZURICH, SWITZERLAND A
SINGLE CHIP H.32X MULTIMEDIA COMMUNICATION PROCESSOR WITH CIF 30F/S
MPEG4/H.26X BI-DIRECTIONAL CODEC 156 N. MINEGISHI, N. MOTOYAMA, M.
TAKAGI, F. OGAWA, K. SHIBATA, N. GODA, K. AKIYOSHI, T. KAMEMARU, K.-I.
ASANO MITSUBISHI ELECTRIC CORPORATION, KANAGAWA, JAPAN
IMAGE 4
1.9: DIGITAL SYSTEMS A 53-GOPS PROGRAMMABLE VISION PROCESSOR FOR
PROCESSING, CODING-DECODING AND SYNTHESIZING OF IMAGES 160
U. RAMACHER , W. RAAB , N. BRILLS1, U. HACHMANN , C. SAUER , A.
SCHACKOW , J. GLIESE , J. HARNISCH1, M. RICHTER ,
E. SICHENEDER , R. SCHIIFFHY2, U. SCHULZ3,
H. FELDKAMPER3, C. LILTKEMEYER3, H. SUSSE4, S. ALTMANN4
INFINEON TECHNOLOGIES AG, MUNICH, GERMANY 2UNIVERSITY OF TECHNOLOGY
DRESDEN, GERMANY
3UNIVERSITY OFTECHNOLOGY RWTH AACHEN,
GERMANY 4FRAUNHOFERGESELLSCHAFT IIS-EAS, DRESDEN,
GERMANY A LOW-POWER PARALLEL PROCESSOR IC FOR DIGITAL VIDEO CAMERAS 164
A. ABBO, R. KLEIHORST, L. SEVAT, P. WIELAGE, R. VAN VEEN, M. OP DE
BEECK, A. VAN DER AVOIRD
PHILIPS RESEARCH LABORATORIES, EINDHOVEN,
NETHERLANDS
A LOW JITTER DIGITAL TIMING SYNCHRONIZER FOR CAP-BASED VDSL SYSTEM 168
Y. SONG , K. LEE2, B. KIM
KAIST, TAEJON, KOREA (SOUTH) 2STELSYS TELECOM INC., KOREA (SOUTH)
HIGH-PERFORMANCE LOW-POWER CARRY SELECT ADDER USING DUAL TRANSITION
SKEWED LOGIC 172 W. JEONG, K. ROY, C.-K. KOH PURDUE UNIVERSITY, WEST
LAFAYETTE, IN,
UNITED STATES
AN EFFICIENT DATA TRANSMISSION INTERFACE FOR VLSI SYSTEMS USING
CODE-DIVISION MULTIPLE ACCESS TECHNIQUE 176
B.-K. TAN, R. YOSHIMURA, T. MATSUOKA, K, TANIGUCHI OSAKA UNIVERSITY,
JAPAN
2.1: OPTICAL CIRCUITS 1 LOW-NOISE SAMPLING SYSTEM FOR PHOTO CURRENT
DETECTION WITH MONOLITHICALLY
INTEGRATED PHOTO DIODES 180
S. GROISS, J. STURM
INFINEON TECHNOLOGIES MDCA, VILLACH, AUSTRIA
BICMOS OEIC WITH ENHANCED SENSITIVITY FOR DVD SYSTEMS 184
K. KIESCHNICK1, H. ZIMMERMANN ,
P. SEEGEBRECHT2
TECHNISCHE UNIVERSITAT WIEN, VIENNA,
AUSTRIA
2CHRISTIAN-ALBRECHTS-UNIVERSITAT, KIEL,
GERMANY A FULLY INTEGRATED CMOS LIGHT TO LOGIC FIBER OPTIC RECEIVER
CIRCUIT 188
K. SCHROEDINGER, J. STIMMA, M. MAUTHE INFINEON TECHNOLOGIES AG, BERLIN,
GERMANY
2.2: OPTICAL CIRCUITS 2 BANDWIDTH ENHANCEMENT TECHNIQUES FOR
TRANSIMPEDANCEAMPLIFIER IN CMOS TECHNOLOGIES 192
C.-H. LU, W.-Z. CHEN NATIONAL CENTRAL UNIVERSITY, CHUNG-LI, TAIWAN A
2.5GB/S CMOS TRANSIMPEDANCE AMPLIFIER USING NOVEL ACTIVE INDUCTORLOAD
196
Y.-H, OH, S.-G. LEE, H.-H. PARK INFORMATION AND COMMUNICATION
UNIVERSITY,
DAEJEON, KOREA (SOUTH) NOVEL CELL-AGC TECHNIQUE FOR BURST-MODE CMOS
PREAMPLIFIER WITH WIDE DYNAMIC RANGE AND HIGH SENSITIVITY FOR ATM-PON
SYSTEM 200
S. YAMASHITA1, S. IDE1, K. MORI ,
A. HAYAKAWA2,N. UENO3, K. TANAKA1 FUJITSU LABORATORIES LTD., KANAGAWA,
JAPAN
2FUJITSU VLSI LTD., JAPAN 3FUJITSU LTD., JAPAN SIGE BICMOS BURST-MODE
155 MB/S RECEIVER FOR PON 204
S. BRIGATI , P. COLOMBARA2, L. D ASCOLI2,
U. GATTI3, T. KEREKES4, P. MALCOVATI5, A. PROFUMO6 ACCO
MICROELECTRONICA S.R.L., PAVIA, ITALY
2INFINEON TECHNOLOGIES, MILAN, ITALY 3SIEMENS ICN S.P.A., MILAN, ITALY
4AUSTRIA MIKRO SYSTEME INT. AG, UNTERPREMSTATTEN, AUSTRIA
UNIVERSITYOFPAVIA, ITALY 6ITALTEL S.P.A,, MILAN, ITALY A LOW NOISE,WIDE
DYNAMIC RANGE, TRANSIMPEDANCEAMPLIFIER WITH AUTOMATIC GAIN CONTROL FOR
SDH/SONET (STM16/OC48) IN A 30GHZ FT BICMOS PROCESS 208
M.A.T. SANDULEANU , P. MANTEMAN2 PHILIPS RESEARCH EINDHOVEN,
THE NETHERLANDS
2PHILIPS SEMICONDUCTORS NIJMEGEN,
THE NETHERLANDS
2.3: OPTICAL IMAGE PROCESSING ANALOG PATTERN CLASSIFIER WITH FLEXIBLE
MATCHING CIRCUITRY BASED ON PRINCIPAL-AXISPROJECTION VECTOR
REPRESENTATION
212
T. YAMASAKI, K. YAMAMOTO, T. SHIBATA
THE UNIVERSITY OFTOKYO, BUNKYO-KU, JAPAN ACE16K: AN ADVANCED FOCAL-PLANE
ANALOG PROGRAMMABLE ARRAY PROCESSOR 216
G. LINAN, R. DOMINGUEZ-CASTRO, S. ESPEJO, A. RODRIGUEZ-VAZQUEZ INSTITUTO
DE MICROELECTRONICA DE SEVILLA,
SPAIN
A CURRENT-MODE 64X1 PROGRAMMABLE GABOR FILTER FOR EARLY VISION SYSTEMS
220
F. BORGHETTI1, P. MALCOVATI , F. MALOBERTI2
UNIVERSITY OF PAVIA, ITALY
2TEXAS A&M UNIVERSITY, COLLEGE STATION, TX, UNITED STATES
IMAGE 5
VIII
A LOW-POWER CMOS SILICON RETINA FOR FEATURE EXTRACTION IN REAL-TIME,
EMBEDDED SYSTEMS 224 M. BARBARO, L. RAFFO UNIVERSITY OF CAGLIARI, ITALY
A GENERAL-PURPOSE CMOS VISION CHIP WITH A PROCESSOR~PER-PIXEL SIMD ARRAY
228
P. DUDEK, P.J. HICKS
UMIST, MANCHESTER, UNITED KINGDOM
2.4: POWER CIRCUITS
A ROBUST SMART POWERBANDGAP REFERENCE CIRCUIT FOR USE IN AN AUTOMOTIVE
ENVIRONMENT 232 W. HORN, H. ZITTA INFINEON TECHNOLOGIES MDCA, VILLACH,
AUSTRIA
THERMAL DESTRUCTION TESTING: AN INDIRECT APPROACH TOA SIMPLE DYNAMIC
THERMAL MODEL OFSMART POWER SWITCHES 236
M. GLAVANOVICS, H. ZITTA INFINEON TECHNOLOGIES MDCA, VILLACH, AUSTRIA
A 250 W AUDIO AMPLIFIER WITH STRAIGHTFORWARD DIGITAL INPUT-PWM OUTPUT
CONVERSION 240
A. GROSSO , E. BOTTI1, M. GHIONI2, F. STEFANI STMICROELECTRONICS,
CORNAREDO, ITALY 2POLITECNICO DI MILANO, ITALY
2.5: MIXED SIGNAL COMMUNCIATION CIRCUITS HIGH-SPEED CMOS ANALOG VLTERBI
DETECTOR FOR 4-PAM PARTIAL RESPONSE SIGNALLING 244 B. ZAND, D. JOHNS
UNIVERSITY OFTORONTO, CANADA A LOOMB/S, 2.8V CMOS CURRENT-MODE ANALOGUE
VITERBI DECODER 248
A. DEMOSTHENOUS, J. TAYLOR UNIVERSITY COLLEGE LONDON, UNITED KINGDOM A
NEW IMPEDANCE CONTROL CIRCUIT FOR USB2.0 TRANSCEIVER 252
K.-H. KOO, J.-H. SEO, J.-W. KIM SAMSUNG ELECTRONICS, YOUNGIN-CITY, KOREA
(SOUTH) DIGITALLY TUNEABLE ON-CHIP LINE TERMINATION RESISTOR FOR
2.5GBIT/S LVDS RECEIVER IN 0.25UM STANDARD CMOS TECHNOLOGY 256
M. KUMRIC, F. EBERT, R. RAMP, K. WELCH ALCATEL SEL AG, STUTTGART,
GERMANY A FULLY INTEGRATED ANALOG FRONTEND MACRO FOR CABLE MODEM
APPLICATIONS IN 0.18JIM CMOS 260
A. WIESBAUER1, M. CLARA1, M. HARTENECK2, T. POTSCHER , C.
FLEISCHHACKER , G. KODER , C. SANDNER
INFINEON TECHNOLOGIES MDCA, VILLACH, AUSTRIA 2INFINEON TECHNOLOGIES DC,
MUNICH, GERMANY
2.6: MIXED SIGNAL SYSTEMS SMART POWER INTEGRATED CIRCUIT FOR
PIEZOCERAMIC-BASED MICROROBOT E. MONTAN6, S. BOTA, J. L6PEZ-SANCHEZ,
P. MIRIBEL-CATALA, M. PUIG-VIDAL, J. SAMITIER UNIVERSITAT DE BARCELONA,
SPAIN
264
A LUA FRONT-END FORPACEMAKER ATRIAL SENSING CHANNELS 268
L. LENTOLA , A. MOZZI , A. NEVIANI2,
A. BASCHIROTTO3
MEDICO S.P.A., RUBANO, ITALY 2UNIVERSITYOFPADOVA, ITALY
3UNIVERSITYOFLECCE, ITALY NMOS-BASED GAUSSIAN-ELEMENT-MATCHING ANALOG
ASSOCIATIVE MEMORY 272
M. OGAWA, T. SHIBATA THE UNIVERSITY OFTOKYO, BUNKYO-KU, JAPAN A LOW
POWER DIGITAL BEAMFORMER FOR HANDHELD ULTRASOUND SYSTEMS 276
V.S. GIERENZ, R. SCHWANN, T.G. NOLL UNIVERSITY OF TECHNOLOGY RWTH
AACHEN,
GERMANY NOISE-CONSTRAINED DESIGN OF RELIABLE POWER NETWORKS FOR
MIXED-POWER SUPPLY SYSTEMS 280
J. LEE1, S. KANG2
UNIVERSITY OF ILLINOIS, URBANA, IL, UNITED STATES
2UNIVERSITYOF CALIFORNIA, SANTA CRUZ, CA, UNITED STATES
2.7: BUILDING BLOCKS FOR DIGITAL SYSTEMS VLSI IMPLEMENTATION OF A HIGH
PERFORMANCE AND LOW POWER 32-BIT MULTIPLY-ACCUMULATE UNIT 284
Y. LIAO, D. ROBERTS, E. HOFFMAN INTEL CORPORATION, CHANDLER, AZ, UNITED
STATES
A DIRECT DIGITAL FREQUENCY SYNTHESIZER USING ANEW ROM COMPRESSION METHOD
288
B.-D. YANG , K.-H. SUNG1, Y.-J. KIM , L.-S. KIM , S.-H. HAN2, H.-K. YU2
KAIST, TAEJON, KOREA (SOUTH) 2ETRI, TAEJON, KOREA (SOUTH) DESIGN OF A
CORDIC-BASED SIN/COS
INTELLECTUAL PROPERTY (IP) USING PREDICTABLE SIGN BITS 292
T.-P. CHUANG, C.-C. HUANG, S.-F. HSIAO NATIONAL SUN YAT-SEN UNIVERSITY,
KAOHSIUNG, TAIWAN
2.8: MEMORY AND INTERFACE CIRCUITS 0.13UM32MB/64MB EMBEDDED DRAM CORE
WITH HIGH EFFICIENT REDUNDANCY AND ENHANCED TESTABILITY 296
H. KIKUKAWA , S. TOMISHIMA2, T. TSUJI2, T. KAWASAKI , S. SAKAMOTO , M.
ISHIKAWA2, W, ABE , H. TANIZAKI3, H. KATO3, T. UCHIKOBA1, T. INOKUCHI1,
M. SENOH , Y. FUKUSHIMA , M. NIIRO2, M. MARUTA2,
A. SHIBAYAMA , T. OOISHI2, K. TAKAHASHI , H. HIDAKA2
MATSUSHITA ELECTRIC INDUSTRIAL CO. LTD., KYOTO, JAPAN 2MITSUBISHI
ELECTRIC CORP., JAPAN 3MITSUBISHI ELECTRIC ENGINEERING CO. LTD., JAPAN
IMAGE 6
IX
A SIMPLE LOW VOLTAGE CURRENT SENSE AMPLIFIER WITH SWITCHABLE INPUT
TRANSISTOR 300 B. WICHT , D. SCHMITT-LANDSIEDEL , S. PAUL2 TECHNICAL
UNIVERSITY OFMUNICH, GERMANY
2INFINEON TECHNOLOGIES AG, MUNICH,
GERMANY A 0.8V, 9NS, 0.77MW AT 50MHZ, 128KB, FOURWAY, SET-ASSOCIATIVE,
2-LEVEL CMOS CACHE MEMORY 304
J.B. KUO , P.-F. LIN2
UNIVERSITY OF WATERLOO, CANADA
2NTUEE A HIGH-SPEED MEMORY INTERFACE CIRCUIT TOLERANT TO PVT VARIATIONS
AND CHANNEL NOISE 308 J.-Y. PARK , Y. KOO1, D.-K. JEONG ,W. KIM ,
C. YOO2, C. KIM2 SEOUL NATIONAL UNIVERSITY, KOREA (SOUTH) 2SARNSUNG
ELECTRONICS CO., KIHEUNG, KOREA
(SOUTH)
BUS DATA ENCODING WITH COUPLING-DRIVEN ADAPTIVE CODE-BOOKMETHOD FOR LOW
POWER DATA TRANSMISSION 312
S. KOMATSU, M. IKEDA, K. ASADA
UNIVERSITYOFTOKYO, BUNKYO, JAPAN
2.9: DIGITAL CIRCUITS DESIGN TECHNIQUES REDUCTION OF INTERCONNECT DELAY
BY EXPLOITING CROSS-TALK 316
S. VAN DIJK , D. HELY2
PHILIPS RESEARCH LABORATORIES, EINDHOVEN,
THE NETHERLANDS 2NATIONAL INSTITUTEOFAPPLIED SCIENCESOF
LYON, FRANCE
SPEED AND BEHAVIOUR IMPROVEMENT FOR SEMIDYNAMIC FLIP-FLOP LOGIC FAMILY
320 M. GRAZIANO, G. MASERA, G. PICCININI, M. ZAMBONI
POLITECNICO DI TORINO, ITALY
A LEAKAGE TOLERANT HIGH FAN-IN DYNAMIC CIRCUIT DESIGN TECHNIQUE 324
J.-J. KIM, K. ROY
PURDUE UNIVERSITY, WEST LAFAYETTE, IN, UNITED STATES
POWER SAVING IN CMOS USING A HALF-SWING CLOCKING SCHEME 328
M. LOEW1, H.-J. PFLEIDERER , N. BRUELS2 UNIVERSITY OFULM, GERMANY
2INFINEON TECHNOLOGIES AG, GERMANY MTCMOS SEQUENTIAL CIRCUITS 332
J. KAO, A. CHANDRAKASAN
MASSACHUSETTS INSTITUTE OFTECHNOLOGY,
CAMBRIDGE, MA, UNITED STATES
POSTERS
A MEMS-BASED ROTATIONAL ACCELEROMETER FOR HDD APPLICATIONS WITH
2.5RAD/SEC* RESOLUTION AND DIGITAL OUTPUT 336
A. GOLA .N. BAGNALASTA , P. BENDISCIOLI , E. CHIESA1, S. DELBO 1, E.
LASALANDRA , F. PASOLINI , M. TRONCONI , T. UNGARETTI1, A. BASCHIROTTO2
STMICROELECTRONICS, CORNAREDO, ITALY
2UNIVERSITY OF LECCE, ITALY 3.6 GHZ VCOS FOR MULTI-BAND GSM
TRANSCEIVERS 340
J. KUCERA, B.-U. KLEPSER
INFINEON TECHNOLOGIES, MUNICH, GERMANY INTEGRATED LC-TUNED VCO IN BICMOS
PROCESS 344 N. ITOH, S.-L ISHIZUKA, K. KATOH TOSHIBA CORPORATION,
KAWASAKI, JAPAN FAST FREQUENCY ACQUISITION PHASE-FREQUENCY DETECTORS FOR
GSA/S PHASE-LOCKED LOOPS 348
M. MANSURI , D. LIU2, C.-K. YANG UNIVERSITY OFCALIFORNIA AT LOS
ANGELES,
UNITED STATES
2STANFORD UNIVERSITY, UNITED STATES A 1.5V, 1.7MA 700 MHZ CMOS LC
OSCILLATOR WITH NO UPCONVERTED FLICKER NOISE 352
K. HOSHINO, E. HEGAZI, J. RAEL, A. ABIDI UNIVERSITY OF CALIFORNIA, LOS
ANGELES, CA, UNITED STATES
A 2.4GHZ WIDE TUNING RANGE VCO WITH AUTOMATIC LEVEL CONTROL CIRCUITRY
356
J. ROGERS , D. RAHN , C. PLETT2
SIGE SEMICONDUCTOR, OTTAWA, CANADA 2CARLETON UNIVERSITY, OTTAWA, CANADA
A WIDEBAND IMRR IMPROVING QUADRATURE MIXER/LO GENERATOR 360
P. VANCORENLAND, M. STEYAERT KATHOLIEKE UNIVERSITEIT LEUVEN, BELGIUM
A REDUNDANT-CELL-RELAY CONTINUOUS SELFCALIBRATION METHOD FOR
CURRENT-STEERING DACS 364
W. ZHANG, M. HASSOUN IOWA STATE UNIVERSITY, RICHARDSON, TX, UNITED
STATES
ALOW VOLTAGE LOW POWER HIGH PERFORMANCE FULLY INTEGRATED DTMF RECEIVER
368 D. VAZQUEZ , M.J. AVEDILLO .G. HUERTAS ,
J.M. QUINTANA ,M. PAURITSCH2, A. RUEDA , J.L. HUERTAS1
UNIVERSIDADDE SEVILLA, SPAIN 2AUSTRIA MIKRO SYSTEME INT. AG,
UNTERPREMSTATTEN, AUSTRIA A PIPELINED ANALOG-TO-DIGITAL CONVERTER FOR
LOW TEMPERATURES 372
T. MAKINIEMI1, P. KOSONEN2 NOKIA NETWORKS, ESPOO, FINLAND 2NOKIA
RESEARCH CENTER, HELSINKI, FINLAND
IMAGE 7
X
DESIGN OFAN INTEGRATED CMOS OPERATIONAL AMPLIFIER WITH LOW PROBABILITY
EMI INDUCED FAILURES 376
A. RICHELLI1, L. COLALONGO , M. QUARANTELLI2, Z.M. KOVACS-VAJNA1
UNIVERSITY OFBRESCIA, ITALY 2PDF SOLUTIONS, ITALY SIMPLE SCALABLE CMOS
LINEAR REGULATOR ARCHITECTURE 380
R. ANTHEUNIS, I. VAN LOO
PHILIPS SEMICONDUCTORS, NIJMEGEN, THE NETHERLANDS LOW SWING SIGNALING
USING A DYNAMIC DIODECONNECTED DRIVER 384
M. FERRETTI, P.A. BEEREL UNIVERSITY OF SOUTHERN CALIFORNIA, LOS ANGELES,
CA, UNITED STATES ANALYSIS OF THE FLOATING VOLTAGE TRANSFER
CHARACTERISTIC AND COMPARISON OF CIRCUIT STYLES IN PARTIALLY DEPLETED
SOI-CMOS 388
K.K. DAS, R.B. BROWN UNIVERSITY OF MICHIGAN, ANN ARBOR, MI, UNITED
STATES
AN 8X8 SUB-THRESHOLD DIGITAL CMOS CARRY SAVE ARRAY MULTIPLIER 392
B. PAUL, H. SOELEMAN, K. ROY PURDUE UNIVERSITY, WEST LAFAYETTE, IN,
UNITED STATES
EVALUATION OFSKEW TOLERANCE IN DELAYED CLOCKING SCHEME FORDYNAMIC
CIRCUITS 396 M. GARG, A. KATOCH PHILIPS RESEARCH LABORATORIES,
EINDHOVEN,
THE NETHERLANDS
CONFIGURABLE AREA-IO MEMORY FOR SYSTEM-INA-PACKAGE (SIP) 400
M. WANG , K. SUZUKI , W. DAI , A. SAKAI2, K. WATANABE3
UNIVERSITY OF CALIFORNIA, SANTA CRUZ, CA, UNITED STATES
2SANYO ELECTRIC CO., LTD., JAPAN 3TOKYO INSTITUTE OFTECHNOLOGY, JAPAN
CODE MEMORY COMPRESSION WITH ONLINE DECOMPRESSION 404
C. PIGUET, P. VOLET, J.-M. MASGONTY, F. RAMPOGNA, P. MARCHAL CSEM,
NEUCHATEL, SWITZERLAND A FLEXIBLE DATAPATH GENERATOR FOR PHYSICAL
ORIENTED DESIGN 408
O. WEIFL, M. GANSEN, T.G. NOLL UNIVERSITY OF TECHNOLOGY RWTH, AACHEN,
GERMANY BUILT-IN SELF-REPAIR IC LOGIC WITH AREA OPTIMIZED
ERROR-CORRECTING CODES 412
R. KLEIHORST, N. BENSCHOP PHILIPS RESEARCH LABORATORIES, EINDHOVEN, THE
NETHERLANDS A 30 MHZ DDS CLOCK GENERATOR WITH 8-BIT, 130 PS DELAY
GENERATOR AND -50 DBC SPURIOUS LEVEL 416 A. HEISKANEN, A. MANTYNIEMI, T.
RAHKONEN UNIVERSITY OF OULU, FINLAND
A TRUE IV CMOS LOG-DOMAIN ANALOG HEARING-AID-ON-A-CHIP 420
F. SERRA-GRAELLS1, L. G6MEZ2, 6. FARRES
CENTRO NACIONAL DE MICROELECTR6NICA, BELLATERRA, SPAIN 2MICROSON S.A.,
BARCELONA, SPAIN ANALYZING HETEROGENEOUS SYSTEM ARCHITECTURES
BY MEANS OF COST FUNCTIONS: A COMPARATIVE STUDY FOR BASIC OPERATIONS 424
H. BLUME, H.T. FELDKAMPER, H. HUBERT, T.G. NOLL
UNIVERSITY OFTECHNOLOGY RWTH, AACHEN,
GERMANY A MICROCONTROLLER EMBEDDED ASIC FOR AN IMPLANTABLE
ELECTRO-NEURAL STIMULATOR 428
C. HITZELBERGER , Y. MANOLI , R. HAKENES3, S. GROB3
UNIVERSITY OF SAARLAND, SAARBRUECKEN,
GERMANY 2MICRONAS GMBH, FREIBURG, GERMANY 3NETFAB GMBH, SAARBRUECKEN,
GERMANY A 2.4-GHZ SINGLE-POLE DOUBLE-THROW T/R SWITCH WITH 0.8-DB
INSERTION LOSS
IMPLEMENTED IN A CMOS PROCESS 432
F.-J. HUANG, K. O
UNIVERSITY OF FLORIDA, GAINESVILLE, FL, UNITED STATES
DESIGN AND ANALYSIS METHODOLOGY FOR A BLUETOOTH SUB-MICRON CMOS PA 436
V. KNOPIK .D. GERNA , D. BELOT , M. CASTAGNE2, D. GASQUET2, L. NATIVEL2
STMICROELECTRONICS, CROLLES, FRANCE 2UNIVERSITYOF MONTPELLIER II,
FRANCE PERFORMANCE STUDY OF CMOS POWER AMPLIFIERS 440
K. MERTENS, P. REYNAERT, M. STEYAERT KATHOLIEKE UNIVERSITEIT LEUVEN,
BELGIUM A LOW VOLTAGE, LOW POWER RF CMOS LNA FOR BLUETOOTH APPLICATIONS
USING TRANSMISSION LINE TRANSFORMER 444
B. TOOLE, C. PLETT CARLETON UNIVERSITY, OTTAWA, CANADA CREATING FLEXIBLE
ANALOGUE IP BLOCKS 448 R. CASTRO-LOPEZ, F.V. FERNANDEZ,
M. DELGADO-RESTITUTO, F. MEDEIRO, A. RODRIGUEZ-VAZQUEZ IMSE-CNM,
SEVILLA, SPAIN A SILICON EFFICIENT HIGH SPEED L = 3 RATE 1/2
CONVOLUTIONAL DECODER USING RECURRENT NEURAL NETWORKS 452
A. RANTALA, S. VATUNEN, T. HARINEN, M. ABERG VTT ELECTRONICS, FINLAND
IP-REUSABLE 32-BIT VLIW RISE CORE 456 F. CARNPI , R. GUERRIERI , R.
CANEGALLO2
UNIVERSITYOF BOLOGNA, ITALY 2ST MICROELECTRONICS, ITALY
IMAGE 8
XI
3.1: INTEGRATED MICROSYSTEMS A SMARTWIND SENSOR USING TIME-MULTIPLEXED
THERMAL SIGMA-DELTA MODULATORS 460
K. MAKINWA, J. HUIJSING DELFT UNIVERSITY OF TECHNOLOGY, THE NETHERLANDS
A MONOLITHIC POSITIONING SYSTEM 464
R. WUNDERLICH, C. THOMAS, K. SCHUMACHER UNIVERSITY OF DORTMUND, GERMANY
AN INTEGRATED CMOS MICROSYSTEM FOR NMR APPLICATIONS 468
J. FROUNCHI, G. BOERO, B. FURRER, P.-A. BESSE, R.S. POPOVIC SWISS
FEDERAL INSTITUTE OFTECHNOLOGY, LAUSANNE, SWITZERLAND
3.2: IP-BLOCKS FOR TELECOMMUNICATIONS LOW-COST IP-BLOCKS FOR UMTS TURBO
DECODERS 472 G. MASERA, M. MAZZA, G. PICCININI, F. VIGLIONE, M. ZAMBONI
POLITECNICO DI TORINO, ITALY SCALABLE, POWER AND AREA EFFICIENT HIGH
THROUGHPUT VITERBI DECODER IMPLEMENTATIONS 476
T. GEMMEKE, V.S. GIERENZ, T.G. NOLL UNIVERSITY OF TECHNOLOGY RWTH,
AACHEN,
GERMANY IMPLEMENTATION OF AN EFFICIENT LATTICE DIGITAL LADDER FILTER FOR
UP/DOWN CONVERSION IN AN OFDM-WLAN SYSTEM 480
S. SIGNELL , T. FONDEN , M. BADAROGLU2, S. DONNAY^
ERICSSON RADIO SYSTEMS, STOCKHOLM, SWEDEN 2IMEC, LEUVEN, BELGIUM
33: TRANSCEIVER BUILDING BLOCKS LOW-POWER COMPLEX POLYNOMIAL
PREDISTORTER CIRCUIT IN CMOS FOR RF POWER AMPLIFIER LINEARIZATION 484
E. WESTESSON1, L. SUNDSTROM2 LUND UNIVERSITY, SWEDEN 2ERICSSON MOBILE
COMMUNICATIONS AB, LUND, SWEDEN A CMOS AGC-LESS IF STRIP FOR BLUETOOTH
488
V. PRODANOV, G. PALASKAS, J. GLAS, V. BOCCUZZI
AGERE SYSTEMS, MURRAY HILL, NJ, UNITED STATES
GSM/DCS1800 DUAL BAND DIRECT-CONVERSION TRANSCEIVER IC WITH A DC OFFSET
CALIBRATION
SYSTEM 492
S. TANAKA , T. YAMAWAKI1, K. TAKIKAWA ,
N. HAYASHI , I. OHNO1, T. WAKUTA1, S. TAKAHASHI1, M. KASAHARA1, B.
HENSHAW2 HITACHI. LTD, JAPAN 2TTP COMMUNICATION LTD.
3.4: VCO CIRCUITS
A CMOS 10 GHZ VOLTAGE CONTROLLED LCOSCILLLATOR WITH INTEGRATED HIGH-Q
INDUCTOR W. DE COCK, M. STEYAERT KATHOLIEKE UNIVERSITEIT LEUVEN, BELGIUM
496
COMPARISON OF CMOS VCOS FOR UMTS TUNED BY STANDARD AND NOVEL VARACTORS
IN STANDARD 0.25UM TECHNOLOGY 500
J. MAGET1, M. TIEBOUT1, R. KRAUS2
INFINEON TECHNOLOGIES AG, MUNICH, GERMANY 2UNIVERSITY OF BUNDESWEHR,
NEUBIBERG, GERMANY 1GHZ TUNING RANGE, LOW PHASE NOISE, LC OSCILLATOR
WITH REPLICA BIASING COMMONMODE CONTROL AND QUADRATURE OUTPUTS 504
M.A.T. SANDULEANU1, J.P. FRAMBACRR PHILIPS RESEARCH, EINDHOVEN, THE
NETHERLANDS 2PHILIPS SEMICONDUCTORS, NIJMEGEN THE NETHERLANDS
3.5: OSCILLATORS AND SYNTHESIZERS A FULLY INTEGRATED 2.4GHZ LC-VCO
FREQUENCY SYNTHESIZER WITH 3.5PS JITTER IN 0.18JIM STANDARD DIGITAL CMOS
COPPER TECHNOLOGY 508
N. DA DALT, S. DERKSEN, P. GRECO, C. SANDNER, H. SCHMID, K. STROHMAYER
INFINEON TECHNOLOGIES AUSTRIA, VILLACH, AUSTRIA
A LOW PHASENOISE, DIFFERENTIALLY TUNED, 1.8GHZ POWER VCO WITH AN
ESD-COMPATIBLE 14DBM OUTPUT STAGE IN STANDARD DIGITAL CMOS 512
T. LIEBERMANN, M. TIEBOUT INFINEON TECHNOLOGIES AG, MUNICH, GERMANY 1200
MHZ FULLY INTEGRATED VCO WITH TURBO-CHARGER TECHNIQUE 516
N. ITOH, S.-I. ISHIZUKA TOSHIBA CORPORATION, KAWASAKI, JAPAN
3.7: BAND PASS SIGMA DELTA A FOURTH-ORDER BANDPASS DELTA-SIGMA MODULATOR
USING SECOND-ORDERBANDPASS NOISE-SHAPING DYNAMIC ELEMENT MATCHING 520
T. UENO , A. YASUDA2, T. YAMAJI , T. ITAKURA TOSHIBA CORPORATION,
KAWASAKI, JAPAN 2TEXAS INSTRUMENTS JAPAN LIMITED A 1.2V DIRECT
BACKGROUND DIGITAL TUNED CONTINUOUS-TIME BANDPASS SIGMA-DELTA MODULATOR
524
H. HUANG, E. LEE IOWA STATE UNIVERSITY, AMES, IOWA, UNITED STATES A
80MHZ BAND-PASS DELTA-SIGMA MODULATOR FOR A 100MHZ IF-RECEIVER 528
T. SALO1, SA. LINDFORS2, K. HALONEN HELSINKI UNIVERSITY OF TECHNOLOGY,
ESPOO, FINLAND
2ROYAL INSTITUTE OF TECHNOLOGY
IMAGE 9
XII
3.8: SIGMA DELTA CONVERTERS A 1-V, 10-MHZ CLOCK-RATE, 13-BIT CMOS
DELTA-SIGMA MODULATOR USING UNITY-GAINRESET OPAMPS 532
M. KESKIN, U.-K. MOON, G. TEMES OREGON STATE UNIVERSITY, CORVALLIS, OR,
UNITED STATES
A 12-BIT POWER EFFICIENT CONTINUOUS-TIME SIGMA-DELTA MODULATOR WITH
250UW POWER CONSUMPTION 536
F. GERFERS, M. ORTMANNS, Y. MANOLI
UNIVERSITYOF SAARLAND, SAARBRUECKEN,
GERMANY A 98DB 3.3V 28MW-PER-CHANNEL MULTIBIT AUDIO DAC IN A STANDARD
0.35UM CMOS TECHNOLOGY 540
M. ANNOVAZZI , V. COLONNA , G. GANDOLFI , A. BASCHIROTTO2
STMICROELECTRONICS, CORNAREDO, ITALY
2UNTVERSITY OF LECCE, ITALY
3.9: DATA CONVERTERS
A 3.2-MA 6-BIT PIPELINED A/D CONVERTER FOR A BLUETOOTH1 RF TRANSCEIVER
544
J. KUDOH , T. MATSUURA , E. IMAIZUMI2
HITACHI LTD., GUNMA-KEN, JAPAN 2HITACHI ULSI SYSTEMS CO.,LTD,TOKYO,
JAPAN A GSM RECEIVER BASE BAND IN 0.25U, 1.8V FULLY DEPLETED SOI
INCLUDING A 4 ORDER SERIAL SIGMA-DELTA A/D CONVERTER 548
E. COMPAGNE , J. SEVENHANS2, C. RAYNAUD3
DOLPHIN INTEGRATION, MEYLAN, FRANCE 2ALCATEL, ANTWERPEN, BELGIUM
3LETI-CEA, GRENOBLE, FRANCE HISTOGRAM BASED CORRECTION OF MATCHING
ERRORS IN SUBRANGED ADC 552
J. ELBORNSSON , J.-E. EKLUND2
LINKSPING UNIVERSITY, SWEDEN 2ERICSSON MICROELECTRONICSAB, LINKSPING,
SWEDEN
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author_corporate | ESSCIRC Villach |
author_corporate_role | aut |
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spelling | ESSCIRC 27 2001 Villach Verfasser (DE-588)1902446-0 aut Proceedings of the 27th European Solid-State Circuits Conference Technikum Kärnten, Carinthia Tech Institute, Villach, Austria, 18 - 20 September 2001 ed. by F. Dielacher ... ESSCIRC '2001 [S.l.] Frontier Group 2001 XII, 558 S. Ill., graph. Darst. txt rdacontent n rdamedia nc rdacarrier Halbleiterschaltung (DE-588)4158811-3 gnd rswk-swf Integrierte Schaltung (DE-588)4027242-4 gnd rswk-swf (DE-588)1071861417 Konferenzschrift 2001 Villach gnd-content Halbleiterschaltung (DE-588)4158811-3 s DE-604 Integrierte Schaltung (DE-588)4027242-4 s Dielacher, Franz Sonstige oth GBV Datenaustausch application/pdf http://bvbr.bib-bvb.de:8991/F?func=service&doc_library=BVB01&local_base=BVB01&doc_number=009750462&sequence=000001&line_number=0001&func_code=DB_RECORDS&service_type=MEDIA Inhaltsverzeichnis |
spellingShingle | Proceedings of the 27th European Solid-State Circuits Conference Technikum Kärnten, Carinthia Tech Institute, Villach, Austria, 18 - 20 September 2001 Halbleiterschaltung (DE-588)4158811-3 gnd Integrierte Schaltung (DE-588)4027242-4 gnd |
subject_GND | (DE-588)4158811-3 (DE-588)4027242-4 (DE-588)1071861417 |
title | Proceedings of the 27th European Solid-State Circuits Conference Technikum Kärnten, Carinthia Tech Institute, Villach, Austria, 18 - 20 September 2001 |
title_alt | ESSCIRC '2001 |
title_auth | Proceedings of the 27th European Solid-State Circuits Conference Technikum Kärnten, Carinthia Tech Institute, Villach, Austria, 18 - 20 September 2001 |
title_exact_search | Proceedings of the 27th European Solid-State Circuits Conference Technikum Kärnten, Carinthia Tech Institute, Villach, Austria, 18 - 20 September 2001 |
title_full | Proceedings of the 27th European Solid-State Circuits Conference Technikum Kärnten, Carinthia Tech Institute, Villach, Austria, 18 - 20 September 2001 ed. by F. Dielacher ... |
title_fullStr | Proceedings of the 27th European Solid-State Circuits Conference Technikum Kärnten, Carinthia Tech Institute, Villach, Austria, 18 - 20 September 2001 ed. by F. Dielacher ... |
title_full_unstemmed | Proceedings of the 27th European Solid-State Circuits Conference Technikum Kärnten, Carinthia Tech Institute, Villach, Austria, 18 - 20 September 2001 ed. by F. Dielacher ... |
title_short | Proceedings of the 27th European Solid-State Circuits Conference |
title_sort | proceedings of the 27th european solid state circuits conference technikum karnten carinthia tech institute villach austria 18 20 september 2001 |
title_sub | Technikum Kärnten, Carinthia Tech Institute, Villach, Austria, 18 - 20 September 2001 |
topic | Halbleiterschaltung (DE-588)4158811-3 gnd Integrierte Schaltung (DE-588)4027242-4 gnd |
topic_facet | Halbleiterschaltung Integrierte Schaltung Konferenzschrift 2001 Villach |
url | http://bvbr.bib-bvb.de:8991/F?func=service&doc_library=BVB01&local_base=BVB01&doc_number=009750462&sequence=000001&line_number=0001&func_code=DB_RECORDS&service_type=MEDIA |
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