Hybrid parallel execution model for logic-based specification languages:
Gespeichert in:
1. Verfasser: | |
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Format: | Buch |
Sprache: | English |
Veröffentlicht: |
Singapore [u.a.]
World Scientific
2001
|
Schriftenreihe: | Series on software engineering and knowledge engineering
10 |
Schlagworte: | |
Beschreibung: | XII, 214 S. graph. Darst. |
ISBN: | 9810240961 |
Internformat
MARC
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035 | |a (DE-599)BVBBV014017488 | ||
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041 | 0 | |a eng | |
049 | |a DE-739 | ||
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100 | 1 | |a Tsai, Jeffrey J. P. |e Verfasser |4 aut | |
245 | 1 | 0 | |a Hybrid parallel execution model for logic-based specification languages |c Jeffrey J. P. Tsai ; Bing Li |
264 | 1 | |a Singapore [u.a.] |b World Scientific |c 2001 | |
300 | |a XII, 214 S. |b graph. Darst. | ||
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650 | 4 | |a Computer hardware description languages | |
650 | 4 | |a System design | |
700 | 1 | |a Li, Bing |e Sonstige |4 oth | |
830 | 0 | |a Series on software engineering and knowledge engineering |v 10 |w (DE-604)BV009766204 |9 10 | |
999 | |a oai:aleph.bib-bvb.de:BVB01-009597694 |
Datensatz im Suchindex
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any_adam_object | |
author | Tsai, Jeffrey J. P. |
author_facet | Tsai, Jeffrey J. P. |
author_role | aut |
author_sort | Tsai, Jeffrey J. P. |
author_variant | j j p t jjp jjpt |
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classification_rvk | ST 150 |
ctrlnum | (OCoLC)48251272 (DE-599)BVBBV014017488 |
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dewey-hundreds | 600 - Technology (Applied sciences) |
dewey-ones | 621 - Applied physics |
dewey-raw | 621.39/2 |
dewey-search | 621.39/2 |
dewey-sort | 3621.39 12 |
dewey-tens | 620 - Engineering and allied operations |
discipline | Informatik Elektrotechnik / Elektronik / Nachrichtentechnik |
format | Book |
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id | DE-604.BV014017488 |
illustrated | Illustrated |
indexdate | 2024-07-09T18:56:11Z |
institution | BVB |
isbn | 9810240961 |
language | English |
oai_aleph_id | oai:aleph.bib-bvb.de:BVB01-009597694 |
oclc_num | 48251272 |
open_access_boolean | |
owner | DE-739 |
owner_facet | DE-739 |
physical | XII, 214 S. graph. Darst. |
publishDate | 2001 |
publishDateSearch | 2001 |
publishDateSort | 2001 |
publisher | World Scientific |
record_format | marc |
series | Series on software engineering and knowledge engineering |
series2 | Series on software engineering and knowledge engineering |
spelling | Tsai, Jeffrey J. P. Verfasser aut Hybrid parallel execution model for logic-based specification languages Jeffrey J. P. Tsai ; Bing Li Singapore [u.a.] World Scientific 2001 XII, 214 S. graph. Darst. txt rdacontent n rdamedia nc rdacarrier Series on software engineering and knowledge engineering 10 Computer hardware description languages System design Li, Bing Sonstige oth Series on software engineering and knowledge engineering 10 (DE-604)BV009766204 10 |
spellingShingle | Tsai, Jeffrey J. P. Hybrid parallel execution model for logic-based specification languages Series on software engineering and knowledge engineering Computer hardware description languages System design |
title | Hybrid parallel execution model for logic-based specification languages |
title_auth | Hybrid parallel execution model for logic-based specification languages |
title_exact_search | Hybrid parallel execution model for logic-based specification languages |
title_full | Hybrid parallel execution model for logic-based specification languages Jeffrey J. P. Tsai ; Bing Li |
title_fullStr | Hybrid parallel execution model for logic-based specification languages Jeffrey J. P. Tsai ; Bing Li |
title_full_unstemmed | Hybrid parallel execution model for logic-based specification languages Jeffrey J. P. Tsai ; Bing Li |
title_short | Hybrid parallel execution model for logic-based specification languages |
title_sort | hybrid parallel execution model for logic based specification languages |
topic | Computer hardware description languages System design |
topic_facet | Computer hardware description languages System design |
volume_link | (DE-604)BV009766204 |
work_keys_str_mv | AT tsaijeffreyjp hybridparallelexecutionmodelforlogicbasedspecificationlanguages AT libing hybridparallelexecutionmodelforlogicbasedspecificationlanguages |