Timing estimation and optimization in embedded system design:
Gespeichert in:
| 1. Verfasser: | |
|---|---|
| Format: | Abschlussarbeit Buch |
| Sprache: | German |
| Veröffentlicht: |
2000
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| Schlagworte: | |
| Online-Zugang: | Inhaltsverzeichnis |
| Beschreibung: | X, 106 S. graph. Darst. |
Internformat
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Datensatz im Suchindex
| _version_ | 1812460895833423872 |
|---|---|
| adam_text |
CONTENTS
1 INTRODUCTION 1
1.1 EMBEDDED SYSTEM DESIGN. 1
1.2 OVERVIEW. 2
2 BACKGROUND 5
2.1 DEFINITIONS.
7
. 5
2.2 SOME EBS DESIGN FLOWS. 6
2.2.1 AN ESTABLISHED DESIGN FLOW IN SMALL INDUSTRY. 6
2.2.2 OBJECT-ORIENTED DESIGN FLOWS. 7
2.2.3 SE DESIGN FLOW. 8
2.3 RELATED WORK. 9
2.4 EBS EXAMPLES. 12
3 TIMING ESTIMATION 15
3.1 INTRODUCTION. 15
3.2 TIMING ESTIMATIONS IN CASTLE. 16
3.2.1
KUKL
.17
3.2.2 GAX. 18
3.2.3 MOVE.'. 18
3.3 THE
KUKL
FLOW. 19
3.3.1 EXECUTION TIME MODEL. 19
3.3.2
KUKL
WORKFLOW.20
3.4 RESULTS. 28
4 SEMI-AUTOMATIC INSTRUCTION SET CHARACTERIZATION 33
4.1 INTRODUCTION.33
4.2 A TEST BENCH FOR A GENERIC INSTRUCTION SET.33
4.3 IMPLEMENTATION.36
4.4 RESULTS.38
4.5 LIMITS OF EXACTNESS.41
4.6 CONCLUSION.46
V
BIBLIOGRAFISCHE INFORMATIONEN
HTTP://D-NB.INFO/960727566
VI
CONTENTS
5 ACCELERATING EBSS DURING DESIGN 47
5.1 INTRODUCTION.47
5.2
TOOLS AND METRICS
IN
THE
CASTLE
WORKBENCH .
50
5.3 SW ACCELERATION .54
5.3.1 ALGORITHM SELECTION.58
5.3.2 ALGORITHM TRANSFORMATION.63
5.3.3 A TRACING METRIC.67
5.3.4 DATA REPRESENTATION AND TRANSFORMATION.70
5.3.5 IMPLEMENTATION OPTIMIZATION.77
5.4 HW ACCELERATION.80
5.5 ACCELERATION DURING SYSTEM REQUIREMENT
ANALYSIS.85
5.6 SUMMARY. 88
6 CONCLUSION 91
A PROOFS 93
B STATISTICS 97 |
| any_adam_object | 1 |
| author | Plöger, Paul G. 1957- |
| author_GND | (DE-588)122669169 |
| author_facet | Plöger, Paul G. 1957- |
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| illustrated | Illustrated |
| indexdate | 2024-10-09T18:10:04Z |
| institution | BVB |
| language | German |
| oai_aleph_id | oai:aleph.bib-bvb.de:BVB01-009258695 |
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| physical | X, 106 S. graph. Darst. |
| publishDate | 2000 |
| publishDateSearch | 2000 |
| publishDateSort | 2000 |
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| spelling | Plöger, Paul G. 1957- Verfasser (DE-588)122669169 aut Timing estimation and optimization in embedded system design vorgelegt von Paul Gerhard Plöger 2000 X, 106 S. graph. Darst. txt rdacontent n rdamedia nc rdacarrier Cottbus, Techn. Univ., Diss., 2000 Hochschulschrift gtt Datenfluss (DE-588)4191571-9 gnd rswk-swf Kontrollfluss (DE-588)4131769-5 gnd rswk-swf Eingebettetes System (DE-588)4396978-1 gnd rswk-swf HOL (DE-588)4335765-9 gnd rswk-swf Hardwareentwurf (DE-588)4159103-3 gnd rswk-swf Timingsimulation (DE-588)4388820-3 gnd rswk-swf Softwareentwicklung (DE-588)4116522-6 gnd rswk-swf Codegenerierung (DE-588)4010346-8 gnd rswk-swf (DE-588)4113937-9 Hochschulschrift gnd-content Eingebettetes System (DE-588)4396978-1 s Hardwareentwurf (DE-588)4159103-3 s Softwareentwicklung (DE-588)4116522-6 s DE-604 Datenfluss (DE-588)4191571-9 s Kontrollfluss (DE-588)4131769-5 s Timingsimulation (DE-588)4388820-3 s Codegenerierung (DE-588)4010346-8 s HOL (DE-588)4335765-9 s DNB Datenaustausch application/pdf http://bvbr.bib-bvb.de:8991/F?func=service&doc_library=BVB01&local_base=BVB01&doc_number=009258695&sequence=000001&line_number=0001&func_code=DB_RECORDS&service_type=MEDIA Inhaltsverzeichnis |
| spellingShingle | Plöger, Paul G. 1957- Timing estimation and optimization in embedded system design Hochschulschrift gtt Datenfluss (DE-588)4191571-9 gnd Kontrollfluss (DE-588)4131769-5 gnd Eingebettetes System (DE-588)4396978-1 gnd HOL (DE-588)4335765-9 gnd Hardwareentwurf (DE-588)4159103-3 gnd Timingsimulation (DE-588)4388820-3 gnd Softwareentwicklung (DE-588)4116522-6 gnd Codegenerierung (DE-588)4010346-8 gnd |
| subject_GND | (DE-588)4191571-9 (DE-588)4131769-5 (DE-588)4396978-1 (DE-588)4335765-9 (DE-588)4159103-3 (DE-588)4388820-3 (DE-588)4116522-6 (DE-588)4010346-8 (DE-588)4113937-9 |
| title | Timing estimation and optimization in embedded system design |
| title_auth | Timing estimation and optimization in embedded system design |
| title_exact_search | Timing estimation and optimization in embedded system design |
| title_full | Timing estimation and optimization in embedded system design vorgelegt von Paul Gerhard Plöger |
| title_fullStr | Timing estimation and optimization in embedded system design vorgelegt von Paul Gerhard Plöger |
| title_full_unstemmed | Timing estimation and optimization in embedded system design vorgelegt von Paul Gerhard Plöger |
| title_short | Timing estimation and optimization in embedded system design |
| title_sort | timing estimation and optimization in embedded system design |
| topic | Hochschulschrift gtt Datenfluss (DE-588)4191571-9 gnd Kontrollfluss (DE-588)4131769-5 gnd Eingebettetes System (DE-588)4396978-1 gnd HOL (DE-588)4335765-9 gnd Hardwareentwurf (DE-588)4159103-3 gnd Timingsimulation (DE-588)4388820-3 gnd Softwareentwicklung (DE-588)4116522-6 gnd Codegenerierung (DE-588)4010346-8 gnd |
| topic_facet | Hochschulschrift Datenfluss Kontrollfluss Eingebettetes System HOL Hardwareentwurf Timingsimulation Softwareentwicklung Codegenerierung |
| url | http://bvbr.bib-bvb.de:8991/F?func=service&doc_library=BVB01&local_base=BVB01&doc_number=009258695&sequence=000001&line_number=0001&func_code=DB_RECORDS&service_type=MEDIA |
| work_keys_str_mv | AT plogerpaulg timingestimationandoptimizationinembeddedsystemdesign |