Introductory VHDL: From Simulation to Synthesis
Gespeichert in:
| 1. Verfasser: | |
|---|---|
| Format: | Buch |
| Sprache: | English |
| Veröffentlicht: |
Upper Saddle River, NJ
Prentice Hall
2000
|
| Schriftenreihe: | Xilinx design series
|
| Schlagworte: | |
| Beschreibung: | Includes bibliographical references and index |
| Beschreibung: | XIX, 401 S. Ill., graph. Darst. 2 CDs (12 cm) |
| ISBN: | 0130809829 |
Internformat
MARC
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| 001 | BV013392094 | ||
| 003 | DE-604 | ||
| 005 | 20140225 | ||
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| 020 | |a 0130809829 |9 0-13-080982-9 | ||
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| 040 | |a DE-604 |b ger |e rakwb | ||
| 041 | 0 | |a eng | |
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| 050 | 0 | |a TK7885.7 | |
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| 084 | |a ST 250 |0 (DE-625)143626: |2 rvk | ||
| 084 | |a ZN 5620 |0 (DE-625)157469: |2 rvk | ||
| 100 | 1 | |a Yalamanchili, Sudhakar |e Verfasser |4 aut | |
| 245 | 1 | 0 | |a Introductory VHDL |b From Simulation to Synthesis |c Sudhakar Yalamanchili |
| 264 | 1 | |a Upper Saddle River, NJ |b Prentice Hall |c 2000 | |
| 300 | |a XIX, 401 S. |b Ill., graph. Darst. |e 2 CDs (12 cm) | ||
| 336 | |b txt |2 rdacontent | ||
| 337 | |b n |2 rdamedia | ||
| 338 | |b nc |2 rdacarrier | ||
| 490 | 0 | |a Xilinx design series | |
| 500 | |a Includes bibliographical references and index | ||
| 650 | 4 | |a VHDL (Computer hardware description language) | |
| 650 | 0 | 7 | |a VHDL |0 (DE-588)4254792-1 |2 gnd |9 rswk-swf |
| 655 | 7 | |0 (DE-588)4123623-3 |a Lehrbuch |2 gnd-content | |
| 689 | 0 | 0 | |a VHDL |0 (DE-588)4254792-1 |D s |
| 689 | 0 | |5 DE-604 | |
| 999 | |a oai:aleph.bib-bvb.de:BVB01-009135647 | ||
Datensatz im Suchindex
| _version_ | 1804128173798981632 |
|---|---|
| any_adam_object | |
| author | Yalamanchili, Sudhakar |
| author_facet | Yalamanchili, Sudhakar |
| author_role | aut |
| author_sort | Yalamanchili, Sudhakar |
| author_variant | s y sy |
| building | Verbundindex |
| bvnumber | BV013392094 |
| callnumber-first | T - Technology |
| callnumber-label | TK7885 |
| callnumber-raw | TK7885.7 |
| callnumber-search | TK7885.7 |
| callnumber-sort | TK 47885.7 |
| callnumber-subject | TK - Electrical and Nuclear Engineering |
| classification_rvk | ST 250 ZN 5620 |
| ctrlnum | (OCoLC)243614207 (DE-599)BVBBV013392094 |
| dewey-full | 621.39/2 |
| dewey-hundreds | 600 - Technology (Applied sciences) |
| dewey-ones | 621 - Applied physics |
| dewey-raw | 621.39/2 |
| dewey-search | 621.39/2 |
| dewey-sort | 3621.39 12 |
| dewey-tens | 620 - Engineering and allied operations |
| discipline | Informatik Elektrotechnik / Elektronik / Nachrichtentechnik |
| format | Book |
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| id | DE-604.BV013392094 |
| illustrated | Illustrated |
| indexdate | 2024-07-09T18:45:02Z |
| institution | BVB |
| isbn | 0130809829 |
| language | English |
| lccn | 00036328 |
| oai_aleph_id | oai:aleph.bib-bvb.de:BVB01-009135647 |
| oclc_num | 243614207 |
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| physical | XIX, 401 S. Ill., graph. Darst. 2 CDs (12 cm) |
| publishDate | 2000 |
| publishDateSearch | 2000 |
| publishDateSort | 2000 |
| publisher | Prentice Hall |
| record_format | marc |
| series2 | Xilinx design series |
| spelling | Yalamanchili, Sudhakar Verfasser aut Introductory VHDL From Simulation to Synthesis Sudhakar Yalamanchili Upper Saddle River, NJ Prentice Hall 2000 XIX, 401 S. Ill., graph. Darst. 2 CDs (12 cm) txt rdacontent n rdamedia nc rdacarrier Xilinx design series Includes bibliographical references and index VHDL (Computer hardware description language) VHDL (DE-588)4254792-1 gnd rswk-swf (DE-588)4123623-3 Lehrbuch gnd-content VHDL (DE-588)4254792-1 s DE-604 |
| spellingShingle | Yalamanchili, Sudhakar Introductory VHDL From Simulation to Synthesis VHDL (Computer hardware description language) VHDL (DE-588)4254792-1 gnd |
| subject_GND | (DE-588)4254792-1 (DE-588)4123623-3 |
| title | Introductory VHDL From Simulation to Synthesis |
| title_auth | Introductory VHDL From Simulation to Synthesis |
| title_exact_search | Introductory VHDL From Simulation to Synthesis |
| title_full | Introductory VHDL From Simulation to Synthesis Sudhakar Yalamanchili |
| title_fullStr | Introductory VHDL From Simulation to Synthesis Sudhakar Yalamanchili |
| title_full_unstemmed | Introductory VHDL From Simulation to Synthesis Sudhakar Yalamanchili |
| title_short | Introductory VHDL |
| title_sort | introductory vhdl from simulation to synthesis |
| title_sub | From Simulation to Synthesis |
| topic | VHDL (Computer hardware description language) VHDL (DE-588)4254792-1 gnd |
| topic_facet | VHDL (Computer hardware description language) VHDL Lehrbuch |
| work_keys_str_mv | AT yalamanchilisudhakar introductoryvhdlfromsimulationtosynthesis |