Fundamentals of digital logic with VHDL design:
Gespeichert in:
| Hauptverfasser: | , |
|---|---|
| Format: | Buch |
| Sprache: | English |
| Veröffentlicht: |
Boston, Mass. [u.a.]
McGraw-Hill
2000
|
| Schlagworte: | |
| Beschreibung: | Computer file info: System requirements for accompanying computer disks: Use any Text Editor to open the file |
| Beschreibung: | XX, 840 S. graph. Darst. 1 CD-ROM (12 cm) |
| ISBN: | 0070125910 0070125937 |
Internformat
MARC
| LEADER | 00000nam a2200000 c 4500 | ||
|---|---|---|---|
| 001 | BV012982539 | ||
| 003 | DE-604 | ||
| 005 | 20200916 | ||
| 007 | t | ||
| 008 | 000210s2000 d||| |||| 00||| eng d | ||
| 010 | |a 99017056 | ||
| 020 | |a 0070125910 |9 0-07-012591-0 | ||
| 020 | |a 0070125937 |c CDROM |9 0-07-012593-7 | ||
| 035 | |a (OCoLC)246344509 | ||
| 035 | |a (DE-599)BVBBV012982539 | ||
| 040 | |a DE-604 |b ger |e rakwb | ||
| 041 | 0 | |a eng | |
| 049 | |a DE-Aug4 | ||
| 050 | 0 | |a TK7888.4 | |
| 050 | 0 | |a TK7888.4 .B76 2000 | |
| 082 | 0 | |a 621.39/5 | |
| 084 | |a ST 250 |0 (DE-625)143626: |2 rvk | ||
| 084 | |a ZN 5620 |0 (DE-625)157469: |2 rvk | ||
| 100 | 1 | |a Brown, Stephen D. |e Verfasser |4 aut | |
| 245 | 1 | 0 | |a Fundamentals of digital logic with VHDL design |c Stephen Brown and Zvonko Vranesic |
| 264 | 1 | |a Boston, Mass. [u.a.] |b McGraw-Hill |c 2000 | |
| 300 | |a XX, 840 S. |b graph. Darst. |e 1 CD-ROM (12 cm) | ||
| 336 | |b txt |2 rdacontent | ||
| 337 | |b n |2 rdamedia | ||
| 338 | |b nc |2 rdacarrier | ||
| 500 | |a Computer file info: System requirements for accompanying computer disks: Use any Text Editor to open the file | ||
| 650 | 4 | |a Datenverarbeitung | |
| 650 | 4 | |a Logic circuits |x Design and construction |x Data processing | |
| 650 | 4 | |a Logic design |x Data processing | |
| 650 | 4 | |a VHDL (Computer hardware description language) | |
| 650 | 0 | 7 | |a Digitaltechnik |0 (DE-588)4012303-0 |2 gnd |9 rswk-swf |
| 650 | 0 | 7 | |a VHDL |0 (DE-588)4254792-1 |2 gnd |9 rswk-swf |
| 650 | 0 | 7 | |a Logischer Entwurf |0 (DE-588)4168051-0 |2 gnd |9 rswk-swf |
| 650 | 0 | 7 | |a Logische Schaltung |0 (DE-588)4131023-8 |2 gnd |9 rswk-swf |
| 689 | 0 | 0 | |a VHDL |0 (DE-588)4254792-1 |D s |
| 689 | 0 | |5 DE-604 | |
| 689 | 1 | 0 | |a Digitaltechnik |0 (DE-588)4012303-0 |D s |
| 689 | 1 | 1 | |a Logischer Entwurf |0 (DE-588)4168051-0 |D s |
| 689 | 1 | |5 DE-604 | |
| 689 | 2 | 0 | |a Logische Schaltung |0 (DE-588)4131023-8 |D s |
| 689 | 2 | |8 1\p |5 DE-604 | |
| 700 | 1 | |a Vranesic, Zvonko |e Verfasser |4 aut | |
| 999 | |a oai:aleph.bib-bvb.de:BVB01-008844300 | ||
| 883 | 1 | |8 1\p |a cgwrk |d 20201028 |q DE-101 |u https://d-nb.info/provenance/plan#cgwrk | |
Datensatz im Suchindex
| _version_ | 1804127678621548544 |
|---|---|
| any_adam_object | |
| author | Brown, Stephen D. Vranesic, Zvonko |
| author_facet | Brown, Stephen D. Vranesic, Zvonko |
| author_role | aut aut |
| author_sort | Brown, Stephen D. |
| author_variant | s d b sd sdb z v zv |
| building | Verbundindex |
| bvnumber | BV012982539 |
| callnumber-first | T - Technology |
| callnumber-label | TK7888 |
| callnumber-raw | TK7888.4 TK7888.4 .B76 2000 |
| callnumber-search | TK7888.4 TK7888.4 .B76 2000 |
| callnumber-sort | TK 47888.4 |
| callnumber-subject | TK - Electrical and Nuclear Engineering |
| classification_rvk | ST 250 ZN 5620 |
| ctrlnum | (OCoLC)246344509 (DE-599)BVBBV012982539 |
| dewey-full | 621.39/5 |
| dewey-hundreds | 600 - Technology (Applied sciences) |
| dewey-ones | 621 - Applied physics |
| dewey-raw | 621.39/5 |
| dewey-search | 621.39/5 |
| dewey-sort | 3621.39 15 |
| dewey-tens | 620 - Engineering and allied operations |
| discipline | Informatik Elektrotechnik / Elektronik / Nachrichtentechnik |
| format | Book |
| fullrecord | <?xml version="1.0" encoding="UTF-8"?><collection xmlns="http://www.loc.gov/MARC21/slim"><record><leader>02032nam a2200553 c 4500</leader><controlfield tag="001">BV012982539</controlfield><controlfield tag="003">DE-604</controlfield><controlfield tag="005">20200916 </controlfield><controlfield tag="007">t</controlfield><controlfield tag="008">000210s2000 d||| |||| 00||| eng d</controlfield><datafield tag="010" ind1=" " ind2=" "><subfield code="a">99017056</subfield></datafield><datafield tag="020" ind1=" " ind2=" "><subfield code="a">0070125910</subfield><subfield code="9">0-07-012591-0</subfield></datafield><datafield tag="020" ind1=" " ind2=" "><subfield code="a">0070125937</subfield><subfield code="c">CDROM</subfield><subfield code="9">0-07-012593-7</subfield></datafield><datafield tag="035" ind1=" " ind2=" "><subfield code="a">(OCoLC)246344509</subfield></datafield><datafield tag="035" ind1=" " ind2=" "><subfield code="a">(DE-599)BVBBV012982539</subfield></datafield><datafield tag="040" ind1=" " ind2=" "><subfield code="a">DE-604</subfield><subfield code="b">ger</subfield><subfield code="e">rakwb</subfield></datafield><datafield tag="041" ind1="0" ind2=" "><subfield code="a">eng</subfield></datafield><datafield tag="049" ind1=" " ind2=" "><subfield code="a">DE-Aug4</subfield></datafield><datafield tag="050" ind1=" " ind2="0"><subfield code="a">TK7888.4</subfield></datafield><datafield tag="050" ind1=" " ind2="0"><subfield code="a">TK7888.4 .B76 2000</subfield></datafield><datafield tag="082" ind1="0" ind2=" "><subfield code="a">621.39/5</subfield></datafield><datafield tag="084" ind1=" " ind2=" "><subfield code="a">ST 250</subfield><subfield code="0">(DE-625)143626:</subfield><subfield code="2">rvk</subfield></datafield><datafield tag="084" ind1=" " ind2=" "><subfield code="a">ZN 5620</subfield><subfield code="0">(DE-625)157469:</subfield><subfield code="2">rvk</subfield></datafield><datafield tag="100" ind1="1" ind2=" "><subfield code="a">Brown, Stephen D.</subfield><subfield code="e">Verfasser</subfield><subfield code="4">aut</subfield></datafield><datafield tag="245" ind1="1" ind2="0"><subfield code="a">Fundamentals of digital logic with VHDL design</subfield><subfield code="c">Stephen Brown and Zvonko Vranesic</subfield></datafield><datafield tag="264" ind1=" " ind2="1"><subfield code="a">Boston, Mass. [u.a.]</subfield><subfield code="b">McGraw-Hill</subfield><subfield code="c">2000</subfield></datafield><datafield tag="300" ind1=" " ind2=" "><subfield code="a">XX, 840 S.</subfield><subfield code="b">graph. Darst.</subfield><subfield code="e">1 CD-ROM (12 cm)</subfield></datafield><datafield tag="336" ind1=" " ind2=" "><subfield code="b">txt</subfield><subfield code="2">rdacontent</subfield></datafield><datafield tag="337" ind1=" " ind2=" "><subfield code="b">n</subfield><subfield code="2">rdamedia</subfield></datafield><datafield tag="338" ind1=" " ind2=" "><subfield code="b">nc</subfield><subfield code="2">rdacarrier</subfield></datafield><datafield tag="500" ind1=" " ind2=" "><subfield code="a">Computer file info: System requirements for accompanying computer disks: Use any Text Editor to open the file</subfield></datafield><datafield tag="650" ind1=" " ind2="4"><subfield code="a">Datenverarbeitung</subfield></datafield><datafield tag="650" ind1=" " ind2="4"><subfield code="a">Logic circuits</subfield><subfield code="x">Design and construction</subfield><subfield code="x">Data processing</subfield></datafield><datafield tag="650" ind1=" " ind2="4"><subfield code="a">Logic design</subfield><subfield code="x">Data processing</subfield></datafield><datafield tag="650" ind1=" " ind2="4"><subfield code="a">VHDL (Computer hardware description language)</subfield></datafield><datafield tag="650" ind1="0" ind2="7"><subfield code="a">Digitaltechnik</subfield><subfield code="0">(DE-588)4012303-0</subfield><subfield code="2">gnd</subfield><subfield code="9">rswk-swf</subfield></datafield><datafield tag="650" ind1="0" ind2="7"><subfield code="a">VHDL</subfield><subfield code="0">(DE-588)4254792-1</subfield><subfield code="2">gnd</subfield><subfield code="9">rswk-swf</subfield></datafield><datafield tag="650" ind1="0" ind2="7"><subfield code="a">Logischer Entwurf</subfield><subfield code="0">(DE-588)4168051-0</subfield><subfield code="2">gnd</subfield><subfield code="9">rswk-swf</subfield></datafield><datafield tag="650" ind1="0" ind2="7"><subfield code="a">Logische Schaltung</subfield><subfield code="0">(DE-588)4131023-8</subfield><subfield code="2">gnd</subfield><subfield code="9">rswk-swf</subfield></datafield><datafield tag="689" ind1="0" ind2="0"><subfield code="a">VHDL</subfield><subfield code="0">(DE-588)4254792-1</subfield><subfield code="D">s</subfield></datafield><datafield tag="689" ind1="0" ind2=" "><subfield code="5">DE-604</subfield></datafield><datafield tag="689" ind1="1" ind2="0"><subfield code="a">Digitaltechnik</subfield><subfield code="0">(DE-588)4012303-0</subfield><subfield code="D">s</subfield></datafield><datafield tag="689" ind1="1" ind2="1"><subfield code="a">Logischer Entwurf</subfield><subfield code="0">(DE-588)4168051-0</subfield><subfield code="D">s</subfield></datafield><datafield tag="689" ind1="1" ind2=" "><subfield code="5">DE-604</subfield></datafield><datafield tag="689" ind1="2" ind2="0"><subfield code="a">Logische Schaltung</subfield><subfield code="0">(DE-588)4131023-8</subfield><subfield code="D">s</subfield></datafield><datafield tag="689" ind1="2" ind2=" "><subfield code="8">1\p</subfield><subfield code="5">DE-604</subfield></datafield><datafield tag="700" ind1="1" ind2=" "><subfield code="a">Vranesic, Zvonko</subfield><subfield code="e">Verfasser</subfield><subfield code="4">aut</subfield></datafield><datafield tag="999" ind1=" " ind2=" "><subfield code="a">oai:aleph.bib-bvb.de:BVB01-008844300</subfield></datafield><datafield tag="883" ind1="1" ind2=" "><subfield code="8">1\p</subfield><subfield code="a">cgwrk</subfield><subfield code="d">20201028</subfield><subfield code="q">DE-101</subfield><subfield code="u">https://d-nb.info/provenance/plan#cgwrk</subfield></datafield></record></collection> |
| id | DE-604.BV012982539 |
| illustrated | Illustrated |
| indexdate | 2024-07-09T18:37:10Z |
| institution | BVB |
| isbn | 0070125910 0070125937 |
| language | English |
| lccn | 99017056 |
| oai_aleph_id | oai:aleph.bib-bvb.de:BVB01-008844300 |
| oclc_num | 246344509 |
| open_access_boolean | |
| owner | DE-Aug4 |
| owner_facet | DE-Aug4 |
| physical | XX, 840 S. graph. Darst. 1 CD-ROM (12 cm) |
| publishDate | 2000 |
| publishDateSearch | 2000 |
| publishDateSort | 2000 |
| publisher | McGraw-Hill |
| record_format | marc |
| spelling | Brown, Stephen D. Verfasser aut Fundamentals of digital logic with VHDL design Stephen Brown and Zvonko Vranesic Boston, Mass. [u.a.] McGraw-Hill 2000 XX, 840 S. graph. Darst. 1 CD-ROM (12 cm) txt rdacontent n rdamedia nc rdacarrier Computer file info: System requirements for accompanying computer disks: Use any Text Editor to open the file Datenverarbeitung Logic circuits Design and construction Data processing Logic design Data processing VHDL (Computer hardware description language) Digitaltechnik (DE-588)4012303-0 gnd rswk-swf VHDL (DE-588)4254792-1 gnd rswk-swf Logischer Entwurf (DE-588)4168051-0 gnd rswk-swf Logische Schaltung (DE-588)4131023-8 gnd rswk-swf VHDL (DE-588)4254792-1 s DE-604 Digitaltechnik (DE-588)4012303-0 s Logischer Entwurf (DE-588)4168051-0 s Logische Schaltung (DE-588)4131023-8 s 1\p DE-604 Vranesic, Zvonko Verfasser aut 1\p cgwrk 20201028 DE-101 https://d-nb.info/provenance/plan#cgwrk |
| spellingShingle | Brown, Stephen D. Vranesic, Zvonko Fundamentals of digital logic with VHDL design Datenverarbeitung Logic circuits Design and construction Data processing Logic design Data processing VHDL (Computer hardware description language) Digitaltechnik (DE-588)4012303-0 gnd VHDL (DE-588)4254792-1 gnd Logischer Entwurf (DE-588)4168051-0 gnd Logische Schaltung (DE-588)4131023-8 gnd |
| subject_GND | (DE-588)4012303-0 (DE-588)4254792-1 (DE-588)4168051-0 (DE-588)4131023-8 |
| title | Fundamentals of digital logic with VHDL design |
| title_auth | Fundamentals of digital logic with VHDL design |
| title_exact_search | Fundamentals of digital logic with VHDL design |
| title_full | Fundamentals of digital logic with VHDL design Stephen Brown and Zvonko Vranesic |
| title_fullStr | Fundamentals of digital logic with VHDL design Stephen Brown and Zvonko Vranesic |
| title_full_unstemmed | Fundamentals of digital logic with VHDL design Stephen Brown and Zvonko Vranesic |
| title_short | Fundamentals of digital logic with VHDL design |
| title_sort | fundamentals of digital logic with vhdl design |
| topic | Datenverarbeitung Logic circuits Design and construction Data processing Logic design Data processing VHDL (Computer hardware description language) Digitaltechnik (DE-588)4012303-0 gnd VHDL (DE-588)4254792-1 gnd Logischer Entwurf (DE-588)4168051-0 gnd Logische Schaltung (DE-588)4131023-8 gnd |
| topic_facet | Datenverarbeitung Logic circuits Design and construction Data processing Logic design Data processing VHDL (Computer hardware description language) Digitaltechnik VHDL Logischer Entwurf Logische Schaltung |
| work_keys_str_mv | AT brownstephend fundamentalsofdigitallogicwithvhdldesign AT vranesiczvonko fundamentalsofdigitallogicwithvhdldesign |