Introduction to formal hardware verification:
Saved in:
| Main Author: | |
|---|---|
| Format: | Book |
| Language: | German |
| Published: |
Berlin ; Heidelberg ; New York ; Barcelona ; Hong Kong ; London
Springer
1999
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| Subjects: | |
| Online Access: | Inhaltsverzeichnis |
| Physical Description: | IX, 299 S. Ill., graph. Darst. |
| ISBN: | 3540654453 |
Staff View
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| 245 | 1 | 0 | |a Introduction to formal hardware verification |c Thomas Kropf |
| 264 | 1 | |a Berlin ; Heidelberg ; New York ; Barcelona ; Hong Kong ; London |b Springer |c 1999 | |
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| 650 | 4 | |a Circuits intégrés - Vérification | |
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Record in the Search Index
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| adam_text | THOMAS KROPF INTRODUCTION TO FORMAL HARDWARE VERIFICATION WITH 137
FIGURES AND 32 TABLES SPRINGER CONTENTS INTRODUCTION 1 1.1 SETTING THE
CONTEXT 1 1.1.1 FAULTS AND THE DESIGN CYCLE 2 1.1.2 AVOIDING DESIGN
ERRORS IN HARDWARE DESIGNS 3 1.2 CIRCUIT DESIGN 4 1.3 FIGHTING DESIGN
ERRORS 8 1.4 VERIFICATION VERSUS VALIDATION 10 1.5 HARDWARE VERIFICATION
10 1.5.1 VERIFICATION VERSUS SIMULATION 11 1.5.2 FORMAL SPECIFICATIONS
12 1.5.3 FORMAL IMPLEMENTATION DESCRIPTION 15 1.5.4 CORRECTNESS RELATION
AND PROOF 18 1.6 THE SUCCESS OF FORMAL HARDWARE VERIFICATION 21 1.6.1
PREREQUISITES FOR THE SUCCESS OF HARDWARE VERIFICATION 22 1.6.2
PROPERTIES OF SUCCESSFUL HARDWARE VERIFICATION APPROACHES. . 23 1.7
LIMITATIONS OF FORMAL HARDWARE VERIFICATION 25 1.8 THE PRAGMATIC
APPROACH - RECIPES FOR VERIFYING CIRCUITS 26 1.9 SUMMARY 26 1.10
STRUCTURE OF THE BOOK 28 1.11 LITERATURE 28 BOOLEAN FUNCTIONS 31 2.1
MOTIVATION 31 2.1.1 HARDWARE VERIFICATION TASKS 31 2.2 REPRESENTATIONS
FOR BOOLEAN FUNCTIONS 32 2.2.1 FUNCTION TABLES 33 2.2.2 PROPOSITIONAL
LOGIC 34 2.2.3 BINARY DECISION DIAGRAMS 37 VIII CONTENTS 2.3 MODELING
HARDWARE BEHAVIOR 48 2.3.1 FUNCTIONAL CIRCUIT REPRESENTATION 48 2.3.2
RELATIONAL CIRCUIT REPRESENTATION 49 2.3.3 CHARACTERISTIC FUNCTIONS 51
2.4 SPECIFICATION, PROOF GOALS AND PROOF 52 2.4.1 IMPLICIT HARDWARE
VERIFICATION 52 2.4.2 EXPLICIT HARDWARE VERIFICATION 53 2.4.3
MODEL-BASED PROOF APPROACHES 55 2.5 FURTHER DEVELOPMENTS AND TOOLS 55
2.5.1 EXTENSIONS AND VARIANTS OF BINARY DECISION DIAGRAMS 55 2.5.2
VARIABLE ORDERING HEURISTICS 71 2.6 TECHNICAL DETAILS 76 2.6.1 CLASSES
OF BOOLEAN FUNCTIONS 77 2.7 SUMMARY 80 APPROACHES BASED ON FINITE STATE
MACHINES 83 3.1 MOTIVATION 83 3.2 FORMAL BASICS 84 3.2.1 AUTOMATA FOR
FINITE SEQUENCES 85 3.2.2 AUTOMATA FOR INFINITE SEQUENCES 89 3.2.3 IMAGE
AND PRE-IMAGE OF A FUNCTION 90 3.3 MODELING HARDWARE BEHAVIOR 93 3.4
SPECIFICATION, PROOF GOAL AND PROOF 94 3.4.1 SYMBOLIC STATE MACHINE
TRAVERSAL 95 3.5 FURTHER DEVELOPMENTS 100 3.5.1 STRUCTURAL APPROACHES TO
CIRCUIT EQUIVALENCE 102 3.5.2 RELATIONAL FSM REPRESENTATION 103 3.5.3
FUNCTIONAL FSM REPRESENTATION 114 3.5.4 STATE SPACE TRAVERSAL VARIANTS
119 3.5.5 ROBDD VARIABLE ORDERING FOR FSM EQUIVALENCE CHECKING.. 132
3.5.6 VERIFICATION OF SEQUENTIAL CIRCUITS WITHOUT RESET LINES 133 3.5.7
VERIFICATION BASED TEST GENERATION FOR FABRICATION FAULTS.... 147 3.6
SUMMARY 148 PROPOSITIONAL TEMPORAL LOGICS 151 4.1 MOTIVATION 151 4.2
FORMAL BASICS 153 4.2.1 TEMPORAL STRUCTURES 153 4.2.2 THE PROPOSITIONAL
TEMPORAL LOGICS CTL*, CTL AND LTL 156 4.2.3 COMPARING CTL, LTL AND CTL*
164 4.2.4 PROOF ALGORITHMS 167 4.2.5 COMPARING PROOF COMPLEXITY 180
CONTENTS IX 4.3 MODELING HARDWARE BEHAVIOR 183 4.3.1 DESCRIBING
IMPLEMENTATIONS WITH TEMPORAL STRUCTURES 184 4.3.2 DESCRIBING
IMPLEMENTATIONS BY TEMPORAL LOGIC FORMULAS ... 188 4.4 SPECIFICATION,
PROOF GOAL AND PROOF 188 4.4.1 CREATING TEMPORAL LOGIC SPECIFICATIONS
189 4.5 FURTHER DEVELOPMENTS 192 4.5.1 INCREASING EFFICIENCY 192 4.5.2
SPECIFICATIONS 192 4.6 TECHNICAL DETAILS 194 4.6.1 PROOF ALGORITHM 194
4.7 SUMMARY 204 5 HIGHER-ORDER LOGICS 207 5.1 MOTIVATION 207 5.2 FORMAL
BASICS 209 5.2.1 FORMAL SYSTEMS 209 5.2.2 FIRST ORDER LOGIC 210 5.2.3
HIGHER-ORDER LOGIC 213 5.3 MODELING HARDWARE BEHAVIOR 225 5.3.1
REPRESENTING MODULES BY PREDICATES 225 5.3.2 MODELING STRUCTURES 227 5.4
SPECIFICATION AND PROOF 227 5.5 PERFORMING PROOFS 228 5.5.1 METHODOLOGY
FOR ESTABLISHING CIRCUIT CORRECTNESS 229 5.5.2 ABSTRACTION MECHANISMS
235 5.5.3 VERIFICATION OF GENERIC CIRCUITS 242 5.6 TECHNICAL DETAILS 245
5.6.1 SOME MORE THEORY 245 5.6.2 MODELING HARDWARE BEHAVIOR 247 5.6.3
FORMALIZING ABSTRACTION MECHANISMS 249 5.7 SUMMARY 253 APPENDIX A
MATHEMATICAL BASICS 255 APPENDIX B AXIOMS AND RULES FOR CTL* 267
APPENDIX C AXIOMS AND RULES FOR HIGHER ORDER LOGIC 271 REFERENCES 277
INDEX 291
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| discipline | Informatik Elektrotechnik Elektrotechnik / Elektronik / Nachrichtentechnik |
| format | Book |
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| indexdate | 2024-07-09T18:32:25Z |
| institution | BVB |
| isbn | 3540654453 |
| language | German |
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| physical | IX, 299 S. Ill., graph. Darst. |
| publishDate | 1999 |
| publishDateSearch | 1999 |
| publishDateSort | 1999 |
| publisher | Springer |
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| spelling | Kropf, Thomas Verfasser aut Introduction to formal hardware verification Thomas Kropf Berlin ; Heidelberg ; New York ; Barcelona ; Hong Kong ; London Springer 1999 IX, 299 S. Ill., graph. Darst. txt rdacontent n rdamedia nc rdacarrier Circuits intégrés - Vérification Circuits intégrés à très grande échelle - Conception assistée par ordinateur Integrated circuits Verification Integrated circuits Very large scale integration Computer-aided design Hardwareverifikation (DE-588)4214982-4 gnd rswk-swf Hardwareverifikation (DE-588)4214982-4 s DE-604 GBV Datenaustausch application/pdf http://bvbr.bib-bvb.de:8991/F?func=service&doc_library=BVB01&local_base=BVB01&doc_number=008644388&sequence=000001&line_number=0001&func_code=DB_RECORDS&service_type=MEDIA Inhaltsverzeichnis |
| spellingShingle | Kropf, Thomas Introduction to formal hardware verification Circuits intégrés - Vérification Circuits intégrés à très grande échelle - Conception assistée par ordinateur Integrated circuits Verification Integrated circuits Very large scale integration Computer-aided design Hardwareverifikation (DE-588)4214982-4 gnd |
| subject_GND | (DE-588)4214982-4 |
| title | Introduction to formal hardware verification |
| title_auth | Introduction to formal hardware verification |
| title_exact_search | Introduction to formal hardware verification |
| title_full | Introduction to formal hardware verification Thomas Kropf |
| title_fullStr | Introduction to formal hardware verification Thomas Kropf |
| title_full_unstemmed | Introduction to formal hardware verification Thomas Kropf |
| title_short | Introduction to formal hardware verification |
| title_sort | introduction to formal hardware verification |
| topic | Circuits intégrés - Vérification Circuits intégrés à très grande échelle - Conception assistée par ordinateur Integrated circuits Verification Integrated circuits Very large scale integration Computer-aided design Hardwareverifikation (DE-588)4214982-4 gnd |
| topic_facet | Circuits intégrés - Vérification Circuits intégrés à très grande échelle - Conception assistée par ordinateur Integrated circuits Verification Integrated circuits Very large scale integration Computer-aided design Hardwareverifikation |
| url | http://bvbr.bib-bvb.de:8991/F?func=service&doc_library=BVB01&local_base=BVB01&doc_number=008644388&sequence=000001&line_number=0001&func_code=DB_RECORDS&service_type=MEDIA |
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