Digital signal processing for multimedia systems:
Gespeichert in:
| Format: | Buch |
|---|---|
| Sprache: | English |
| Veröffentlicht: |
New York u.a.
Dekker
1999
|
| Ausgabe: | 1. print. |
| Schriftenreihe: | Signal processing
1 |
| Schlagworte: | |
| Online-Zugang: | Inhaltsverzeichnis |
| Beschreibung: | XXI, 855 S.: Ill., graph. Darst. |
| ISBN: | 0824719247 |
Internformat
MARC
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Datensatz im Suchindex
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| adam_text |
DIGITAL SIGNAL PROCESSING FOR MULTIMEDIA SYSTEMS EDITED BY KESHAB K.
PARHI UNIVERSITY OF MINNESOTA MINNEAPOLIS, MINNESOTA TAKAO NISHITANI NEC
CORPORATION SAGAMIHARA, JAPAN M A R C E L MARCEL DEKKER, INC. NEW YORK *
BASEL CONTENTS SERIES INTRODUCTION BY K. J. RAY LIU III PREFACE V PART I
SYSTEM APPLICATIONS 1. MULTIMEDIA SIGNAL PROCESSING SYSTEMS 1 TAKAO
NISHITANI 1.1 INTRODUCTION 1 1.2 DIGITIZATION OF AUDIO AND VIDEO 4 1.3
MULTIMEDIA SERVICES 10 1.4 HARDWARE IMPLEMENTATION 12 REFERENCES 16 2.
VIDEO COMPRESSION 17 KESHAB K. PARHI 2.1 INTRODUCTION 17 2.2 ENTROPY
CODING TECHNIQUES 18 2.3 TRANSFORM CODING TECHNIQUES 22 2.4 MOTION
ESTIMATION/COMPENSATION 31 2.5 MPEG-2 DIGITAL VIDEO CODING STANDARD 33
2.6 COMPUTATION DEMANDS IN VIDEO PROCESSING 38 2.7 CONCLUSIONS 40
REFERENCES 40 3. AUDIO COMPRESSION 43 AKIHIKO SUGIYAMA AND MASAHIRO
IWADARE 3.1 STANDARDIZATION ACTIVITIES OF HIFI AUDIO CODING 43 3.2 MPEG
AUDIO ALGORITHM STRUCTURE 44 3.3 MPEG-1 AUDIO ALGORITHM STRUCTURE 51 3.4
MPEG-2 AUDIO ALGORITHM STRUCTURE 60 3.5 FUTURE WORK 64 4. SYSTEM
SYNCHRONIZATION 67 HIDENOBU HARASAKI 4.1 INTRODUCTION 67 4.2 SYSTEM
CLOCK SYNCHRONIZATION OVERVIEW 68 4.3 CLOCK TRANSMISSION METHODS 71 4.4
MULTIPLEXING AND DEMULTIPLEXING 72 4.5 MPEG-2 SYSTEM 75 4.6 NETWORK
ADAPTION 77 IX X CONTENTS 4.7 ATM ADAPTION FOR LOW BITRATE SPEECH 79 4.8
MULTIPOINT COMMUNICATION 79 4.9 RESILIENCE FOR BIT ERROR AND CELL/PACKET
LOSSES 80 4.10 FUTURE WORK 81 REFERENCES 81 5. DIGITAL VERSATILE DISK 83
SHIN-ICHI TANAKA, KAZUHIRO TSUGA, AND MASAYUKI KOZUKA 5.1 INTRODUCTION
83 5.2 PHYSICAL FORMAT 84 5.3 FILE SYSTEM LAYER 93 5.4 APPLICATION LAYER
94 REFERENCES 108 6. HIGH-SPEED DATA TRANSMISSION OVER TWISTED PAIR
CHANNELS 109 NARESH R. SHANBHAG 6.1 INTRODUCTION 109 6.2 PRELIMINARIES
110 6.3 THE CHANNEL 113 6.4 THE CARRIERLESS AMPLITUDE/PHASE (CAP)
MODULATION SCHEME 116 6.5 THE HILBERT TRANSFORM BASED FSLE ARCHITECTURE
122 6.6 STRENGTH REDUCED ADAPTIVE FILTER 127 6.7 DESIGN EXAMPLES 131 6.8
CONCLUSIONS 135 7. CABLE MODEMS 139 ALAN GATHERER 7.1 INTRODUCTION 139
7.2 CABLE SYSTEM TOPOLOGIES FOR ANALOG VIDEO DISTRIBUTION 140 7.3 AN
OVERVIEW OF A CABLE MODEM SYSTEM 145 7.4 CHANNEL MODEL 152 7.5
DOWNSTREAM PHY 159 7.6 UPSTREAM PHY 168 7.7 ACKNOWLEDGEMENTS 171
REFERENCES 171 177 177 178 180 190 194 198 214 217 220 221 222 8. 8.1
8.2 8.3 8.4 8.5 8.6 8.7 8.8 8.9 8.10 WIRELESS COMMUNICATION SYSTEMS
ELVINO S. SOUSA INTRODUCTION AMPS DIGITAL WIRELESS SYSTEMS IS-54/136 GSM
CDMA POWER CONTROL HAND-OFF PROCESSES MULTIMEDIA SERVICES CONCLUSIONS
REFERENCES CONTENTS ' XI PART II PROGRAMMABLE AND CUSTOM ARCHITECTURES
AND ALGORITHMS 9. PROGRAMMABLE DSPS 225 WANDA K. GASS AND DAVID H.
BARTLEY 9.1 INTRODUCTION 225 9.2 HISTORY OF PROGRAMMABLE DSPS 225 9.3
ARCHITECTURE OVERVIEW 226 9.4 HARD REAL-TIME PROCESSING 228 9.5 LOW COST
229 9.6 MINIMUM CODE SIZE 238 9.7 LOW POWER DISSIPATION 240 9.8
SPECIALIZATION 241 9.9 SUMMARY 241 REFERENCES 242 10. RISC, VIDEO AND
MEDIA DSPS 245 ICHIRO KURODA 10.1 INTRODUCTION 245 10.2 MEDIA MPU 247
10.3 VIDEO DSP AND MEDIA PROCESSORS 260 10.4 COMPARISON OF ARCHITECTURES
266 10.5 CONCLUSIONS 269 11. WIRELESS DIGITAL SIGNAL PROCESSORS 273
INGRID VERBAUWHEDE AND MIHRAN TOURIGUIAN 11.1 INTRODUCTION 273 11.2
DIGITAL WIRELESS COMMUNICATIONS 273 11.3 WIRELESS DIGITAL SIGNAL
PROCESSORS 284 11.4 A DOMAIN SPECIFIC DSP CORE: LODE 288 11.5
CONCLUSIONS 296 REFERENCES 297 12. MOTION ESTIMATION SYSTEM DESIGN 299
YASUSHI OOI 12.1 INTRODUCTION 299 12.2 BLOCK-MATCHING MOTION ESTIMATION
301 12.3 MOTION VECTOR SEARCH ALGORITHMS 304 12.4 CIRCUIT ARCHITECTURES
FOR MOTION VECTOR SEARCH 309 12.5 VIDEO ENCODER LSI IMPLEMENTATIONS 317
12.6 MOTION ESTIMATION*OTHER TECHNIQUES 323 12.7 CONCLUDING REMARKS 325
REFERENCES 325 13. WAVELET VLSI ARCHITECTURES 329 TRACY C. DENK AND
KESHAB K. PARHI 13.1 INTRODUCTION 329 13.2 INTRODUCTION TO WAVELET
TRANSFORMS 329 13.3 THE ONE-DIMENSIONAL DWT 333 13.4 ARCHITECTURES FOR
2-D DWT 348 XII CONTENTS 13.5 SUMMARY 349 REFERENCES 351 14. DCT
ARCHITECTURES 355 CHING YU-HUNG 14.1 INTRODUCTION 355 14.2 DCT
ALGORITHMS 356 14.3 DCT ARCHITECTURES 365 14.4 CONCLUSION AND FUTURE
TRENDS 376 REFERENCES 378 15. LOSSLESS CODERS 385 MING-TING SUN, SACHIN
G. DESHPANDE, AND JENQ-NENG HWANG 15.1 INTRODUCTION 385 15.2
HUFFMAN-BASED LOSSLESS CODING 386 15.3 IMPLEMENTATION OF HUFFMAN-BASED
ENCODERS AND DECODERS 389 15.4 ARITHMETIC CODING 394 15.5 IMPLEMENTATION
OF ARITHMETIC CODERS 398 15.6 SYSTEMS ISSUES 412 15.7 SUMMARY 413
REFERENCES 413 16. VITERBI DECODERS: HIGH PERFORMANCE ALGORITHMS AND
ARCHITECTURES 417 HERBERT DAWID, OLAF JOERESSEN AND HEINRICH MEYR 16.1
INTRODUCTION 417 16.2 THE VITERBI ALGORITHM 419 16.3 THE TRANSITION
METRIC UNIT 428 16.4 THE ADD-COMPARE-SELECT UNIT 432 16.5
SYNCHRONIZATION OF CODED STREAMS 449 16.6 RECENT DEVELOPMENTS 452
REFERENCES 453 17. A REVIEW OF WATERMARKING PRINCIPLES AND PRACTICES 461
INGEMAR J. COX, MATT L. MILLER, JEAN-PAUL M. G. LINNARTZ, AND TON KALKER
17.1 INTRODUCTION 461 17.2 FRAMEWORK 463 17.3 PROPERTIES OF WATERMARKS
465 17.4 EXAMPLE OF A WATERMARKING METHOD 471 17.5 ROBUSTNESS TO SIGNAL
TRANSFORMATIONS 472 17.6 TAMPER RESISTANCE 482 17.7 SUMMARY 482
REFERENCES 482 18. SYSTOLIC RLS ADAPTIVE FILTERING 487 K. J. RAY LIU AND
AN- YEU WU 18.1 INTRODUCTION 487 18.2 SQUARE ROOT AND DIVISION FREE
GIVENS ROTATION ALGORITHM 489 CONTENTS XIII 18.3 SQUARE ROOT AND
DIVISION FREE RLS ALGORITHMS AND ARCHITECTURES 491 18.4 SQUARE ROOT AND
DIVISION FREE CRLS ALGORITHMS AND ARCHITECTURES 497 18.5 SPLIT RLS
ALGORITHM AND ARCHITECTURE 503 18.6 PERFORMANCE ANALYSIS AND SIMULATIONS
OF SPLIT RLS 507 18.7 SPLIT RLS WITH ORTHOGONAL PREPROCESSING 512 18.8
CONCLUSIONS 514 REFERENCES 517 PART III ADVANCED ARITHMETIC
ARCHITECTURES AND DESIGN METHODOLOGIES 19. PIPELINED RLS FOR VLSI:
STAR-RLS FILTERS 519 K. J. RAGHUNATH AND KESHAB K. PARHI 19.1
INTRODUCTION 519 19.2 THE QRD-RLS ALGORITHM 520 19.3 PIPELINING PROBLEM
IN QRD-RLS 522 19.4 PIPELINING FOR LOW-POWER DESIGNS 524 19.5 STAR-RLS
SYSTOLIC ARRAY ALGORITHM 525 19.6 PIPELINED STAR-RLS (PSTAR-RLS)
ARCHITECTURE 529 19.7 NUMERICAL STABILITY ANALYSIS 535 19.8
FINITE-PRECISION ANALYSIS 536 19.9 A 100 MHZ PIPELINED RLS ADAPTIVE
FILTER 541 19.10 CONCLUSIONS 544 REFERENCES 544 20. DIVISION AND SQUARE
ROOT 551 HOSAHALLI R. SRINIVAS AND KESHAB K. PARHI 20.1 INTRODUCTION 551
20.2 DIVISION 552 20.3 SQUARE ROOT 571 20.4 UNIFIED DIVISION SQUARE ROOT
ALGORITHM 578 20.5 COMPARISON 581 REFERENCES 585 21. FINITE FIELD
ARITHMETIC ARCHITECTURE 589 LEILEI SONG AND KESHAB K. PARHI 21.1
INTRODUCTION 589 21.2 MATHEMATICAL BACKGROUND 591 21.3 FINITE FIELD
ARITHMETIC ARCHITECTURES USING STANDARD BASIS 597 21.4 FINITE FIELD
DIVISION ALGORITHMS 613 21.5 FINITE FIELD ARITHMETIC USING DUAL BASIS
REPRESENTATION 614 21.6 CONCLUSIONS 617 REFERENCES 619 22. CORDIC
ALGORITHMS AND ARCHITECTURES 623 HERBERT DAWID AND HEINRICH MEYR 22.1
INTRODUCTION 623 XIV CONTENTS 22.2 THE CORDIC ALGORITHM 624 22.3
COMPUTATIONAL ACCURACY 633 22.4 SCALE FACTOR CORRECTION 637 22.5 CORDIC
ARCHITECTURES 640 22.6 CORDIC ARCHITECTURES USING REDUNDANT NUMBER
SYSTEMS 645 REFERENCES 652 23. ADVANCED SYSTOLIC DESIGN 657 DOMINIQUE
LAVENIER, PATRICE QUINTON AND SANJAY RAJOPADHYE 23.1 INTRODUCTION 657
23.2 SYSTOLIC DESIGN BY RECURRENCE TRANSFORMATIONS 659 23.3 ADVANCED
SYSTOLIC ARCHITECTURES 678 23.4 CONCLUSION 686 REFERENCES 687 24. LOW
POWER CMOS VLSI DESIGN 693 TADAHIRO KURODA AND TAKAYASU SAKURAI 24.1
INTRODUCTION 693 24.2 ANALYSIS POWER DISSIPATION 696 24.3 LOW VOLTAGE
CIRCUITS 697 24.4 CAPACITANCE REDUCTANCE 727 24.5 SUMMARY 735 REFERENCES
736 25. POWER ESTIMATION APPROACHES 741 JANARDHAN H. SATYANARAYANA AND
KESHAB K. PARHI 25.1 INTRODUCTION 741 25.2 PREVIOUS WORK 746 25.3
THEORETICAL BACKGROUND 750 25.4 HIERARCHICAL APPROACH TO POWER
ESTIMATION OF COMBINATORIAL CIRCUITS 752 25.5 POWER ESTIMATION OF
COMBINATORIAL CIRCUITS 761 25.6 EXPERIMENTAL RESULTS 762 25.7
CONCLUSIONS 769 REFERENCES 769 26. SYSTEM EXPLORATION FOR CUSTOM LOW
POWER DATA STORAGE AND TRANSFER 773 FRANCKY CATTHOOR, SVEN WUYTACK, EDDY
DE GREEF, FLORIN BALASA AND PETER SLOCK 26.1 INTRODUCTION 773 26.2
TARGET APPLICATION DOMAIN AND ARCHITECTURE STYLE 774 26.3 RELATED WORK
775 26.4 CUSTOM DATA TRANSFER AND STORAGE EXPLORATION METHODOLOGY 777
26.5 DEMONSTRATOR APPLICATION FOR ILLUSTRATING THE METHODOLOGY 790 26.6
INDUSTRIAL APPLICATION DEMONSTRATORS FOR CUSTOM REALIZATIONS 802 26.7
CONCLUSIONS 805 REFERENCES 806 CONTENTS XV 27. HARDWARE DESCRIPTION AND
SYNTHESIS OF DSP SYSTEMS 815 LORI E. LUCKE AND JUNSOO LEE 27.1
INTRODUCTION 815 27.2 HIGH LEVEL SYNTHESIS 816 27.3 TOP DOWN DESIGN 818
27.4 DESIGN ENTRY 818 27.5 FUNCTIONAL SIMULATION 826 27.6 LOGIC
SYNTHESIS 826 27.7 STRUCTURAL SIMULATION 828 27.8 DESIGN ANALYSIS 830
27.9 POWER ESTIMATION AND LOW POWER DESIGN 831 27.10 LAYOUT 836 27.11
STRUCTURAL SIMULATION 837 27.12 CONCLUSION 837 27.13 APPENDIX: VHDL CODE
FOR 4 TAP FIR FILTER 839 REFERENCES 843 INDEX 847 |
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| illustrated | Not Illustrated |
| indexdate | 2024-09-12T00:13:37Z |
| institution | BVB |
| isbn | 0824719247 |
| language | English |
| oai_aleph_id | oai:aleph.bib-bvb.de:BVB01-008596705 |
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| physical | XXI, 855 S.: Ill., graph. Darst. |
| publishDate | 1999 |
| publishDateSearch | 1999 |
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| publisher | Dekker |
| record_format | marc |
| series | Signal processing |
| series2 | Signal processing |
| spelling | Digital signal processing for multimedia systems ed. by Keshab K. Parhi ... 1. print. New York u.a. Dekker 1999 XXI, 855 S.: Ill., graph. Darst. txt rdacontent n rdamedia nc rdacarrier Signal processing 1 Digitale technieken gtt Multimedia gtt Multimídia larpcal Processamento digital de sinais larpcal Signaalverwerking gtt Multimedia systems Signal processing Digital techniques Multimedia (DE-588)4192358-3 gnd rswk-swf Digitale Signalverarbeitung (DE-588)4113314-6 gnd rswk-swf (DE-588)4113937-9 Hochschulschrift gnd-content Multimedia (DE-588)4192358-3 s Digitale Signalverarbeitung (DE-588)4113314-6 s DE-604 Parhi, Keshab K. Sonstige oth Signal processing 1 (DE-604)BV012778922 1 GBV Datenaustausch application/pdf http://bvbr.bib-bvb.de:8991/F?func=service&doc_library=BVB01&local_base=BVB01&doc_number=008596705&sequence=000001&line_number=0001&func_code=DB_RECORDS&service_type=MEDIA Inhaltsverzeichnis |
| spellingShingle | Digital signal processing for multimedia systems Signal processing Digitale technieken gtt Multimedia gtt Multimídia larpcal Processamento digital de sinais larpcal Signaalverwerking gtt Multimedia systems Signal processing Digital techniques Multimedia (DE-588)4192358-3 gnd Digitale Signalverarbeitung (DE-588)4113314-6 gnd |
| subject_GND | (DE-588)4192358-3 (DE-588)4113314-6 (DE-588)4113937-9 |
| title | Digital signal processing for multimedia systems |
| title_auth | Digital signal processing for multimedia systems |
| title_exact_search | Digital signal processing for multimedia systems |
| title_full | Digital signal processing for multimedia systems ed. by Keshab K. Parhi ... |
| title_fullStr | Digital signal processing for multimedia systems ed. by Keshab K. Parhi ... |
| title_full_unstemmed | Digital signal processing for multimedia systems ed. by Keshab K. Parhi ... |
| title_short | Digital signal processing for multimedia systems |
| title_sort | digital signal processing for multimedia systems |
| topic | Digitale technieken gtt Multimedia gtt Multimídia larpcal Processamento digital de sinais larpcal Signaalverwerking gtt Multimedia systems Signal processing Digital techniques Multimedia (DE-588)4192358-3 gnd Digitale Signalverarbeitung (DE-588)4113314-6 gnd |
| topic_facet | Digitale technieken Multimedia Multimídia Processamento digital de sinais Signaalverwerking Multimedia systems Signal processing Digital techniques Digitale Signalverarbeitung Hochschulschrift |
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