VLSI digital signal processors: an introduction to rapid prototyping and design synthesis
Gespeichert in:
| 1. Verfasser: | |
|---|---|
| Format: | Buch |
| Sprache: | English |
| Veröffentlicht: |
Boston [u.a.]
IEEE Press [u.a.]
1995
|
| Schlagworte: | |
| Beschreibung: | XV, 525 S. Ill., graph. Darst. |
| ISBN: | 0750694068 |
Internformat
MARC
| LEADER | 00000nam a2200000 c 4500 | ||
|---|---|---|---|
| 001 | BV012636834 | ||
| 003 | DE-604 | ||
| 005 | 19991110 | ||
| 007 | t | ||
| 008 | 990701s1995 ad|| |||| 00||| eng d | ||
| 020 | |a 0750694068 |9 0-7506-9406-8 | ||
| 035 | |a (OCoLC)32815245 | ||
| 035 | |a (DE-599)BVBBV012636834 | ||
| 040 | |a DE-604 |b ger |e rakddb | ||
| 041 | 0 | |a eng | |
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| 100 | 1 | |a Madisetti, Vijay K. |e Verfasser |4 aut | |
| 245 | 1 | 0 | |a VLSI digital signal processors |b an introduction to rapid prototyping and design synthesis |c Vijay K. Madisetti |
| 264 | 1 | |a Boston [u.a.] |b IEEE Press [u.a.] |c 1995 | |
| 300 | |a XV, 525 S. |b Ill., graph. Darst. | ||
| 336 | |b txt |2 rdacontent | ||
| 337 | |b n |2 rdamedia | ||
| 338 | |b nc |2 rdacarrier | ||
| 650 | 7 | |a Circuits intégrés à très grande échelle |2 ram | |
| 650 | 7 | |a Conception et construction |2 ram | |
| 650 | 7 | |a PROCESSEUR VLSI |2 inriac | |
| 650 | 7 | |a Traitement du sognal |2 ram | |
| 650 | 7 | |a VLSI |2 inriac | |
| 650 | 7 | |a architecture traitement signal |2 inriac | |
| 650 | 7 | |a conception logique |2 inriac | |
| 650 | 7 | |a méthode formelle |2 inriac | |
| 650 | 7 | |a processeur signal |2 inriac | |
| 650 | 7 | |a prototypage |2 inriac | |
| 650 | 7 | |a signal vidéo |2 inriac | |
| 650 | 4 | |a Integrated circuits |x Very large scale integration |x Design and construction | |
| 650 | 4 | |a Microprocessors |x Design and construction | |
| 650 | 4 | |a Rapid prototyping | |
| 650 | 4 | |a Signal processing |x Digital techniques | |
| 650 | 0 | 7 | |a Entwurf |0 (DE-588)4121208-3 |2 gnd |9 rswk-swf |
| 650 | 0 | 7 | |a Signalprozessor |0 (DE-588)4054943-4 |2 gnd |9 rswk-swf |
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Datensatz im Suchindex
| _version_ | 1804127293844488192 |
|---|---|
| any_adam_object | |
| author | Madisetti, Vijay K. |
| author_facet | Madisetti, Vijay K. |
| author_role | aut |
| author_sort | Madisetti, Vijay K. |
| author_variant | v k m vk vkm |
| building | Verbundindex |
| bvnumber | BV012636834 |
| callnumber-first | T - Technology |
| callnumber-label | TK7895 |
| callnumber-raw | TK7895.M5 |
| callnumber-search | TK7895.M5 |
| callnumber-sort | TK 47895 M5 |
| callnumber-subject | TK - Electrical and Nuclear Engineering |
| classification_rvk | ST 190 |
| classification_tum | ELT 517f |
| ctrlnum | (OCoLC)32815245 (DE-599)BVBBV012636834 |
| dewey-full | 621.382/2 |
| dewey-hundreds | 600 - Technology (Applied sciences) |
| dewey-ones | 621 - Applied physics |
| dewey-raw | 621.382/2 |
| dewey-search | 621.382/2 |
| dewey-sort | 3621.382 12 |
| dewey-tens | 620 - Engineering and allied operations |
| discipline | Informatik Elektrotechnik Elektrotechnik / Elektronik / Nachrichtentechnik |
| format | Book |
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| id | DE-604.BV012636834 |
| illustrated | Illustrated |
| indexdate | 2024-07-09T18:31:03Z |
| institution | BVB |
| isbn | 0750694068 |
| language | English |
| oai_aleph_id | oai:aleph.bib-bvb.de:BVB01-008585422 |
| oclc_num | 32815245 |
| open_access_boolean | |
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| owner_facet | DE-29T DE-91 DE-BY-TUM DE-83 |
| physical | XV, 525 S. Ill., graph. Darst. |
| publishDate | 1995 |
| publishDateSearch | 1995 |
| publishDateSort | 1995 |
| publisher | IEEE Press [u.a.] |
| record_format | marc |
| spelling | Madisetti, Vijay K. Verfasser aut VLSI digital signal processors an introduction to rapid prototyping and design synthesis Vijay K. Madisetti Boston [u.a.] IEEE Press [u.a.] 1995 XV, 525 S. Ill., graph. Darst. txt rdacontent n rdamedia nc rdacarrier Circuits intégrés à très grande échelle ram Conception et construction ram PROCESSEUR VLSI inriac Traitement du sognal ram VLSI inriac architecture traitement signal inriac conception logique inriac méthode formelle inriac processeur signal inriac prototypage inriac signal vidéo inriac Integrated circuits Very large scale integration Design and construction Microprocessors Design and construction Rapid prototyping Signal processing Digital techniques Entwurf (DE-588)4121208-3 gnd rswk-swf Signalprozessor (DE-588)4054943-4 gnd rswk-swf Signalprozessor (DE-588)4054943-4 s Entwurf (DE-588)4121208-3 s DE-604 |
| spellingShingle | Madisetti, Vijay K. VLSI digital signal processors an introduction to rapid prototyping and design synthesis Circuits intégrés à très grande échelle ram Conception et construction ram PROCESSEUR VLSI inriac Traitement du sognal ram VLSI inriac architecture traitement signal inriac conception logique inriac méthode formelle inriac processeur signal inriac prototypage inriac signal vidéo inriac Integrated circuits Very large scale integration Design and construction Microprocessors Design and construction Rapid prototyping Signal processing Digital techniques Entwurf (DE-588)4121208-3 gnd Signalprozessor (DE-588)4054943-4 gnd |
| subject_GND | (DE-588)4121208-3 (DE-588)4054943-4 |
| title | VLSI digital signal processors an introduction to rapid prototyping and design synthesis |
| title_auth | VLSI digital signal processors an introduction to rapid prototyping and design synthesis |
| title_exact_search | VLSI digital signal processors an introduction to rapid prototyping and design synthesis |
| title_full | VLSI digital signal processors an introduction to rapid prototyping and design synthesis Vijay K. Madisetti |
| title_fullStr | VLSI digital signal processors an introduction to rapid prototyping and design synthesis Vijay K. Madisetti |
| title_full_unstemmed | VLSI digital signal processors an introduction to rapid prototyping and design synthesis Vijay K. Madisetti |
| title_short | VLSI digital signal processors |
| title_sort | vlsi digital signal processors an introduction to rapid prototyping and design synthesis |
| title_sub | an introduction to rapid prototyping and design synthesis |
| topic | Circuits intégrés à très grande échelle ram Conception et construction ram PROCESSEUR VLSI inriac Traitement du sognal ram VLSI inriac architecture traitement signal inriac conception logique inriac méthode formelle inriac processeur signal inriac prototypage inriac signal vidéo inriac Integrated circuits Very large scale integration Design and construction Microprocessors Design and construction Rapid prototyping Signal processing Digital techniques Entwurf (DE-588)4121208-3 gnd Signalprozessor (DE-588)4054943-4 gnd |
| topic_facet | Circuits intégrés à très grande échelle Conception et construction PROCESSEUR VLSI Traitement du sognal VLSI architecture traitement signal conception logique méthode formelle processeur signal prototypage signal vidéo Integrated circuits Very large scale integration Design and construction Microprocessors Design and construction Rapid prototyping Signal processing Digital techniques Entwurf Signalprozessor |
| work_keys_str_mv | AT madisettivijayk vlsidigitalsignalprocessorsanintroductiontorapidprototypinganddesignsynthesis |