It's the methodology, stupid!:
Discover the complete ASIC design flow including behavioral synthesis, design verification, logic synthesis, text synthesis, static timing analysis, parasitic extraction and floorplanning.
Gespeichert in:
Hauptverfasser: | , , |
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Format: | Buch |
Sprache: | English |
Veröffentlicht: |
Palo Alto, Calif.
ByteK Designs
1998
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Schlagworte: | |
Zusammenfassung: | Discover the complete ASIC design flow including behavioral synthesis, design verification, logic synthesis, text synthesis, static timing analysis, parasitic extraction and floorplanning. |
Beschreibung: | 232 S. graph. Darst. |
ISBN: | 0966330102 |
Internformat
MARC
LEADER | 00000nam a2200000 c 4500 | ||
---|---|---|---|
001 | BV012580557 | ||
003 | DE-604 | ||
005 | 20000216 | ||
007 | t | ||
008 | 990528s1998 d||| |||| 00||| eng d | ||
020 | |a 0966330102 |9 0-9663301-0-2 | ||
035 | |a (OCoLC)41632437 | ||
035 | |a (DE-599)BVBBV012580557 | ||
040 | |a DE-604 |b ger |e rakddb | ||
041 | 0 | |a eng | |
049 | |a DE-29T |a DE-92 | ||
050 | 0 | |a TK7874.6 | |
084 | |a ZN 4900 |0 (DE-625)157417: |2 rvk | ||
100 | 1 | |a Kurup, Pran |e Verfasser |4 aut | |
245 | 1 | 0 | |a It's the methodology, stupid! |c by Pran Kurup ; Taher Abbasi ; Ricky Bedi |
264 | 1 | |a Palo Alto, Calif. |b ByteK Designs |c 1998 | |
300 | |a 232 S. |b graph. Darst. | ||
336 | |b txt |2 rdacontent | ||
337 | |b n |2 rdamedia | ||
338 | |b nc |2 rdacarrier | ||
520 | 3 | |a Discover the complete ASIC design flow including behavioral synthesis, design verification, logic synthesis, text synthesis, static timing analysis, parasitic extraction and floorplanning. | |
650 | 4 | |a Datenverarbeitung | |
650 | 4 | |a Application specific integrated circuits |x Computer-aided design | |
650 | 4 | |a Logic design |x Data processing | |
650 | 0 | 7 | |a Entwurf |0 (DE-588)4121208-3 |2 gnd |9 rswk-swf |
650 | 0 | 7 | |a Kundenspezifische Schaltung |0 (DE-588)4122250-7 |2 gnd |9 rswk-swf |
689 | 0 | 0 | |a Kundenspezifische Schaltung |0 (DE-588)4122250-7 |D s |
689 | 0 | 1 | |a Entwurf |0 (DE-588)4121208-3 |D s |
689 | 0 | |5 DE-604 | |
700 | 1 | |a Abbasi, Taher |e Verfasser |4 aut | |
700 | 1 | |a Bedi, Ricky |e Verfasser |4 aut | |
999 | |a oai:aleph.bib-bvb.de:BVB01-008543880 |
Datensatz im Suchindex
_version_ | 1804127230424514560 |
---|---|
any_adam_object | |
author | Kurup, Pran Abbasi, Taher Bedi, Ricky |
author_facet | Kurup, Pran Abbasi, Taher Bedi, Ricky |
author_role | aut aut aut |
author_sort | Kurup, Pran |
author_variant | p k pk t a ta r b rb |
building | Verbundindex |
bvnumber | BV012580557 |
callnumber-first | T - Technology |
callnumber-label | TK7874 |
callnumber-raw | TK7874.6 |
callnumber-search | TK7874.6 |
callnumber-sort | TK 47874.6 |
callnumber-subject | TK - Electrical and Nuclear Engineering |
classification_rvk | ZN 4900 |
ctrlnum | (OCoLC)41632437 (DE-599)BVBBV012580557 |
discipline | Elektrotechnik / Elektronik / Nachrichtentechnik |
format | Book |
fullrecord | <?xml version="1.0" encoding="UTF-8"?><collection xmlns="http://www.loc.gov/MARC21/slim"><record><leader>01531nam a2200409 c 4500</leader><controlfield tag="001">BV012580557</controlfield><controlfield tag="003">DE-604</controlfield><controlfield tag="005">20000216 </controlfield><controlfield tag="007">t</controlfield><controlfield tag="008">990528s1998 d||| |||| 00||| eng d</controlfield><datafield tag="020" ind1=" " ind2=" "><subfield code="a">0966330102</subfield><subfield code="9">0-9663301-0-2</subfield></datafield><datafield tag="035" ind1=" " ind2=" "><subfield code="a">(OCoLC)41632437</subfield></datafield><datafield tag="035" ind1=" " ind2=" "><subfield code="a">(DE-599)BVBBV012580557</subfield></datafield><datafield tag="040" ind1=" " ind2=" "><subfield code="a">DE-604</subfield><subfield code="b">ger</subfield><subfield code="e">rakddb</subfield></datafield><datafield tag="041" ind1="0" ind2=" "><subfield code="a">eng</subfield></datafield><datafield tag="049" ind1=" " ind2=" "><subfield code="a">DE-29T</subfield><subfield code="a">DE-92</subfield></datafield><datafield tag="050" ind1=" " ind2="0"><subfield code="a">TK7874.6</subfield></datafield><datafield tag="084" ind1=" " ind2=" "><subfield code="a">ZN 4900</subfield><subfield code="0">(DE-625)157417:</subfield><subfield code="2">rvk</subfield></datafield><datafield tag="100" ind1="1" ind2=" "><subfield code="a">Kurup, Pran</subfield><subfield code="e">Verfasser</subfield><subfield code="4">aut</subfield></datafield><datafield tag="245" ind1="1" ind2="0"><subfield code="a">It's the methodology, stupid!</subfield><subfield code="c">by Pran Kurup ; Taher Abbasi ; Ricky Bedi</subfield></datafield><datafield tag="264" ind1=" " ind2="1"><subfield code="a">Palo Alto, Calif.</subfield><subfield code="b">ByteK Designs</subfield><subfield code="c">1998</subfield></datafield><datafield tag="300" ind1=" " ind2=" "><subfield code="a">232 S.</subfield><subfield code="b">graph. Darst.</subfield></datafield><datafield tag="336" ind1=" " ind2=" "><subfield code="b">txt</subfield><subfield code="2">rdacontent</subfield></datafield><datafield tag="337" ind1=" " ind2=" "><subfield code="b">n</subfield><subfield code="2">rdamedia</subfield></datafield><datafield tag="338" ind1=" " ind2=" "><subfield code="b">nc</subfield><subfield code="2">rdacarrier</subfield></datafield><datafield tag="520" ind1="3" ind2=" "><subfield code="a">Discover the complete ASIC design flow including behavioral synthesis, design verification, logic synthesis, text synthesis, static timing analysis, parasitic extraction and floorplanning.</subfield></datafield><datafield tag="650" ind1=" " ind2="4"><subfield code="a">Datenverarbeitung</subfield></datafield><datafield tag="650" ind1=" " ind2="4"><subfield code="a">Application specific integrated circuits</subfield><subfield code="x">Computer-aided design</subfield></datafield><datafield tag="650" ind1=" " ind2="4"><subfield code="a">Logic design</subfield><subfield code="x">Data processing</subfield></datafield><datafield tag="650" ind1="0" ind2="7"><subfield code="a">Entwurf</subfield><subfield code="0">(DE-588)4121208-3</subfield><subfield code="2">gnd</subfield><subfield code="9">rswk-swf</subfield></datafield><datafield tag="650" ind1="0" ind2="7"><subfield code="a">Kundenspezifische Schaltung</subfield><subfield code="0">(DE-588)4122250-7</subfield><subfield code="2">gnd</subfield><subfield code="9">rswk-swf</subfield></datafield><datafield tag="689" ind1="0" ind2="0"><subfield code="a">Kundenspezifische Schaltung</subfield><subfield code="0">(DE-588)4122250-7</subfield><subfield code="D">s</subfield></datafield><datafield tag="689" ind1="0" ind2="1"><subfield code="a">Entwurf</subfield><subfield code="0">(DE-588)4121208-3</subfield><subfield code="D">s</subfield></datafield><datafield tag="689" ind1="0" ind2=" "><subfield code="5">DE-604</subfield></datafield><datafield tag="700" ind1="1" ind2=" "><subfield code="a">Abbasi, Taher</subfield><subfield code="e">Verfasser</subfield><subfield code="4">aut</subfield></datafield><datafield tag="700" ind1="1" ind2=" "><subfield code="a">Bedi, Ricky</subfield><subfield code="e">Verfasser</subfield><subfield code="4">aut</subfield></datafield><datafield tag="999" ind1=" " ind2=" "><subfield code="a">oai:aleph.bib-bvb.de:BVB01-008543880</subfield></datafield></record></collection> |
id | DE-604.BV012580557 |
illustrated | Illustrated |
indexdate | 2024-07-09T18:30:03Z |
institution | BVB |
isbn | 0966330102 |
language | English |
oai_aleph_id | oai:aleph.bib-bvb.de:BVB01-008543880 |
oclc_num | 41632437 |
open_access_boolean | |
owner | DE-29T DE-92 |
owner_facet | DE-29T DE-92 |
physical | 232 S. graph. Darst. |
publishDate | 1998 |
publishDateSearch | 1998 |
publishDateSort | 1998 |
publisher | ByteK Designs |
record_format | marc |
spelling | Kurup, Pran Verfasser aut It's the methodology, stupid! by Pran Kurup ; Taher Abbasi ; Ricky Bedi Palo Alto, Calif. ByteK Designs 1998 232 S. graph. Darst. txt rdacontent n rdamedia nc rdacarrier Discover the complete ASIC design flow including behavioral synthesis, design verification, logic synthesis, text synthesis, static timing analysis, parasitic extraction and floorplanning. Datenverarbeitung Application specific integrated circuits Computer-aided design Logic design Data processing Entwurf (DE-588)4121208-3 gnd rswk-swf Kundenspezifische Schaltung (DE-588)4122250-7 gnd rswk-swf Kundenspezifische Schaltung (DE-588)4122250-7 s Entwurf (DE-588)4121208-3 s DE-604 Abbasi, Taher Verfasser aut Bedi, Ricky Verfasser aut |
spellingShingle | Kurup, Pran Abbasi, Taher Bedi, Ricky It's the methodology, stupid! Datenverarbeitung Application specific integrated circuits Computer-aided design Logic design Data processing Entwurf (DE-588)4121208-3 gnd Kundenspezifische Schaltung (DE-588)4122250-7 gnd |
subject_GND | (DE-588)4121208-3 (DE-588)4122250-7 |
title | It's the methodology, stupid! |
title_auth | It's the methodology, stupid! |
title_exact_search | It's the methodology, stupid! |
title_full | It's the methodology, stupid! by Pran Kurup ; Taher Abbasi ; Ricky Bedi |
title_fullStr | It's the methodology, stupid! by Pran Kurup ; Taher Abbasi ; Ricky Bedi |
title_full_unstemmed | It's the methodology, stupid! by Pran Kurup ; Taher Abbasi ; Ricky Bedi |
title_short | It's the methodology, stupid! |
title_sort | it s the methodology stupid |
topic | Datenverarbeitung Application specific integrated circuits Computer-aided design Logic design Data processing Entwurf (DE-588)4121208-3 gnd Kundenspezifische Schaltung (DE-588)4122250-7 gnd |
topic_facet | Datenverarbeitung Application specific integrated circuits Computer-aided design Logic design Data processing Entwurf Kundenspezifische Schaltung |
work_keys_str_mv | AT kuruppran itsthemethodologystupid AT abbasitaher itsthemethodologystupid AT bediricky itsthemethodologystupid |